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-rw-r--r--include/linux/tegra_vgpu.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index daef7d98..67f51806 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -101,6 +101,7 @@ enum {
101 TEGRA_VGPU_CMD_RESUME_CONTEXTS = 67, 101 TEGRA_VGPU_CMD_RESUME_CONTEXTS = 67,
102 TEGRA_VGPU_CMD_CLEAR_SM_ERROR_STATE = 68, 102 TEGRA_VGPU_CMD_CLEAR_SM_ERROR_STATE = 68,
103 TEGRA_VGPU_CMD_PROF_MGT = 72, 103 TEGRA_VGPU_CMD_PROF_MGT = 72,
104 TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74,
104}; 105};
105 106
106struct tegra_vgpu_connect_params { 107struct tegra_vgpu_connect_params {
@@ -389,6 +390,22 @@ struct tegra_vgpu_read_ptimer_params {
389 u64 time; 390 u64 time;
390}; 391};
391 392
393#define TEGRA_VGPU_GET_TIMESTAMPS_ZIPPER_MAX_COUNT 16
394#define TEGRA_VGPU_GET_TIMESTAMPS_ZIPPER_SRC_ID_TSC 1
395struct tegra_vgpu_get_timestamps_zipper_params {
396 /* timestamp pairs */
397 struct {
398 /* gpu timestamp value */
399 u64 cpu_timestamp;
400 /* raw GPU counter (PTIMER) value */
401 u64 gpu_timestamp;
402 } samples[TEGRA_VGPU_GET_TIMESTAMPS_ZIPPER_MAX_COUNT];
403 /* number of pairs to read */
404 u32 count;
405 /* cpu clock source id */
406 u32 source_id;
407};
408
392struct tegra_vgpu_set_powergate_params { 409struct tegra_vgpu_set_powergate_params {
393 u32 mode; 410 u32 mode;
394}; 411};
@@ -518,6 +535,7 @@ struct tegra_vgpu_cmd_msg {
518 struct tegra_vgpu_suspend_resume_contexts resume_contexts; 535 struct tegra_vgpu_suspend_resume_contexts resume_contexts;
519 struct tegra_vgpu_clear_sm_error_state clear_sm_error_state; 536 struct tegra_vgpu_clear_sm_error_state clear_sm_error_state;
520 struct tegra_vgpu_prof_mgt_params prof_management; 537 struct tegra_vgpu_prof_mgt_params prof_management;
538 struct tegra_vgpu_get_timestamps_zipper_params get_timestamps_zipper;
521 char padding[192]; 539 char padding[192];
522 } params; 540 } params;
523}; 541};