diff options
Diffstat (limited to 'include/linux/tegra_vgpu.h')
-rw-r--r-- | include/linux/tegra_vgpu.h | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index bb9bdcab..d9a6f7fd 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -19,10 +19,6 @@ | |||
19 | #ifndef __TEGRA_VGPU_H | 19 | #ifndef __TEGRA_VGPU_H |
20 | #define __TEGRA_VGPU_H | 20 | #define __TEGRA_VGPU_H |
21 | 21 | ||
22 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
23 | #include <linux/tegra_vgpu_t18x.h> | ||
24 | #endif | ||
25 | |||
26 | enum { | 22 | enum { |
27 | TEGRA_VGPU_MODULE_GPU = 0, | 23 | TEGRA_VGPU_MODULE_GPU = 0, |
28 | }; | 24 | }; |
@@ -139,6 +135,7 @@ enum { | |||
139 | TEGRA_VGPU_ATTRIB_TPC_COUNT = 19, /* deprecated */ | 135 | TEGRA_VGPU_ATTRIB_TPC_COUNT = 19, /* deprecated */ |
140 | TEGRA_VGPU_ATTRIB_GPC0_TPC_COUNT = 20, /* deprecated */ | 136 | TEGRA_VGPU_ATTRIB_GPC0_TPC_COUNT = 20, /* deprecated */ |
141 | TEGRA_VGPU_ATTRIB_MAX_FREQ = 21, /* deprecated */ | 137 | TEGRA_VGPU_ATTRIB_MAX_FREQ = 21, /* deprecated */ |
138 | TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE = 64, /* gap to hide T18x IP */ | ||
142 | }; | 139 | }; |
143 | 140 | ||
144 | struct tegra_vgpu_attrib_params { | 141 | struct tegra_vgpu_attrib_params { |
@@ -281,12 +278,26 @@ struct tegra_vgpu_zbc_query_table_params { | |||
281 | u32 index_size; /* [out] size, [in] index */ | 278 | u32 index_size; /* [out] size, [in] index */ |
282 | }; | 279 | }; |
283 | 280 | ||
284 | #define TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAX 4 | 281 | enum { |
282 | TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN, | ||
283 | TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL, | ||
284 | TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL, | ||
285 | TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB, | ||
286 | TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_LAST | ||
287 | }; | ||
288 | |||
289 | enum { | ||
290 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_WFI, | ||
291 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_GFX_GFXP, | ||
292 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CTA, | ||
293 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CILP, | ||
294 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_LAST | ||
295 | }; | ||
285 | 296 | ||
286 | struct tegra_vgpu_gr_bind_ctxsw_buffers_params { | 297 | struct tegra_vgpu_gr_bind_ctxsw_buffers_params { |
287 | u64 handle; /* deprecated */ | 298 | u64 handle; /* deprecated */ |
288 | u64 gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAX]; | 299 | u64 gpu_va[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_LAST]; |
289 | u64 size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAX]; | 300 | u64 size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_LAST]; |
290 | u32 mode; | 301 | u32 mode; |
291 | u64 gr_ctx_handle; | 302 | u64 gr_ctx_handle; |
292 | }; | 303 | }; |