diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 46 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/mm_gm20b.c | 6 |
7 files changed, 84 insertions, 28 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 6a69de3e..4458430b 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -1541,12 +1541,25 @@ clean_up: | |||
1541 | return err; | 1541 | return err; |
1542 | } | 1542 | } |
1543 | 1543 | ||
1544 | u32 gk20a_userd_gp_get(struct gk20a *g, struct channel_gk20a *c) | ||
1545 | { | ||
1546 | return gk20a_bar1_readl(g, | ||
1547 | c->userd_gpu_va + sizeof(u32) * ram_userd_gp_get_w()); | ||
1548 | } | ||
1549 | |||
1550 | void gk20a_userd_gp_put(struct gk20a *g, struct channel_gk20a *c) | ||
1551 | { | ||
1552 | gk20a_bar1_writel(g, | ||
1553 | c->userd_gpu_va + sizeof(u32) * ram_userd_gp_put_w(), | ||
1554 | c->gpfifo.put); | ||
1555 | } | ||
1556 | |||
1544 | /* Update with this periodically to determine how the gpfifo is draining. */ | 1557 | /* Update with this periodically to determine how the gpfifo is draining. */ |
1545 | static inline u32 update_gp_get(struct gk20a *g, | 1558 | static inline u32 update_gp_get(struct gk20a *g, |
1546 | struct channel_gk20a *c) | 1559 | struct channel_gk20a *c) |
1547 | { | 1560 | { |
1548 | u32 new_get = gk20a_bar1_readl(g, | 1561 | u32 new_get = g->ops.fifo.userd_gp_get(g, c); |
1549 | c->userd_gpu_va + sizeof(u32) * ram_userd_gp_get_w()); | 1562 | |
1550 | if (new_get < c->gpfifo.get) | 1563 | if (new_get < c->gpfifo.get) |
1551 | c->gpfifo.wrap = !c->gpfifo.wrap; | 1564 | c->gpfifo.wrap = !c->gpfifo.wrap; |
1552 | c->gpfifo.get = new_get; | 1565 | c->gpfifo.get = new_get; |
@@ -2360,9 +2373,7 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c, | |||
2360 | wait_cmd, incr_cmd, | 2373 | wait_cmd, incr_cmd, |
2361 | skip_buffer_refcounting); | 2374 | skip_buffer_refcounting); |
2362 | 2375 | ||
2363 | gk20a_bar1_writel(g, | 2376 | g->ops.fifo.userd_gp_put(g, c); |
2364 | c->userd_gpu_va + 4 * ram_userd_gp_put_w(), | ||
2365 | c->gpfifo.put); | ||
2366 | 2377 | ||
2367 | trace_gk20a_channel_submitted_gpfifo(dev_name(c->g->dev), | 2378 | trace_gk20a_channel_submitted_gpfifo(dev_name(c->g->dev), |
2368 | c->hw_chid, | 2379 | c->hw_chid, |
@@ -2988,6 +2999,8 @@ void gk20a_init_channel(struct gpu_ops *gops) | |||
2988 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; | 2999 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; |
2989 | gops->fifo.channel_set_priority = gk20a_channel_set_priority; | 3000 | gops->fifo.channel_set_priority = gk20a_channel_set_priority; |
2990 | gops->fifo.channel_set_timeslice = gk20a_channel_set_timeslice; | 3001 | gops->fifo.channel_set_timeslice = gk20a_channel_set_timeslice; |
3002 | gops->fifo.userd_gp_get = gk20a_userd_gp_get; | ||
3003 | gops->fifo.userd_gp_put = gk20a_userd_gp_put; | ||
2991 | } | 3004 | } |
2992 | 3005 | ||
2993 | long gk20a_channel_ioctl(struct file *filp, | 3006 | long gk20a_channel_ioctl(struct file *filp, |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 835ef062..1dce435c 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -491,7 +491,10 @@ static void gk20a_remove_fifo_support(struct fifo_gk20a *f) | |||
491 | 491 | ||
492 | vfree(f->channel); | 492 | vfree(f->channel); |
493 | vfree(f->tsg); | 493 | vfree(f->tsg); |
494 | gk20a_gmmu_unmap_free(&g->mm.bar1.vm, &f->userd); | 494 | if (g->ops.mm.is_bar1_supported(g)) |
495 | gk20a_gmmu_unmap_free(&g->mm.bar1.vm, &f->userd); | ||
496 | else | ||
497 | gk20a_gmmu_free(g, &f->userd); | ||
495 | 498 | ||
496 | gk20a_fifo_delete_runlist(f); | 499 | gk20a_fifo_delete_runlist(f); |
497 | 500 | ||
@@ -797,16 +800,6 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
797 | 800 | ||
798 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); | 801 | f->userd_entry_size = 1 << ram_userd_base_shift_v(); |
799 | 802 | ||
800 | err = gk20a_gmmu_alloc_map_sys(&g->mm.bar1.vm, | ||
801 | f->userd_entry_size * f->num_channels, | ||
802 | &f->userd); | ||
803 | if (err) { | ||
804 | dev_err(d, "memory allocation failed\n"); | ||
805 | goto clean_up; | ||
806 | } | ||
807 | |||
808 | gk20a_dbg(gpu_dbg_map_v, "userd bar1 va = 0x%llx", f->userd.gpu_va); | ||
809 | |||
810 | f->channel = vzalloc(f->num_channels * sizeof(*f->channel)); | 803 | f->channel = vzalloc(f->num_channels * sizeof(*f->channel)); |
811 | f->tsg = vzalloc(f->num_channels * sizeof(*f->tsg)); | 804 | f->tsg = vzalloc(f->num_channels * sizeof(*f->tsg)); |
812 | f->pbdma_map = kzalloc(f->num_pbdma * sizeof(*f->pbdma_map), | 805 | f->pbdma_map = kzalloc(f->num_pbdma * sizeof(*f->pbdma_map), |
@@ -834,13 +827,26 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
834 | INIT_LIST_HEAD(&f->free_chs); | 827 | INIT_LIST_HEAD(&f->free_chs); |
835 | mutex_init(&f->free_chs_mutex); | 828 | mutex_init(&f->free_chs_mutex); |
836 | 829 | ||
830 | if (g->ops.mm.is_bar1_supported(g)) | ||
831 | err = gk20a_gmmu_alloc_map_sys(&g->mm.bar1.vm, | ||
832 | f->userd_entry_size * f->num_channels, | ||
833 | &f->userd); | ||
834 | |||
835 | else | ||
836 | err = gk20a_gmmu_alloc_sys(g, f->userd_entry_size * | ||
837 | f->num_channels, &f->userd); | ||
838 | if (err) { | ||
839 | dev_err(d, "userd memory allocation failed\n"); | ||
840 | goto clean_up; | ||
841 | } | ||
842 | gk20a_dbg(gpu_dbg_map, "userd gpu va = 0x%llx", f->userd.gpu_va); | ||
843 | |||
837 | for (chid = 0; chid < f->num_channels; chid++) { | 844 | for (chid = 0; chid < f->num_channels; chid++) { |
838 | f->channel[chid].userd_iova = | 845 | f->channel[chid].userd_iova = |
839 | g->ops.mm.get_iova_addr(g, f->userd.sgt->sgl, 0) | 846 | g->ops.mm.get_iova_addr(g, f->userd.sgt->sgl, 0) |
840 | + chid * f->userd_entry_size; | 847 | + chid * f->userd_entry_size; |
841 | f->channel[chid].userd_gpu_va = | 848 | f->channel[chid].userd_gpu_va = |
842 | f->userd.gpu_va + chid * f->userd_entry_size; | 849 | f->userd.gpu_va + chid * f->userd_entry_size; |
843 | |||
844 | gk20a_init_channel_support(g, chid); | 850 | gk20a_init_channel_support(g, chid); |
845 | gk20a_init_tsg_support(g, chid); | 851 | gk20a_init_tsg_support(g, chid); |
846 | } | 852 | } |
@@ -858,7 +864,10 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
858 | 864 | ||
859 | clean_up: | 865 | clean_up: |
860 | gk20a_dbg_fn("fail"); | 866 | gk20a_dbg_fn("fail"); |
861 | gk20a_gmmu_unmap_free(&g->mm.bar1.vm, &f->userd); | 867 | if (g->ops.mm.is_bar1_supported(g)) |
868 | gk20a_gmmu_unmap_free(&g->mm.bar1.vm, &f->userd); | ||
869 | else | ||
870 | gk20a_gmmu_free(g, &f->userd); | ||
862 | 871 | ||
863 | vfree(f->channel); | 872 | vfree(f->channel); |
864 | f->channel = NULL; | 873 | f->channel = NULL; |
@@ -884,7 +893,7 @@ static void gk20a_fifo_handle_runlist_event(struct gk20a *g) | |||
884 | gk20a_writel(g, fifo_intr_runlist_r(), runlist_event); | 893 | gk20a_writel(g, fifo_intr_runlist_r(), runlist_event); |
885 | } | 894 | } |
886 | 895 | ||
887 | static int gk20a_init_fifo_setup_hw(struct gk20a *g) | 896 | int gk20a_init_fifo_setup_hw(struct gk20a *g) |
888 | { | 897 | { |
889 | struct fifo_gk20a *f = &g->fifo; | 898 | struct fifo_gk20a *f = &g->fifo; |
890 | 899 | ||
@@ -952,7 +961,8 @@ int gk20a_init_fifo_support(struct gk20a *g) | |||
952 | if (err) | 961 | if (err) |
953 | return err; | 962 | return err; |
954 | 963 | ||
955 | err = gk20a_init_fifo_setup_hw(g); | 964 | if (g->ops.fifo.init_fifo_setup_hw) |
965 | err = g->ops.fifo.init_fifo_setup_hw(g); | ||
956 | if (err) | 966 | if (err) |
957 | return err; | 967 | return err; |
958 | 968 | ||
@@ -3015,7 +3025,8 @@ int gk20a_fifo_suspend(struct gk20a *g) | |||
3015 | gk20a_dbg_fn(""); | 3025 | gk20a_dbg_fn(""); |
3016 | 3026 | ||
3017 | /* stop bar1 snooping */ | 3027 | /* stop bar1 snooping */ |
3018 | gk20a_writel(g, fifo_bar1_base_r(), | 3028 | if (g->ops.mm.is_bar1_supported(g)) |
3029 | gk20a_writel(g, fifo_bar1_base_r(), | ||
3019 | fifo_bar1_base_valid_false_f()); | 3030 | fifo_bar1_base_valid_false_f()); |
3020 | 3031 | ||
3021 | /* disable fifo intr */ | 3032 | /* disable fifo intr */ |
@@ -3246,6 +3257,7 @@ void gk20a_fifo_debugfs_init(struct device *dev) | |||
3246 | void gk20a_init_fifo(struct gpu_ops *gops) | 3257 | void gk20a_init_fifo(struct gpu_ops *gops) |
3247 | { | 3258 | { |
3248 | gk20a_init_channel(gops); | 3259 | gk20a_init_channel(gops); |
3260 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; | ||
3249 | gops->fifo.preempt_channel = gk20a_fifo_preempt_channel; | 3261 | gops->fifo.preempt_channel = gk20a_fifo_preempt_channel; |
3250 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; | 3262 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; |
3251 | gops->fifo.update_runlist = gk20a_fifo_update_runlist; | 3263 | gops->fifo.update_runlist = gk20a_fifo_update_runlist; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 228f7730..64bdeabb 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -167,6 +167,8 @@ static inline const char *gk20a_fifo_interleave_level_name(u32 interleave_level) | |||
167 | 167 | ||
168 | int gk20a_init_fifo_support(struct gk20a *g); | 168 | int gk20a_init_fifo_support(struct gk20a *g); |
169 | 169 | ||
170 | int gk20a_init_fifo_setup_hw(struct gk20a *g); | ||
171 | |||
170 | void gk20a_fifo_isr(struct gk20a *g); | 172 | void gk20a_fifo_isr(struct gk20a *g); |
171 | void gk20a_fifo_nonstall_isr(struct gk20a *g); | 173 | void gk20a_fifo_nonstall_isr(struct gk20a *g); |
172 | 174 | ||
@@ -263,4 +265,8 @@ int gk20a_fifo_init_engine_info(struct fifo_gk20a *f); | |||
263 | void gk20a_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist); | 265 | void gk20a_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist); |
264 | void gk20a_get_ch_runlist_entry(struct channel_gk20a *ch, u32 *runlist); | 266 | void gk20a_get_ch_runlist_entry(struct channel_gk20a *ch, u32 *runlist); |
265 | 267 | ||
268 | u32 gk20a_userd_gp_get(struct gk20a *g, struct channel_gk20a *c); | ||
269 | void gk20a_userd_gp_put(struct gk20a *g, struct channel_gk20a *c); | ||
270 | |||
271 | |||
266 | #endif /*__GR_GK20A_H__*/ | 272 | #endif /*__GR_GK20A_H__*/ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2b55dd26..042bd9d7 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -342,6 +342,7 @@ struct gpu_ops { | |||
342 | void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod); | 342 | void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod); |
343 | } clock_gating; | 343 | } clock_gating; |
344 | struct { | 344 | struct { |
345 | int (*init_fifo_setup_hw)(struct gk20a *g); | ||
345 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); | 346 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); |
346 | void (*unbind_channel)(struct channel_gk20a *ch_gk20a); | 347 | void (*unbind_channel)(struct channel_gk20a *ch_gk20a); |
347 | void (*disable_channel)(struct channel_gk20a *ch); | 348 | void (*disable_channel)(struct channel_gk20a *ch); |
@@ -386,6 +387,8 @@ struct gpu_ops { | |||
386 | u32 *runlist); | 387 | u32 *runlist); |
387 | void (*get_ch_runlist_entry)(struct channel_gk20a *ch, | 388 | void (*get_ch_runlist_entry)(struct channel_gk20a *ch, |
388 | u32 *runlist); | 389 | u32 *runlist); |
390 | u32 (*userd_gp_get)(struct gk20a *g, struct channel_gk20a *ch); | ||
391 | void (*userd_gp_put)(struct gk20a *g, struct channel_gk20a *ch); | ||
389 | } fifo; | 392 | } fifo; |
390 | struct pmu_v { | 393 | struct pmu_v { |
391 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 394 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
@@ -552,6 +555,7 @@ struct gpu_ops { | |||
552 | u32 (*get_big_page_sizes)(void); | 555 | u32 (*get_big_page_sizes)(void); |
553 | u32 (*get_physical_addr_bits)(struct gk20a *g); | 556 | u32 (*get_physical_addr_bits)(struct gk20a *g); |
554 | int (*init_mm_setup_hw)(struct gk20a *g); | 557 | int (*init_mm_setup_hw)(struct gk20a *g); |
558 | bool (*is_bar1_supported)(struct gk20a *g); | ||
555 | int (*init_bar2_vm)(struct gk20a *g); | 559 | int (*init_bar2_vm)(struct gk20a *g); |
556 | int (*init_bar2_mm_hw_setup)(struct gk20a *g); | 560 | int (*init_bar2_mm_hw_setup)(struct gk20a *g); |
557 | void (*remove_bar2_vm)(struct gk20a *g); | 561 | void (*remove_bar2_vm)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index a84d8ff0..570a3708 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -797,7 +797,10 @@ static void gk20a_remove_mm_support(struct mm_gk20a *mm) | |||
797 | 797 | ||
798 | if (g->ops.mm.remove_bar2_vm) | 798 | if (g->ops.mm.remove_bar2_vm) |
799 | g->ops.mm.remove_bar2_vm(g); | 799 | g->ops.mm.remove_bar2_vm(g); |
800 | gk20a_remove_vm(&mm->bar1.vm, &mm->bar1.inst_block); | 800 | |
801 | if (g->ops.mm.is_bar1_supported(g)) | ||
802 | gk20a_remove_vm(&mm->bar1.vm, &mm->bar1.inst_block); | ||
803 | |||
801 | gk20a_remove_vm(&mm->pmu.vm, &mm->pmu.inst_block); | 804 | gk20a_remove_vm(&mm->pmu.vm, &mm->pmu.inst_block); |
802 | gk20a_free_inst_block(gk20a_from_mm(mm), &mm->hwpm.inst_block); | 805 | gk20a_free_inst_block(gk20a_from_mm(mm), &mm->hwpm.inst_block); |
803 | gk20a_vm_remove_support_nofree(&mm->cde.vm); | 806 | gk20a_vm_remove_support_nofree(&mm->cde.vm); |
@@ -1001,10 +1004,11 @@ int gk20a_init_mm_setup_sw(struct gk20a *g) | |||
1001 | if (err) | 1004 | if (err) |
1002 | return err; | 1005 | return err; |
1003 | 1006 | ||
1004 | err = gk20a_init_bar1_vm(mm); | 1007 | if (g->ops.mm.is_bar1_supported(g)) { |
1005 | if (err) | 1008 | err = gk20a_init_bar1_vm(mm); |
1006 | return err; | 1009 | if (err) |
1007 | 1010 | return err; | |
1011 | } | ||
1008 | if (g->ops.mm.init_bar2_vm) { | 1012 | if (g->ops.mm.init_bar2_vm) { |
1009 | err = g->ops.mm.init_bar2_vm(g); | 1013 | err = g->ops.mm.init_bar2_vm(g); |
1010 | if (err) | 1014 | if (err) |
@@ -1055,7 +1059,8 @@ int gk20a_init_mm_setup_hw(struct gk20a *g) | |||
1055 | g->ops.mm.get_iova_addr(g, g->mm.sysmem_flush.sgt->sgl, 0) | 1059 | g->ops.mm.get_iova_addr(g, g->mm.sysmem_flush.sgt->sgl, 0) |
1056 | >> 8); | 1060 | >> 8); |
1057 | 1061 | ||
1058 | g->ops.mm.bar1_bind(g, &mm->bar1.inst_block); | 1062 | if (g->ops.mm.bar1_bind) |
1063 | g->ops.mm.bar1_bind(g, &mm->bar1.inst_block); | ||
1059 | 1064 | ||
1060 | if (g->ops.mm.init_bar2_mm_hw_setup) { | 1065 | if (g->ops.mm.init_bar2_mm_hw_setup) { |
1061 | err = g->ops.mm.init_bar2_mm_hw_setup(g); | 1066 | err = g->ops.mm.init_bar2_mm_hw_setup(g); |
@@ -5249,6 +5254,11 @@ clean_up: | |||
5249 | return err; | 5254 | return err; |
5250 | } | 5255 | } |
5251 | 5256 | ||
5257 | static bool gk20a_mm_is_bar1_supported(struct gk20a *g) | ||
5258 | { | ||
5259 | return true; | ||
5260 | } | ||
5261 | |||
5252 | #ifdef CONFIG_DEBUG_FS | 5262 | #ifdef CONFIG_DEBUG_FS |
5253 | void gk20a_mm_debugfs_init(struct device *dev) | 5263 | void gk20a_mm_debugfs_init(struct device *dev) |
5254 | { | 5264 | { |
@@ -5284,4 +5294,5 @@ void gk20a_init_mm(struct gpu_ops *gops) | |||
5284 | gops->mm.init_pdb = gk20a_mm_init_pdb; | 5294 | gops->mm.init_pdb = gk20a_mm_init_pdb; |
5285 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; | 5295 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; |
5286 | gops->mm.bar1_bind = gk20a_mm_bar1_bind; | 5296 | gops->mm.bar1_bind = gk20a_mm_bar1_bind; |
5297 | gops->mm.is_bar1_supported = gk20a_mm_is_bar1_supported; | ||
5287 | } | 5298 | } |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index b5b9c52b..07ad322a 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -15,6 +15,7 @@ | |||
15 | 15 | ||
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
17 | #include "gk20a/gk20a.h" | 17 | #include "gk20a/gk20a.h" |
18 | #include "gk20a/fifo_gk20a.h" | ||
18 | #include "fifo_gm20b.h" | 19 | #include "fifo_gm20b.h" |
19 | #include "hw_ccsr_gm20b.h" | 20 | #include "hw_ccsr_gm20b.h" |
20 | #include "hw_ram_gm20b.h" | 21 | #include "hw_ram_gm20b.h" |
@@ -133,6 +134,7 @@ static void gm20b_device_info_data_parse(struct gk20a *g, | |||
133 | } | 134 | } |
134 | void gm20b_init_fifo(struct gpu_ops *gops) | 135 | void gm20b_init_fifo(struct gpu_ops *gops) |
135 | { | 136 | { |
137 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; | ||
136 | gops->fifo.bind_channel = channel_gm20b_bind; | 138 | gops->fifo.bind_channel = channel_gm20b_bind; |
137 | gops->fifo.unbind_channel = channel_gk20a_unbind; | 139 | gops->fifo.unbind_channel = channel_gk20a_unbind; |
138 | gops->fifo.disable_channel = channel_gk20a_disable; | 140 | gops->fifo.disable_channel = channel_gk20a_disable; |
@@ -142,6 +144,8 @@ void gm20b_init_fifo(struct gpu_ops *gops) | |||
142 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; | 144 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; |
143 | gops->fifo.channel_set_priority = gk20a_channel_set_priority; | 145 | gops->fifo.channel_set_priority = gk20a_channel_set_priority; |
144 | gops->fifo.channel_set_timeslice = gk20a_channel_set_timeslice; | 146 | gops->fifo.channel_set_timeslice = gk20a_channel_set_timeslice; |
147 | gops->fifo.userd_gp_get = gk20a_userd_gp_get; | ||
148 | gops->fifo.userd_gp_put = gk20a_userd_gp_put; | ||
145 | 149 | ||
146 | gops->fifo.preempt_channel = gk20a_fifo_preempt_channel; | 150 | gops->fifo.preempt_channel = gk20a_fifo_preempt_channel; |
147 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; | 151 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; |
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c index 8aa14662..36d1192a 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c | |||
@@ -163,6 +163,11 @@ static int gm20b_mm_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst) | |||
163 | return retry ? -EINVAL : 0; | 163 | return retry ? -EINVAL : 0; |
164 | } | 164 | } |
165 | 165 | ||
166 | static bool gm20b_mm_is_bar1_supported(struct gk20a *g) | ||
167 | { | ||
168 | return true; | ||
169 | } | ||
170 | |||
166 | void gm20b_init_mm(struct gpu_ops *gops) | 171 | void gm20b_init_mm(struct gpu_ops *gops) |
167 | { | 172 | { |
168 | gops->mm.support_sparse = gm20b_mm_support_sparse; | 173 | gops->mm.support_sparse = gm20b_mm_support_sparse; |
@@ -186,4 +191,5 @@ void gm20b_init_mm(struct gpu_ops *gops) | |||
186 | gops->mm.init_pdb = gk20a_mm_init_pdb; | 191 | gops->mm.init_pdb = gk20a_mm_init_pdb; |
187 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; | 192 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; |
188 | gops->mm.bar1_bind = gm20b_mm_bar1_bind; | 193 | gops->mm.bar1_bind = gm20b_mm_bar1_bind; |
194 | gops->mm.is_bar1_supported = gm20b_mm_is_bar1_supported; | ||
189 | } | 195 | } |