diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 73c690fd..b717272c 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -340,7 +340,6 @@ int pmu_populate_loader_cfg(struct gk20a *g, | |||
340 | struct flcn_ucode_img *p_img = &(lsfm->ucode_img); | 340 | struct flcn_ucode_img *p_img = &(lsfm->ucode_img); |
341 | struct loader_config *ldr_cfg = | 341 | struct loader_config *ldr_cfg = |
342 | (struct loader_config *)(&p_bl_gen_desc->loader_cfg); | 342 | (struct loader_config *)(&p_bl_gen_desc->loader_cfg); |
343 | struct gk20a_platform *platform = platform_get_drvdata(g->dev); | ||
344 | u64 addr_base; | 343 | u64 addr_base; |
345 | struct pmu_ucode_desc *desc; | 344 | struct pmu_ucode_desc *desc; |
346 | u64 addr_code, addr_data; | 345 | u64 addr_code, addr_data; |
@@ -395,15 +394,6 @@ int pmu_populate_loader_cfg(struct gk20a *g, | |||
395 | ldr_cfg->argc = 1; | 394 | ldr_cfg->argc = 1; |
396 | ldr_cfg->argv = addr_args; | 395 | ldr_cfg->argv = addr_args; |
397 | 396 | ||
398 | /*Copying pmu cmdline args*/ | ||
399 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | ||
400 | clk_get_rate(platform->clk[1])); | ||
401 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); | ||
402 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_size( | ||
403 | pmu, GK20A_PMU_TRACE_BUFSIZE); | ||
404 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_base(pmu); | ||
405 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( | ||
406 | pmu, GK20A_PMU_DMAIDX_VIRT); | ||
407 | *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg); | 397 | *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg); |
408 | g->acr.pmu_args = addr_args; | 398 | g->acr.pmu_args = addr_args; |
409 | return 0; | 399 | return 0; |
@@ -1085,10 +1075,13 @@ static int bl_bootstrap(struct pmu_gk20a *pmu, | |||
1085 | int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, | 1075 | int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, |
1086 | u32 bl_sz) | 1076 | u32 bl_sz) |
1087 | { | 1077 | { |
1078 | |||
1088 | struct pmu_gk20a *pmu = &g->pmu; | 1079 | struct pmu_gk20a *pmu = &g->pmu; |
1089 | int err; | 1080 | int err; |
1081 | struct gk20a_platform *platform = platform_get_drvdata(g->dev); | ||
1090 | 1082 | ||
1091 | gk20a_dbg_fn(""); | 1083 | gk20a_dbg_fn(""); |
1084 | |||
1092 | mutex_lock(&pmu->isr_mutex); | 1085 | mutex_lock(&pmu->isr_mutex); |
1093 | pmu_reset(pmu); | 1086 | pmu_reset(pmu); |
1094 | pmu->isr_enabled = true; | 1087 | pmu->isr_enabled = true; |
@@ -1111,6 +1104,15 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc, | |||
1111 | pwr_fbif_transcfg_mem_type_physical_f() | | 1104 | pwr_fbif_transcfg_mem_type_physical_f() | |
1112 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); | 1105 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); |
1113 | 1106 | ||
1107 | /*Copying pmu cmdline args*/ | ||
1108 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | ||
1109 | clk_get_rate(platform->clk[1])); | ||
1110 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); | ||
1111 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_size( | ||
1112 | pmu, GK20A_PMU_TRACE_BUFSIZE); | ||
1113 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_base(pmu); | ||
1114 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( | ||
1115 | pmu, GK20A_PMU_DMAIDX_VIRT); | ||
1114 | pmu_copy_to_dmem(pmu, g->acr.pmu_args, | 1116 | pmu_copy_to_dmem(pmu, g->acr.pmu_args, |
1115 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), | 1117 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), |
1116 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); | 1118 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); |