diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.c | 54 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_prog.c | 2 |
3 files changed, 44 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c index ce071018..5aafa701 100644 --- a/drivers/gpu/nvgpu/clk/clk.c +++ b/drivers/gpu/nvgpu/clk/clk.c | |||
@@ -82,7 +82,6 @@ u32 clk_pmu_vin_load(struct gk20a *g) | |||
82 | 82 | ||
83 | handler.prpccall = &rpccall; | 83 | handler.prpccall = &rpccall; |
84 | handler.success = 0; | 84 | handler.success = 0; |
85 | |||
86 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, | 85 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, |
87 | PMU_COMMAND_QUEUE_LPQ, | 86 | PMU_COMMAND_QUEUE_LPQ, |
88 | clkrpc_pmucmdhandler, (void *)&handler, | 87 | clkrpc_pmucmdhandler, (void *)&handler, |
@@ -388,24 +387,42 @@ int clk_set_boot_fll_clk(struct gk20a *g) | |||
388 | struct change_fll_clk bootfllclk; | 387 | struct change_fll_clk bootfllclk; |
389 | u16 gpc2clk_clkmhz = BOOT_GPC2CLK_MHZ; | 388 | u16 gpc2clk_clkmhz = BOOT_GPC2CLK_MHZ; |
390 | u32 gpc2clk_voltuv = 0; | 389 | u32 gpc2clk_voltuv = 0; |
390 | u32 gpc2clk_voltuv_sram = 0; | ||
391 | u16 mclk_clkmhz = BOOT_MCLK_MHZ; | 391 | u16 mclk_clkmhz = BOOT_MCLK_MHZ; |
392 | u32 mclk_voltuv = 0; | 392 | u32 mclk_voltuv = 0; |
393 | u32 mclk_voltuv_sram = 0; | ||
393 | u32 voltuv = 0; | 394 | u32 voltuv = 0; |
395 | u32 voltuv_sram = 0; | ||
394 | 396 | ||
395 | mutex_init(&g->clk_pmu.changeclkmutex); | 397 | mutex_init(&g->clk_pmu.changeclkmutex); |
396 | 398 | status = clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_GPC2CLK, | |
397 | clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_GPC2CLK, &gpc2clk_clkmhz, | 399 | &gpc2clk_clkmhz, &gpc2clk_voltuv, CTRL_VOLT_DOMAIN_LOGIC); |
398 | &gpc2clk_voltuv); | 400 | if (status) |
399 | clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_MCLK, &mclk_clkmhz, | 401 | return status; |
400 | &mclk_voltuv); | 402 | status = clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_GPC2CLK, |
403 | &gpc2clk_clkmhz, &gpc2clk_voltuv_sram, CTRL_VOLT_DOMAIN_SRAM); | ||
404 | if (status) | ||
405 | return status; | ||
406 | status = clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_MCLK, | ||
407 | &mclk_clkmhz, &mclk_voltuv, CTRL_VOLT_DOMAIN_LOGIC); | ||
408 | if (status) | ||
409 | return status; | ||
410 | status = clk_domain_get_f_or_v(g, CTRL_CLK_DOMAIN_MCLK, | ||
411 | &mclk_clkmhz, &mclk_voltuv_sram, CTRL_VOLT_DOMAIN_SRAM); | ||
412 | if (status) | ||
413 | return status; | ||
401 | 414 | ||
402 | voltuv = ((gpc2clk_voltuv) > (mclk_voltuv)) ? (gpc2clk_voltuv) | 415 | voltuv = ((gpc2clk_voltuv) > (mclk_voltuv)) ? (gpc2clk_voltuv) |
403 | : (mclk_voltuv); | 416 | : (mclk_voltuv); |
404 | 417 | ||
405 | status = volt_set_voltage(g, voltuv, voltuv); | 418 | voltuv_sram = ((gpc2clk_voltuv_sram) > (mclk_voltuv_sram)) ? |
419 | (gpc2clk_voltuv_sram) : (mclk_voltuv_sram); | ||
420 | |||
421 | status = volt_set_voltage(g, voltuv, voltuv_sram); | ||
406 | if (status) | 422 | if (status) |
407 | gk20a_err(dev_from_gk20a(g), "attempt to set boot voltage failed %d", | 423 | gk20a_err(dev_from_gk20a(g), |
408 | voltuv); | 424 | "attempt to set boot voltage failed %d %d", |
425 | voltuv, voltuv_sram); | ||
409 | 426 | ||
410 | bootfllclk.api_clk_domain = CTRL_CLK_DOMAIN_GPC2CLK; | 427 | bootfllclk.api_clk_domain = CTRL_CLK_DOMAIN_GPC2CLK; |
411 | bootfllclk.clkmhz = gpc2clk_clkmhz; | 428 | bootfllclk.clkmhz = gpc2clk_clkmhz; |
@@ -413,7 +430,6 @@ int clk_set_boot_fll_clk(struct gk20a *g) | |||
413 | status = clk_program_fllclks(g, &bootfllclk); | 430 | status = clk_program_fllclks(g, &bootfllclk); |
414 | if (status) | 431 | if (status) |
415 | gk20a_err(dev_from_gk20a(g), "attempt to set boot gpc2clk failed"); | 432 | gk20a_err(dev_from_gk20a(g), "attempt to set boot gpc2clk failed"); |
416 | |||
417 | status = g->clk_pmu.clk_mclk.change(g, DEFAULT_BOOT_MCLK_SPEED); | 433 | status = g->clk_pmu.clk_mclk.change(g, DEFAULT_BOOT_MCLK_SPEED); |
418 | if (status) | 434 | if (status) |
419 | gk20a_err(dev_from_gk20a(g), "attempt to set boot mclk failed"); | 435 | gk20a_err(dev_from_gk20a(g), "attempt to set boot mclk failed"); |
@@ -436,7 +452,9 @@ u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain) | |||
436 | status = pdomain->clkdomainclkvfsearch(g, pclk, | 452 | status = pdomain->clkdomainclkvfsearch(g, pclk, |
437 | pdomain, &clkmhz, &volt, | 453 | pdomain, &clkmhz, &volt, |
438 | CLK_PROG_VFE_ENTRY_LOGIC); | 454 | CLK_PROG_VFE_ENTRY_LOGIC); |
439 | return status; | 455 | status = pdomain->clkdomainclkvfsearch(g, pclk, |
456 | pdomain, &clkmhz, &volt, | ||
457 | CLK_PROG_VFE_ENTRY_SRAM); | ||
440 | } | 458 | } |
441 | } | 459 | } |
442 | return status; | 460 | return status; |
@@ -446,23 +464,31 @@ u32 clk_domain_get_f_or_v( | |||
446 | struct gk20a *g, | 464 | struct gk20a *g, |
447 | u32 clkapidomain, | 465 | u32 clkapidomain, |
448 | u16 *pclkmhz, | 466 | u16 *pclkmhz, |
449 | u32 *pvoltuv | 467 | u32 *pvoltuv, |
468 | u8 railidx | ||
450 | ) | 469 | ) |
451 | { | 470 | { |
452 | u32 status = -EINVAL; | 471 | u32 status = -EINVAL; |
453 | struct clk_domain *pdomain; | 472 | struct clk_domain *pdomain; |
454 | u8 i; | 473 | u8 i; |
455 | struct clk_pmupstate *pclk = &g->clk_pmu; | 474 | struct clk_pmupstate *pclk = &g->clk_pmu; |
475 | u8 rail; | ||
456 | 476 | ||
457 | if ((pclkmhz == NULL) || (pvoltuv == NULL)) | 477 | if ((pclkmhz == NULL) || (pvoltuv == NULL)) |
458 | return -EINVAL; | 478 | return -EINVAL; |
459 | 479 | ||
480 | if (railidx == CTRL_VOLT_DOMAIN_LOGIC) | ||
481 | rail = CLK_PROG_VFE_ENTRY_LOGIC; | ||
482 | else if (railidx == CTRL_VOLT_DOMAIN_SRAM) | ||
483 | rail = CLK_PROG_VFE_ENTRY_SRAM; | ||
484 | else | ||
485 | return -EINVAL; | ||
486 | |||
460 | BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super), | 487 | BOARDOBJGRP_FOR_EACH(&(pclk->clk_domainobjs.super.super), |
461 | struct clk_domain *, pdomain, i) { | 488 | struct clk_domain *, pdomain, i) { |
462 | if (pdomain->api_domain == clkapidomain) { | 489 | if (pdomain->api_domain == clkapidomain) { |
463 | status = pdomain->clkdomainclkvfsearch(g, pclk, | 490 | status = pdomain->clkdomainclkvfsearch(g, pclk, |
464 | pdomain, pclkmhz, pvoltuv, | 491 | pdomain, pclkmhz, pvoltuv, rail); |
465 | CLK_PROG_VFE_ENTRY_LOGIC); | ||
466 | return status; | 492 | return status; |
467 | } | 493 | } |
468 | } | 494 | } |
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h index e54af521..2d6425b5 100644 --- a/drivers/gpu/nvgpu/clk/clk.h +++ b/drivers/gpu/nvgpu/clk/clk.h | |||
@@ -104,12 +104,12 @@ struct vbios_clocks_table_1x_hal_clock_entry { | |||
104 | 104 | ||
105 | u32 clk_pmu_vin_load(struct gk20a *g); | 105 | u32 clk_pmu_vin_load(struct gk20a *g); |
106 | u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain); | 106 | u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain); |
107 | u32 clk_domain_get_f_or_v | 107 | u32 clk_domain_get_f_or_v( |
108 | ( | ||
109 | struct gk20a *g, | 108 | struct gk20a *g, |
110 | u32 clkapidomain, | 109 | u32 clkapidomain, |
111 | u16 *pclkmhz, | 110 | u16 *pclkmhz, |
112 | u32 *pvoltuv | 111 | u32 *pvoltuv, |
112 | u8 railidx | ||
113 | ); | 113 | ); |
114 | u32 clk_domain_get_f_points( | 114 | u32 clk_domain_get_f_points( |
115 | struct gk20a *g, | 115 | struct gk20a *g, |
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c index 9fdd8b25..6b81650e 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.c +++ b/drivers/gpu/nvgpu/clk/clk_prog.c | |||
@@ -886,7 +886,7 @@ static u32 vflookup_prog_1x_master | |||
886 | pvfentry = (struct ctrl_clk_clk_prog_1x_master_vf_entry *)( | 886 | pvfentry = (struct ctrl_clk_clk_prog_1x_master_vf_entry *)( |
887 | (u8 *)pvfentry + | 887 | (u8 *)pvfentry + |
888 | (sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * | 888 | (sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * |
889 | (rail+1))); | 889 | rail)); |
890 | 890 | ||
891 | clkmhz = *pclkmhz; | 891 | clkmhz = *pclkmhz; |
892 | voltuv = *pvoltuv; | 892 | voltuv = *pvoltuv; |