diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 47 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 46 |
4 files changed, 107 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 58020d41..b4589eaa 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -838,10 +838,12 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g) | |||
838 | return 0; | 838 | return 0; |
839 | } | 839 | } |
840 | 840 | ||
841 | static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) | 841 | static void gk20a_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) |
842 | { | 842 | { |
843 | /* These are all errors which indicate something really wrong | 843 | /* |
844 | * going on in the device. */ | 844 | * These are all errors which indicate something really wrong |
845 | * going on in the device | ||
846 | */ | ||
845 | f->intr.pbdma.device_fatal_0 = | 847 | f->intr.pbdma.device_fatal_0 = |
846 | pbdma_intr_0_memreq_pending_f() | | 848 | pbdma_intr_0_memreq_pending_f() | |
847 | pbdma_intr_0_memack_timeout_pending_f() | | 849 | pbdma_intr_0_memack_timeout_pending_f() | |
@@ -858,9 +860,11 @@ static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) | |||
858 | pbdma_intr_0_xbarconnect_pending_f() | | 860 | pbdma_intr_0_xbarconnect_pending_f() | |
859 | pbdma_intr_0_pri_pending_f(); | 861 | pbdma_intr_0_pri_pending_f(); |
860 | 862 | ||
861 | /* These are data parsing, framing errors or others which can be | 863 | /* |
864 | * These are data parsing, framing errors or others which can be | ||
862 | * recovered from with intervention... or just resetting the | 865 | * recovered from with intervention... or just resetting the |
863 | * channel. */ | 866 | * channel |
867 | */ | ||
864 | f->intr.pbdma.channel_fatal_0 = | 868 | f->intr.pbdma.channel_fatal_0 = |
865 | pbdma_intr_0_gpfifo_pending_f() | | 869 | pbdma_intr_0_gpfifo_pending_f() | |
866 | pbdma_intr_0_gpptr_pending_f() | | 870 | pbdma_intr_0_gpptr_pending_f() | |
@@ -874,8 +878,7 @@ static void gk20a_init_fifo_pbdma_intr_descs(struct fifo_gk20a *f) | |||
874 | pbdma_intr_0_pbseg_pending_f() | | 878 | pbdma_intr_0_pbseg_pending_f() | |
875 | pbdma_intr_0_signature_pending_f(); | 879 | pbdma_intr_0_signature_pending_f(); |
876 | 880 | ||
877 | /* Can be used for sw-methods, or represents | 881 | /* Can be used for sw-methods, or represents a recoverable timeout. */ |
878 | * a recoverable timeout. */ | ||
879 | f->intr.pbdma.restartable_0 = | 882 | f->intr.pbdma.restartable_0 = |
880 | pbdma_intr_0_device_pending_f(); | 883 | pbdma_intr_0_device_pending_f(); |
881 | } | 884 | } |
@@ -898,7 +901,8 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g) | |||
898 | 901 | ||
899 | nvgpu_mutex_init(&f->intr.isr.mutex); | 902 | nvgpu_mutex_init(&f->intr.isr.mutex); |
900 | nvgpu_mutex_init(&f->gr_reset_mutex); | 903 | nvgpu_mutex_init(&f->gr_reset_mutex); |
901 | gk20a_init_fifo_pbdma_intr_descs(f); /* just filling in data/tables */ | 904 | |
905 | g->ops.fifo.init_pbdma_intr_descs(f); /* just filling in data/tables */ | ||
902 | 906 | ||
903 | f->num_channels = g->ops.fifo.get_num_fifos(g); | 907 | f->num_channels = g->ops.fifo.get_num_fifos(g); |
904 | f->runlist_entry_size = g->ops.fifo.runlist_entry_size(); | 908 | f->runlist_entry_size = g->ops.fifo.runlist_entry_size(); |
@@ -3824,4 +3828,5 @@ void gk20a_init_fifo(struct gpu_ops *gops) | |||
3824 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; | 3828 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; |
3825 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; | 3829 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; |
3826 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; | 3830 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; |
3831 | gops->fifo.init_pbdma_intr_descs = gk20a_fifo_init_pbdma_intr_descs; | ||
3827 | } | 3832 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 8d03cc9a..817315e7 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -454,6 +454,7 @@ struct gpu_ops { | |||
454 | unsigned int id_type, unsigned int timeout_rc_type); | 454 | unsigned int id_type, unsigned int timeout_rc_type); |
455 | int (*preempt_ch_tsg)(struct gk20a *g, u32 id, | 455 | int (*preempt_ch_tsg)(struct gk20a *g, u32 id, |
456 | unsigned int id_type, unsigned int timeout_rc_type); | 456 | unsigned int id_type, unsigned int timeout_rc_type); |
457 | void (*init_pbdma_intr_descs)(struct fifo_gk20a *f); | ||
457 | } fifo; | 458 | } fifo; |
458 | struct pmu_v { | 459 | struct pmu_v { |
459 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 460 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 0c270910..5a0bd39e 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> | 26 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> |
27 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> | 27 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> |
28 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> | 28 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> |
29 | #include <nvgpu/hw/gm20b/hw_pbdma_gm20b.h> | ||
29 | 30 | ||
30 | static void channel_gm20b_bind(struct channel_gk20a *c) | 31 | static void channel_gm20b_bind(struct channel_gk20a *c) |
31 | { | 32 | { |
@@ -138,6 +139,51 @@ static void gm20b_device_info_data_parse(struct gk20a *g, | |||
138 | gk20a_err(g->dev, "unknown device_info_data %d", | 139 | gk20a_err(g->dev, "unknown device_info_data %d", |
139 | top_device_info_data_type_v(table_entry)); | 140 | top_device_info_data_type_v(table_entry)); |
140 | } | 141 | } |
142 | |||
143 | static void gm20b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) | ||
144 | { | ||
145 | /* | ||
146 | * These are all errors which indicate something really wrong | ||
147 | * going on in the device. | ||
148 | */ | ||
149 | f->intr.pbdma.device_fatal_0 = | ||
150 | pbdma_intr_0_memreq_pending_f() | | ||
151 | pbdma_intr_0_memack_timeout_pending_f() | | ||
152 | pbdma_intr_0_memack_extra_pending_f() | | ||
153 | pbdma_intr_0_memdat_timeout_pending_f() | | ||
154 | pbdma_intr_0_memdat_extra_pending_f() | | ||
155 | pbdma_intr_0_memflush_pending_f() | | ||
156 | pbdma_intr_0_memop_pending_f() | | ||
157 | pbdma_intr_0_lbconnect_pending_f() | | ||
158 | pbdma_intr_0_lback_timeout_pending_f() | | ||
159 | pbdma_intr_0_lback_extra_pending_f() | | ||
160 | pbdma_intr_0_lbdat_timeout_pending_f() | | ||
161 | pbdma_intr_0_lbdat_extra_pending_f() | | ||
162 | pbdma_intr_0_pri_pending_f(); | ||
163 | |||
164 | /* | ||
165 | * These are data parsing, framing errors or others which can be | ||
166 | * recovered from with intervention... or just resetting the | ||
167 | * channel | ||
168 | */ | ||
169 | f->intr.pbdma.channel_fatal_0 = | ||
170 | pbdma_intr_0_gpfifo_pending_f() | | ||
171 | pbdma_intr_0_gpptr_pending_f() | | ||
172 | pbdma_intr_0_gpentry_pending_f() | | ||
173 | pbdma_intr_0_gpcrc_pending_f() | | ||
174 | pbdma_intr_0_pbptr_pending_f() | | ||
175 | pbdma_intr_0_pbentry_pending_f() | | ||
176 | pbdma_intr_0_pbcrc_pending_f() | | ||
177 | pbdma_intr_0_method_pending_f() | | ||
178 | pbdma_intr_0_methodcrc_pending_f() | | ||
179 | pbdma_intr_0_pbseg_pending_f() | | ||
180 | pbdma_intr_0_signature_pending_f(); | ||
181 | |||
182 | /* Can be used for sw-methods, or represents a recoverable timeout. */ | ||
183 | f->intr.pbdma.restartable_0 = | ||
184 | pbdma_intr_0_device_pending_f(); | ||
185 | } | ||
186 | |||
141 | void gm20b_init_fifo(struct gpu_ops *gops) | 187 | void gm20b_init_fifo(struct gpu_ops *gops) |
142 | { | 188 | { |
143 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; | 189 | gops->fifo.init_fifo_setup_hw = gk20a_init_fifo_setup_hw; |
@@ -176,4 +222,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) | |||
176 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; | 222 | gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc; |
177 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; | 223 | gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask; |
178 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; | 224 | gops->fifo.is_preempt_pending = gk20a_fifo_is_preempt_pending; |
225 | gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; | ||
179 | } | 226 | } |
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index d458d00b..77ea1b47 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |||
@@ -230,6 +230,51 @@ static void gp10b_device_info_data_parse(struct gk20a *g, u32 table_entry, | |||
230 | top_device_info_data_type_v(table_entry)); | 230 | top_device_info_data_type_v(table_entry)); |
231 | } | 231 | } |
232 | 232 | ||
233 | static void gp10b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) | ||
234 | { | ||
235 | /* | ||
236 | * These are all errors which indicate something really wrong | ||
237 | * going on in the device | ||
238 | */ | ||
239 | f->intr.pbdma.device_fatal_0 = | ||
240 | pbdma_intr_0_memreq_pending_f() | | ||
241 | pbdma_intr_0_memack_timeout_pending_f() | | ||
242 | pbdma_intr_0_memack_extra_pending_f() | | ||
243 | pbdma_intr_0_memdat_timeout_pending_f() | | ||
244 | pbdma_intr_0_memdat_extra_pending_f() | | ||
245 | pbdma_intr_0_memflush_pending_f() | | ||
246 | pbdma_intr_0_memop_pending_f() | | ||
247 | pbdma_intr_0_lbconnect_pending_f() | | ||
248 | pbdma_intr_0_lback_timeout_pending_f() | | ||
249 | pbdma_intr_0_lback_extra_pending_f() | | ||
250 | pbdma_intr_0_lbdat_timeout_pending_f() | | ||
251 | pbdma_intr_0_lbdat_extra_pending_f() | | ||
252 | pbdma_intr_0_pri_pending_f(); | ||
253 | |||
254 | /* | ||
255 | * These are data parsing, framing errors or others which can be | ||
256 | * recovered from with intervention... or just resetting the | ||
257 | * channel | ||
258 | */ | ||
259 | f->intr.pbdma.channel_fatal_0 = | ||
260 | pbdma_intr_0_gpfifo_pending_f() | | ||
261 | pbdma_intr_0_gpptr_pending_f() | | ||
262 | pbdma_intr_0_gpentry_pending_f() | | ||
263 | pbdma_intr_0_gpcrc_pending_f() | | ||
264 | pbdma_intr_0_pbptr_pending_f() | | ||
265 | pbdma_intr_0_pbentry_pending_f() | | ||
266 | pbdma_intr_0_pbcrc_pending_f() | | ||
267 | pbdma_intr_0_method_pending_f() | | ||
268 | pbdma_intr_0_methodcrc_pending_f() | | ||
269 | pbdma_intr_0_pbseg_pending_f() | | ||
270 | pbdma_intr_0_syncpoint_illegal_pending_f() | | ||
271 | pbdma_intr_0_signature_pending_f(); | ||
272 | |||
273 | /* Can be used for sw-methods, or represents a recoverable timeout. */ | ||
274 | f->intr.pbdma.restartable_0 = | ||
275 | pbdma_intr_0_device_pending_f(); | ||
276 | } | ||
277 | |||
233 | void gp10b_init_fifo(struct gpu_ops *gops) | 278 | void gp10b_init_fifo(struct gpu_ops *gops) |
234 | { | 279 | { |
235 | gm20b_init_fifo(gops); | 280 | gm20b_init_fifo(gops); |
@@ -240,4 +285,5 @@ void gp10b_init_fifo(struct gpu_ops *gops) | |||
240 | gops->fifo.device_info_data_parse = gp10b_device_info_data_parse; | 285 | gops->fifo.device_info_data_parse = gp10b_device_info_data_parse; |
241 | gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v; | 286 | gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v; |
242 | gops->fifo.device_info_fault_id = top_device_info_data_fault_id_enum_v; | 287 | gops->fifo.device_info_fault_id = top_device_info_data_fault_id_enum_v; |
288 | gops->fifo.init_pbdma_intr_descs = gp10b_fifo_init_pbdma_intr_descs; | ||
243 | } | 289 | } |