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-rw-r--r--drivers/gpu/nvgpu/common/pmu/pmu.c14
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/pmu.h3
2 files changed, 13 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c
index b9cfd033..8d051e5a 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -167,6 +167,9 @@ void nvgpu_kill_task_pg_init(struct gk20a *g)
167 nvgpu_udelay(2); 167 nvgpu_udelay(2);
168 } while (nvgpu_timeout_expired_msg(&timeout, 168 } while (nvgpu_timeout_expired_msg(&timeout,
169 "timeout - waiting PMU state machine thread stop") == 0); 169 "timeout - waiting PMU state machine thread stop") == 0);
170
171 /* Reset the flag for next time */
172 pmu->pg_init.state_destroy = false;
170 } else { 173 } else {
171 nvgpu_thread_join(&pmu->pg_init.state_task); 174 nvgpu_thread_join(&pmu->pg_init.state_task);
172 } 175 }
@@ -468,9 +471,14 @@ void nvgpu_pmu_state_change(struct gk20a *g, u32 pmu_state,
468 471
469 pmu->pmu_state = pmu_state; 472 pmu->pmu_state = pmu_state;
470 473
474 /* Set a sticky flag to indicate PMU state exit */
475 if (pmu_state == PMU_STATE_EXIT) {
476 pmu->pg_init.state_destroy = true;
477 }
478
471 if (post_change_event) { 479 if (post_change_event) {
472 pmu->pg_init.state_change = true; 480 pmu->pg_init.state_change = true;
473 nvgpu_cond_signal(&pmu->pg_init.wq); 481 nvgpu_cond_signal_interruptible(&pmu->pg_init.wq);
474 } 482 }
475 483
476 /* make status visible */ 484 /* make status visible */
@@ -494,7 +502,7 @@ static int nvgpu_pg_init_task(void *arg)
494 pmu->pg_init.state_change = false; 502 pmu->pg_init.state_change = false;
495 pmu_state = NV_ACCESS_ONCE(pmu->pmu_state); 503 pmu_state = NV_ACCESS_ONCE(pmu->pmu_state);
496 504
497 if (pmu_state == PMU_STATE_EXIT) { 505 if (pmu->pg_init.state_destroy) {
498 nvgpu_pmu_dbg(g, "pmu state exit"); 506 nvgpu_pmu_dbg(g, "pmu state exit");
499 break; 507 break;
500 } 508 }
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
index 00194ec0..dcd49481 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -301,6 +301,7 @@ struct pmu_sequence {
301 301
302struct nvgpu_pg_init { 302struct nvgpu_pg_init {
303 bool state_change; 303 bool state_change;
304 bool state_destroy;
304 struct nvgpu_cond wq; 305 struct nvgpu_cond wq;
305 struct nvgpu_thread state_task; 306 struct nvgpu_thread state_task;
306}; 307};