diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/common/semaphore.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/semaphore.h | 23 |
2 files changed, 31 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/common/semaphore.c b/drivers/gpu/nvgpu/common/semaphore.c index 7c9bf9da..ba240449 100644 --- a/drivers/gpu/nvgpu/common/semaphore.c +++ b/drivers/gpu/nvgpu/common/semaphore.c | |||
@@ -94,7 +94,7 @@ struct nvgpu_semaphore_sea *nvgpu_semaphore_sea_create(struct gk20a *g) | |||
94 | g->sema_sea->size = 0; | 94 | g->sema_sea->size = 0; |
95 | g->sema_sea->page_count = 0; | 95 | g->sema_sea->page_count = 0; |
96 | g->sema_sea->gk20a = g; | 96 | g->sema_sea->gk20a = g; |
97 | INIT_LIST_HEAD(&g->sema_sea->pool_list); | 97 | nvgpu_init_list_node(&g->sema_sea->pool_list); |
98 | if (nvgpu_mutex_init(&g->sema_sea->sea_lock)) | 98 | if (nvgpu_mutex_init(&g->sema_sea->sea_lock)) |
99 | goto cleanup_free; | 99 | goto cleanup_free; |
100 | 100 | ||
@@ -157,11 +157,12 @@ struct nvgpu_semaphore_pool *nvgpu_semaphore_pool_alloc( | |||
157 | p->ro_sg_table = sea->ro_sg_table; | 157 | p->ro_sg_table = sea->ro_sg_table; |
158 | p->page_idx = page_idx; | 158 | p->page_idx = page_idx; |
159 | p->sema_sea = sea; | 159 | p->sema_sea = sea; |
160 | INIT_LIST_HEAD(&p->hw_semas); | 160 | nvgpu_init_list_node(&p->hw_semas); |
161 | nvgpu_init_list_node(&p->pool_list_entry); | ||
161 | kref_init(&p->ref); | 162 | kref_init(&p->ref); |
162 | 163 | ||
163 | sea->page_count++; | 164 | sea->page_count++; |
164 | list_add(&p->pool_list_entry, &sea->pool_list); | 165 | nvgpu_list_add(&p->pool_list_entry, &sea->pool_list); |
165 | __unlock_sema_sea(sea); | 166 | __unlock_sema_sea(sea); |
166 | 167 | ||
167 | gpu_sema_dbg("Allocated semaphore pool: page-idx=%d", p->page_idx); | 168 | gpu_sema_dbg("Allocated semaphore pool: page-idx=%d", p->page_idx); |
@@ -300,7 +301,8 @@ void nvgpu_semaphore_pool_unmap(struct nvgpu_semaphore_pool *p, | |||
300 | nvgpu_kfree(p->sema_sea->gk20a, p->rw_sg_table); | 301 | nvgpu_kfree(p->sema_sea->gk20a, p->rw_sg_table); |
301 | p->rw_sg_table = NULL; | 302 | p->rw_sg_table = NULL; |
302 | 303 | ||
303 | list_for_each_entry(hw_sema, &p->hw_semas, hw_sema_list) | 304 | nvgpu_list_for_each_entry(hw_sema, &p->hw_semas, |
305 | nvgpu_semaphore_int, hw_sema_list) | ||
304 | /* | 306 | /* |
305 | * Make sure the mem addresses are all NULL so if this gets | 307 | * Make sure the mem addresses are all NULL so if this gets |
306 | * reused we will fault. | 308 | * reused we will fault. |
@@ -324,12 +326,13 @@ static void nvgpu_semaphore_pool_free(struct kref *ref) | |||
324 | WARN_ON(p->gpu_va || p->rw_sg_table || p->ro_sg_table); | 326 | WARN_ON(p->gpu_va || p->rw_sg_table || p->ro_sg_table); |
325 | 327 | ||
326 | __lock_sema_sea(s); | 328 | __lock_sema_sea(s); |
327 | list_del(&p->pool_list_entry); | 329 | nvgpu_list_del(&p->pool_list_entry); |
328 | clear_bit(p->page_idx, s->pools_alloced); | 330 | clear_bit(p->page_idx, s->pools_alloced); |
329 | s->page_count--; | 331 | s->page_count--; |
330 | __unlock_sema_sea(s); | 332 | __unlock_sema_sea(s); |
331 | 333 | ||
332 | list_for_each_entry_safe(hw_sema, tmp, &p->hw_semas, hw_sema_list) | 334 | nvgpu_list_for_each_entry_safe(hw_sema, tmp, &p->hw_semas, |
335 | nvgpu_semaphore_int, hw_sema_list) | ||
333 | nvgpu_kfree(p->sema_sea->gk20a, hw_sema); | 336 | nvgpu_kfree(p->sema_sea->gk20a, hw_sema); |
334 | 337 | ||
335 | nvgpu_mutex_destroy(&p->pool_lock); | 338 | nvgpu_mutex_destroy(&p->pool_lock); |
@@ -393,8 +396,9 @@ static int __nvgpu_init_hw_sema(struct channel_gk20a *ch) | |||
393 | atomic_set(&hw_sema->next_value, 0); | 396 | atomic_set(&hw_sema->next_value, 0); |
394 | hw_sema->value = p->cpu_va + hw_sema->offset; | 397 | hw_sema->value = p->cpu_va + hw_sema->offset; |
395 | writel(0, hw_sema->value); | 398 | writel(0, hw_sema->value); |
399 | nvgpu_init_list_node(&hw_sema->hw_sema_list); | ||
396 | 400 | ||
397 | list_add(&hw_sema->hw_sema_list, &p->hw_semas); | 401 | nvgpu_list_add(&hw_sema->hw_sema_list, &p->hw_semas); |
398 | 402 | ||
399 | nvgpu_mutex_release(&p->pool_lock); | 403 | nvgpu_mutex_release(&p->pool_lock); |
400 | 404 | ||
@@ -421,7 +425,7 @@ void nvgpu_semaphore_free_hw_sema(struct channel_gk20a *ch) | |||
421 | clear_bit(ch->hw_sema->idx, p->semas_alloced); | 425 | clear_bit(ch->hw_sema->idx, p->semas_alloced); |
422 | 426 | ||
423 | /* Make sure that when the ch is re-opened it will get a new HW sema. */ | 427 | /* Make sure that when the ch is re-opened it will get a new HW sema. */ |
424 | list_del(&ch->hw_sema->hw_sema_list); | 428 | nvgpu_list_del(&ch->hw_sema->hw_sema_list); |
425 | nvgpu_kfree(ch->g, ch->hw_sema); | 429 | nvgpu_kfree(ch->g, ch->hw_sema); |
426 | ch->hw_sema = NULL; | 430 | ch->hw_sema = NULL; |
427 | 431 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h index 285fcdeb..d395940d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/semaphore.h +++ b/drivers/gpu/nvgpu/include/nvgpu/semaphore.h | |||
@@ -53,7 +53,14 @@ struct nvgpu_semaphore_int { | |||
53 | u32 nr_incrs; /* Number of increments programmed. */ | 53 | u32 nr_incrs; /* Number of increments programmed. */ |
54 | struct nvgpu_semaphore_pool *p; /* Pool that owns this sema. */ | 54 | struct nvgpu_semaphore_pool *p; /* Pool that owns this sema. */ |
55 | struct channel_gk20a *ch; /* Channel that owns this sema. */ | 55 | struct channel_gk20a *ch; /* Channel that owns this sema. */ |
56 | struct list_head hw_sema_list; /* List of HW semaphores. */ | 56 | struct nvgpu_list_node hw_sema_list; /* List of HW semaphores. */ |
57 | }; | ||
58 | |||
59 | static inline struct nvgpu_semaphore_int * | ||
60 | nvgpu_semaphore_int_from_hw_sema_list(struct nvgpu_list_node *node) | ||
61 | { | ||
62 | return (struct nvgpu_semaphore_int *) | ||
63 | ((uintptr_t)node - offsetof(struct nvgpu_semaphore_int, hw_sema_list)); | ||
57 | }; | 64 | }; |
58 | 65 | ||
59 | /* | 66 | /* |
@@ -75,13 +82,13 @@ struct nvgpu_semaphore { | |||
75 | */ | 82 | */ |
76 | struct nvgpu_semaphore_pool { | 83 | struct nvgpu_semaphore_pool { |
77 | struct page *page; /* This pool's page of memory */ | 84 | struct page *page; /* This pool's page of memory */ |
78 | struct list_head pool_list_entry; /* Node for list of pools. */ | 85 | struct nvgpu_list_node pool_list_entry; /* Node for list of pools. */ |
79 | void *cpu_va; /* CPU access to the pool. */ | 86 | void *cpu_va; /* CPU access to the pool. */ |
80 | u64 gpu_va; /* GPU access to the pool. */ | 87 | u64 gpu_va; /* GPU access to the pool. */ |
81 | u64 gpu_va_ro; /* GPU access to the pool. */ | 88 | u64 gpu_va_ro; /* GPU access to the pool. */ |
82 | int page_idx; /* Index into sea bitmap. */ | 89 | int page_idx; /* Index into sea bitmap. */ |
83 | 90 | ||
84 | struct list_head hw_semas; /* List of HW semas. */ | 91 | struct nvgpu_list_node hw_semas; /* List of HW semas. */ |
85 | DECLARE_BITMAP(semas_alloced, PAGE_SIZE / SEMAPHORE_SIZE); | 92 | DECLARE_BITMAP(semas_alloced, PAGE_SIZE / SEMAPHORE_SIZE); |
86 | 93 | ||
87 | struct nvgpu_semaphore_sea *sema_sea; /* Sea that owns this pool. */ | 94 | struct nvgpu_semaphore_sea *sema_sea; /* Sea that owns this pool. */ |
@@ -110,6 +117,14 @@ struct nvgpu_semaphore_pool { | |||
110 | struct kref ref; | 117 | struct kref ref; |
111 | }; | 118 | }; |
112 | 119 | ||
120 | static inline struct nvgpu_semaphore_pool * | ||
121 | nvgpu_semaphore_pool_from_pool_list_entry(struct nvgpu_list_node *node) | ||
122 | { | ||
123 | return (struct nvgpu_semaphore_pool *) | ||
124 | ((uintptr_t)node - | ||
125 | offsetof(struct nvgpu_semaphore_pool, pool_list_entry)); | ||
126 | }; | ||
127 | |||
113 | /* | 128 | /* |
114 | * A sea of semaphores pools. Each pool is owned by a single VM. Since multiple | 129 | * A sea of semaphores pools. Each pool is owned by a single VM. Since multiple |
115 | * channels can share a VM each channel gets it's own HW semaphore from the | 130 | * channels can share a VM each channel gets it's own HW semaphore from the |
@@ -117,7 +132,7 @@ struct nvgpu_semaphore_pool { | |||
117 | * signifies when a particular job is done. | 132 | * signifies when a particular job is done. |
118 | */ | 133 | */ |
119 | struct nvgpu_semaphore_sea { | 134 | struct nvgpu_semaphore_sea { |
120 | struct list_head pool_list; /* List of pools in this sea. */ | 135 | struct nvgpu_list_node pool_list; /* List of pools in this sea. */ |
121 | struct gk20a *gk20a; | 136 | struct gk20a *gk20a; |
122 | 137 | ||
123 | size_t size; /* Number of pages available. */ | 138 | size_t size; /* Number of pages available. */ |