diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 33 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mm_gv100.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/mm_gv100.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mm_gv11b.c | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mm_gv11b.h | 17 |
6 files changed, 86 insertions, 40 deletions
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index a2a131da..74bc48fb 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -31,11 +31,13 @@ | |||
31 | #include "gk20a/flcn_gk20a.h" | 31 | #include "gk20a/flcn_gk20a.h" |
32 | #include "gk20a/regops_gk20a.h" | 32 | #include "gk20a/regops_gk20a.h" |
33 | #include "gk20a/fb_gk20a.h" | 33 | #include "gk20a/fb_gk20a.h" |
34 | #include "gk20a/mm_gk20a.h" | ||
34 | 35 | ||
35 | #include "gm20b/ltc_gm20b.h" | 36 | #include "gm20b/ltc_gm20b.h" |
36 | #include "gm20b/gr_gm20b.h" | 37 | #include "gm20b/gr_gm20b.h" |
37 | #include "gm20b/fifo_gm20b.h" | 38 | #include "gm20b/fifo_gm20b.h" |
38 | #include "gm20b/fb_gm20b.h" | 39 | #include "gm20b/fb_gm20b.h" |
40 | #include "gm20b/mm_gm20b.h" | ||
39 | 41 | ||
40 | #include "gp10b/fb_gp10b.h" | 42 | #include "gp10b/fb_gp10b.h" |
41 | 43 | ||
@@ -55,6 +57,7 @@ | |||
55 | #include "gp10b/priv_ring_gp10b.h" | 57 | #include "gp10b/priv_ring_gp10b.h" |
56 | #include "gp10b/fifo_gp10b.h" | 58 | #include "gp10b/fifo_gp10b.h" |
57 | #include "gp10b/fecs_trace_gp10b.h" | 59 | #include "gp10b/fecs_trace_gp10b.h" |
60 | #include "gp10b/mm_gp10b.h" | ||
58 | 61 | ||
59 | #include "gv11b/hal_gv11b.h" | 62 | #include "gv11b/hal_gv11b.h" |
60 | #include "gv11b/gr_gv11b.h" | 63 | #include "gv11b/gr_gv11b.h" |
@@ -63,7 +66,7 @@ | |||
63 | #include "gv11b/gv11b.h" | 66 | #include "gv11b/gv11b.h" |
64 | #include "gv11b/ce_gv11b.h" | 67 | #include "gv11b/ce_gv11b.h" |
65 | #include "gv100/gr_ctx_gv100.h" | 68 | #include "gv100/gr_ctx_gv100.h" |
66 | #include "gv100/mm_gv100.h" | 69 | #include "gv11b/mm_gv11b.h" |
67 | #include "gv11b/pmu_gv11b.h" | 70 | #include "gv11b/pmu_gv11b.h" |
68 | #include "gv11b/fb_gv11b.h" | 71 | #include "gv11b/fb_gv11b.h" |
69 | #include "gv11b/fifo_gv11b.h" | 72 | #include "gv11b/fifo_gv11b.h" |
@@ -74,6 +77,7 @@ | |||
74 | #include "gv100.h" | 77 | #include "gv100.h" |
75 | #include "hal_gv100.h" | 78 | #include "hal_gv100.h" |
76 | #include "gv100/fb_gv100.h" | 79 | #include "gv100/fb_gv100.h" |
80 | #include "gv100/mm_gv100.h" | ||
77 | 81 | ||
78 | #include <nvgpu/debug.h> | 82 | #include <nvgpu/debug.h> |
79 | #include <nvgpu/enabled.h> | 83 | #include <nvgpu/enabled.h> |
@@ -310,6 +314,32 @@ static const struct gpu_ops gv100_ops = { | |||
310 | .max_entries = gk20a_gr_max_entries, | 314 | .max_entries = gk20a_gr_max_entries, |
311 | }, | 315 | }, |
312 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 316 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
317 | .mm = { | ||
318 | .support_sparse = gm20b_mm_support_sparse, | ||
319 | .gmmu_map = gk20a_locked_gmmu_map, | ||
320 | .gmmu_unmap = gk20a_locked_gmmu_unmap, | ||
321 | .vm_bind_channel = gk20a_vm_bind_channel, | ||
322 | .fb_flush = gk20a_mm_fb_flush, | ||
323 | .l2_invalidate = gk20a_mm_l2_invalidate, | ||
324 | .l2_flush = gv11b_mm_l2_flush, | ||
325 | .cbc_clean = gk20a_mm_cbc_clean, | ||
326 | .set_big_page_size = gm20b_mm_set_big_page_size, | ||
327 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, | ||
328 | .get_default_big_page_size = gp10b_mm_get_default_big_page_size, | ||
329 | .gpu_phys_addr = gv11b_gpu_phys_addr, | ||
330 | .get_physical_addr_bits = NULL, | ||
331 | .get_mmu_levels = gp10b_mm_get_mmu_levels, | ||
332 | .get_vidmem_size = gv100_mm_get_vidmem_size, | ||
333 | .init_pdb = gp10b_mm_init_pdb, | ||
334 | .init_mm_setup_hw = gv11b_init_mm_setup_hw, | ||
335 | .is_bar1_supported = gv11b_mm_is_bar1_supported, | ||
336 | .init_inst_block = gv11b_init_inst_block, | ||
337 | .mmu_fault_pending = gv11b_mm_mmu_fault_pending, | ||
338 | .init_bar2_vm = gb10b_init_bar2_vm, | ||
339 | .init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup, | ||
340 | .remove_bar2_vm = gv11b_mm_remove_bar2_vm, | ||
341 | .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, | ||
342 | }, | ||
313 | .pramin = { | 343 | .pramin = { |
314 | .enter = gk20a_pramin_enter, | 344 | .enter = gk20a_pramin_enter, |
315 | .exit = gk20a_pramin_exit, | 345 | .exit = gk20a_pramin_exit, |
@@ -446,7 +476,6 @@ int gv100_init_hal(struct gk20a *g) | |||
446 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; | 476 | g->bootstrap_owner = LSF_FALCON_ID_SEC2; |
447 | 477 | ||
448 | gv11b_init_gr(g); | 478 | gv11b_init_gr(g); |
449 | gv100_init_mm(gops); | ||
450 | gp106_init_pmu_ops(g); | 479 | gp106_init_pmu_ops(g); |
451 | 480 | ||
452 | gv11b_init_uncompressed_kind_map(); | 481 | gv11b_init_uncompressed_kind_map(); |
diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.c b/drivers/gpu/nvgpu/gv100/mm_gv100.c index fbc5df79..6952cb5e 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.c +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.c | |||
@@ -14,12 +14,11 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include "gk20a/gk20a.h" | 16 | #include "gk20a/gk20a.h" |
17 | #include "gv11b/mm_gv11b.h" | ||
18 | #include "gv100/mm_gv100.h" | 17 | #include "gv100/mm_gv100.h" |
19 | 18 | ||
20 | #include <nvgpu/hw/gv100/hw_fb_gv100.h> | 19 | #include <nvgpu/hw/gv100/hw_fb_gv100.h> |
21 | 20 | ||
22 | static size_t gv100_mm_get_vidmem_size(struct gk20a *g) | 21 | size_t gv100_mm_get_vidmem_size(struct gk20a *g) |
23 | { | 22 | { |
24 | u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); | 23 | u32 range = gk20a_readl(g, fb_mmu_local_memory_range_r()); |
25 | u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); | 24 | u32 mag = fb_mmu_local_memory_range_lower_mag_v(range); |
@@ -32,10 +31,3 @@ static size_t gv100_mm_get_vidmem_size(struct gk20a *g) | |||
32 | 31 | ||
33 | return bytes; | 32 | return bytes; |
34 | } | 33 | } |
35 | |||
36 | void gv100_init_mm(struct gpu_ops *gops) | ||
37 | { | ||
38 | gv11b_init_mm(gops); | ||
39 | gops->mm.get_vidmem_size = gv100_mm_get_vidmem_size; | ||
40 | gops->mm.get_physical_addr_bits = NULL; | ||
41 | } | ||
diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.h b/drivers/gpu/nvgpu/gv100/mm_gv100.h index ff1bc3df..eeab7d56 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.h +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.h | |||
@@ -16,8 +16,8 @@ | |||
16 | #ifndef MM_GV100_H | 16 | #ifndef MM_GV100_H |
17 | #define MM_GV100_H | 17 | #define MM_GV100_H |
18 | 18 | ||
19 | struct gpu_ops; | 19 | struct gk20a; |
20 | 20 | ||
21 | void gv100_init_mm(struct gpu_ops *gops); | 21 | size_t gv100_mm_get_vidmem_size(struct gk20a *g); |
22 | 22 | ||
23 | #endif | 23 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 14b7a541..f572084d 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include "gk20a/fecs_trace_gk20a.h" | 25 | #include "gk20a/fecs_trace_gk20a.h" |
26 | #include "gk20a/css_gr_gk20a.h" | 26 | #include "gk20a/css_gr_gk20a.h" |
27 | #include "gk20a/mc_gk20a.h" | 27 | #include "gk20a/mc_gk20a.h" |
28 | #include "gk20a/mm_gk20a.h" | ||
28 | #include "gk20a/dbg_gpu_gk20a.h" | 29 | #include "gk20a/dbg_gpu_gk20a.h" |
29 | #include "gk20a/bus_gk20a.h" | 30 | #include "gk20a/bus_gk20a.h" |
30 | #include "gk20a/flcn_gk20a.h" | 31 | #include "gk20a/flcn_gk20a.h" |
@@ -35,6 +36,7 @@ | |||
35 | #include "gm20b/gr_gm20b.h" | 36 | #include "gm20b/gr_gm20b.h" |
36 | #include "gm20b/fb_gm20b.h" | 37 | #include "gm20b/fb_gm20b.h" |
37 | #include "gm20b/fifo_gm20b.h" | 38 | #include "gm20b/fifo_gm20b.h" |
39 | #include "gm20b/mm_gm20b.h" | ||
38 | 40 | ||
39 | #include "gp10b/ltc_gp10b.h" | 41 | #include "gp10b/ltc_gp10b.h" |
40 | #include "gp10b/therm_gp10b.h" | 42 | #include "gp10b/therm_gp10b.h" |
@@ -44,6 +46,7 @@ | |||
44 | #include "gp10b/fifo_gp10b.h" | 46 | #include "gp10b/fifo_gp10b.h" |
45 | #include "gp10b/fecs_trace_gp10b.h" | 47 | #include "gp10b/fecs_trace_gp10b.h" |
46 | #include "gp10b/fb_gp10b.h" | 48 | #include "gp10b/fb_gp10b.h" |
49 | #include "gp10b/mm_gp10b.h" | ||
47 | 50 | ||
48 | #include "hal_gv11b.h" | 51 | #include "hal_gv11b.h" |
49 | #include "gr_gv11b.h" | 52 | #include "gr_gv11b.h" |
@@ -336,6 +339,31 @@ static const struct gpu_ops gv11b_ops = { | |||
336 | .max_entries = gk20a_gr_max_entries, | 339 | .max_entries = gk20a_gr_max_entries, |
337 | }, | 340 | }, |
338 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 341 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
342 | .mm = { | ||
343 | .support_sparse = gm20b_mm_support_sparse, | ||
344 | .gmmu_map = gk20a_locked_gmmu_map, | ||
345 | .gmmu_unmap = gk20a_locked_gmmu_unmap, | ||
346 | .vm_bind_channel = gk20a_vm_bind_channel, | ||
347 | .fb_flush = gk20a_mm_fb_flush, | ||
348 | .l2_invalidate = gk20a_mm_l2_invalidate, | ||
349 | .l2_flush = gv11b_mm_l2_flush, | ||
350 | .cbc_clean = gk20a_mm_cbc_clean, | ||
351 | .set_big_page_size = gm20b_mm_set_big_page_size, | ||
352 | .get_big_page_sizes = gm20b_mm_get_big_page_sizes, | ||
353 | .get_default_big_page_size = gp10b_mm_get_default_big_page_size, | ||
354 | .gpu_phys_addr = gv11b_gpu_phys_addr, | ||
355 | .get_physical_addr_bits = gp10b_mm_get_physical_addr_bits, | ||
356 | .get_mmu_levels = gp10b_mm_get_mmu_levels, | ||
357 | .init_pdb = gp10b_mm_init_pdb, | ||
358 | .init_mm_setup_hw = gv11b_init_mm_setup_hw, | ||
359 | .is_bar1_supported = gv11b_mm_is_bar1_supported, | ||
360 | .init_inst_block = gv11b_init_inst_block, | ||
361 | .mmu_fault_pending = gv11b_mm_mmu_fault_pending, | ||
362 | .init_bar2_vm = gb10b_init_bar2_vm, | ||
363 | .init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup, | ||
364 | .remove_bar2_vm = gv11b_mm_remove_bar2_vm, | ||
365 | .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, | ||
366 | }, | ||
339 | .therm = { | 367 | .therm = { |
340 | .init_therm_setup_hw = gp10b_init_therm_setup_hw, | 368 | .init_therm_setup_hw = gp10b_init_therm_setup_hw, |
341 | .elcg_init_idle_filters = gp10b_elcg_init_idle_filters, | 369 | .elcg_init_idle_filters = gp10b_elcg_init_idle_filters, |
@@ -432,6 +460,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
432 | gops->clock_gating = gv11b_ops.clock_gating; | 460 | gops->clock_gating = gv11b_ops.clock_gating; |
433 | gops->fifo = gv11b_ops.fifo; | 461 | gops->fifo = gv11b_ops.fifo; |
434 | gops->gr_ctx = gv11b_ops.gr_ctx; | 462 | gops->gr_ctx = gv11b_ops.gr_ctx; |
463 | gops->mm = gv11b_ops.mm; | ||
435 | gops->fecs_trace = gv11b_ops.fecs_trace; | 464 | gops->fecs_trace = gv11b_ops.fecs_trace; |
436 | gops->therm = gv11b_ops.therm; | 465 | gops->therm = gv11b_ops.therm; |
437 | gops->regops = gv11b_ops.regops; | 466 | gops->regops = gv11b_ops.regops; |
@@ -456,7 +485,6 @@ int gv11b_init_hal(struct gk20a *g) | |||
456 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); | 485 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); |
457 | 486 | ||
458 | gv11b_init_gr(g); | 487 | gv11b_init_gr(g); |
459 | gv11b_init_mm(gops); | ||
460 | gv11b_init_pmu_ops(g); | 488 | gv11b_init_pmu_ops(g); |
461 | 489 | ||
462 | gv11b_init_uncompressed_kind_map(); | 490 | gv11b_init_uncompressed_kind_map(); |
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c index 7ba8f74f..941a0bbe 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c | |||
@@ -34,12 +34,12 @@ | |||
34 | 34 | ||
35 | #define NVGPU_L3_ALLOC_BIT BIT(36) | 35 | #define NVGPU_L3_ALLOC_BIT BIT(36) |
36 | 36 | ||
37 | static bool gv11b_mm_is_bar1_supported(struct gk20a *g) | 37 | bool gv11b_mm_is_bar1_supported(struct gk20a *g) |
38 | { | 38 | { |
39 | return false; | 39 | return false; |
40 | } | 40 | } |
41 | 41 | ||
42 | static void gv11b_init_inst_block(struct nvgpu_mem *inst_block, | 42 | void gv11b_init_inst_block(struct nvgpu_mem *inst_block, |
43 | struct vm_gk20a *vm, u32 big_page_size) | 43 | struct vm_gk20a *vm, u32 big_page_size) |
44 | { | 44 | { |
45 | struct gk20a *g = gk20a_from_vm(vm); | 45 | struct gk20a *g = gk20a_from_vm(vm); |
@@ -53,12 +53,12 @@ static void gv11b_init_inst_block(struct nvgpu_mem *inst_block, | |||
53 | g->ops.mm.set_big_page_size(g, inst_block, big_page_size); | 53 | g->ops.mm.set_big_page_size(g, inst_block, big_page_size); |
54 | } | 54 | } |
55 | 55 | ||
56 | static bool gv11b_mm_mmu_fault_pending(struct gk20a *g) | 56 | bool gv11b_mm_mmu_fault_pending(struct gk20a *g) |
57 | { | 57 | { |
58 | return gv11b_fb_mmu_fault_pending(g); | 58 | return gv11b_fb_mmu_fault_pending(g); |
59 | } | 59 | } |
60 | 60 | ||
61 | static void gv11b_mm_fault_info_mem_destroy(struct gk20a *g) | 61 | void gv11b_mm_fault_info_mem_destroy(struct gk20a *g) |
62 | { | 62 | { |
63 | nvgpu_log_fn(g, " "); | 63 | nvgpu_log_fn(g, " "); |
64 | 64 | ||
@@ -174,7 +174,7 @@ static void gv11b_mm_mmu_hw_fault_buf_deinit(struct gk20a *g) | |||
174 | } | 174 | } |
175 | } | 175 | } |
176 | 176 | ||
177 | static void gv11b_mm_remove_bar2_vm(struct gk20a *g) | 177 | void gv11b_mm_remove_bar2_vm(struct gk20a *g) |
178 | { | 178 | { |
179 | struct mm_gk20a *mm = &g->mm; | 179 | struct mm_gk20a *mm = &g->mm; |
180 | 180 | ||
@@ -221,7 +221,7 @@ static int gv11b_mm_mmu_fault_setup_sw(struct gk20a *g) | |||
221 | return err; | 221 | return err; |
222 | } | 222 | } |
223 | 223 | ||
224 | static int gv11b_init_mm_setup_hw(struct gk20a *g) | 224 | int gv11b_init_mm_setup_hw(struct gk20a *g) |
225 | { | 225 | { |
226 | int err = 0; | 226 | int err = 0; |
227 | 227 | ||
@@ -260,7 +260,7 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate) | |||
260 | * checking bit 36 of the phsyical address. So if a mapping should allocte lines | 260 | * checking bit 36 of the phsyical address. So if a mapping should allocte lines |
261 | * in the L3 this bit must be set. | 261 | * in the L3 this bit must be set. |
262 | */ | 262 | */ |
263 | static u64 gv11b_gpu_phys_addr(struct gk20a *g, | 263 | u64 gv11b_gpu_phys_addr(struct gk20a *g, |
264 | struct nvgpu_gmmu_attrs *attrs, u64 phys) | 264 | struct nvgpu_gmmu_attrs *attrs, u64 phys) |
265 | { | 265 | { |
266 | if (attrs && attrs->t19x_attrs.l3_alloc) | 266 | if (attrs && attrs->t19x_attrs.l3_alloc) |
@@ -269,7 +269,7 @@ static u64 gv11b_gpu_phys_addr(struct gk20a *g, | |||
269 | return phys; | 269 | return phys; |
270 | } | 270 | } |
271 | 271 | ||
272 | static int gv11b_init_bar2_mm_hw_setup(struct gk20a *g) | 272 | int gv11b_init_bar2_mm_hw_setup(struct gk20a *g) |
273 | { | 273 | { |
274 | struct mm_gk20a *mm = &g->mm; | 274 | struct mm_gk20a *mm = &g->mm; |
275 | struct nvgpu_mem *inst_block = &mm->bar2.inst_block; | 275 | struct nvgpu_mem *inst_block = &mm->bar2.inst_block; |
@@ -318,19 +318,3 @@ static int gv11b_init_bar2_mm_hw_setup(struct gk20a *g) | |||
318 | nvgpu_err(g, "bar2 bind failed. gpu unable to access memory"); | 318 | nvgpu_err(g, "bar2 bind failed. gpu unable to access memory"); |
319 | return -EBUSY; | 319 | return -EBUSY; |
320 | } | 320 | } |
321 | |||
322 | void gv11b_init_mm(struct gpu_ops *gops) | ||
323 | { | ||
324 | gp10b_init_mm(gops); | ||
325 | gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr; | ||
326 | gops->mm.is_bar1_supported = gv11b_mm_is_bar1_supported; | ||
327 | gops->mm.init_inst_block = gv11b_init_inst_block; | ||
328 | gops->mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending; | ||
329 | gops->mm.l2_flush = gv11b_mm_l2_flush; | ||
330 | gops->mm.gpu_phys_addr = gv11b_gpu_phys_addr; | ||
331 | gops->mm.init_mm_setup_hw = gv11b_init_mm_setup_hw; | ||
332 | gops->mm.fault_info_mem_destroy = | ||
333 | gv11b_mm_fault_info_mem_destroy; | ||
334 | gops->mm.remove_bar2_vm = gv11b_mm_remove_bar2_vm; | ||
335 | gops->mm.init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup; | ||
336 | } | ||
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h index a887c7f4..12f0fe63 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h | |||
@@ -18,7 +18,20 @@ | |||
18 | #define HW_FAULT_BUF_STATUS_ALLOC_TRUE 1 | 18 | #define HW_FAULT_BUF_STATUS_ALLOC_TRUE 1 |
19 | #define HW_FAULT_BUF_STATUS_ALLOC_FALSE 0 | 19 | #define HW_FAULT_BUF_STATUS_ALLOC_FALSE 0 |
20 | 20 | ||
21 | struct gpu_ops; | 21 | struct gk20a; |
22 | struct nvgpu_mem; | ||
23 | struct vm_gk20a; | ||
24 | |||
25 | bool gv11b_mm_is_bar1_supported(struct gk20a *g); | ||
26 | void gv11b_init_inst_block(struct nvgpu_mem *inst_block, | ||
27 | struct vm_gk20a *vm, u32 big_page_size); | ||
28 | bool gv11b_mm_mmu_fault_pending(struct gk20a *g); | ||
29 | void gv11b_mm_remove_bar2_vm(struct gk20a *g); | ||
30 | int gv11b_init_mm_setup_hw(struct gk20a *g); | ||
31 | int gv11b_init_bar2_mm_hw_setup(struct gk20a *g); | ||
32 | void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate); | ||
33 | u64 gv11b_gpu_phys_addr(struct gk20a *g, | ||
34 | struct nvgpu_gmmu_attrs *attrs, u64 phys); | ||
35 | void gv11b_mm_fault_info_mem_destroy(struct gk20a *g); | ||
22 | 36 | ||
23 | void gv11b_init_mm(struct gpu_ops *gops); | ||
24 | #endif | 37 | #endif |