diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 9 |
2 files changed, 18 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h index 844cb142..9ce9448e 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gmmu_gp10b.h | |||
@@ -198,6 +198,18 @@ static inline u32 gmmu_new_pte_valid_false_f(void) | |||
198 | { | 198 | { |
199 | return 0x0; | 199 | return 0x0; |
200 | } | 200 | } |
201 | static inline u32 gmmu_new_pte_privilege_w(void) | ||
202 | { | ||
203 | return 0; | ||
204 | } | ||
205 | static inline u32 gmmu_new_pte_privilege_true_f(void) | ||
206 | { | ||
207 | return 0x20; | ||
208 | } | ||
209 | static inline u32 gmmu_new_pte_privilege_false_f(void) | ||
210 | { | ||
211 | return 0x0; | ||
212 | } | ||
201 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) | 213 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) |
202 | { | 214 | { |
203 | return (v & 0xfffffff) << 8; | 215 | return (v & 0xfffffff) << 8; |
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index 5371605f..9f66c21f 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -153,7 +153,7 @@ static int update_gmmu_pde3_locked(struct vm_gk20a *vm, | |||
153 | u64 *iova, | 153 | u64 *iova, |
154 | u32 kind_v, u32 *ctag, | 154 | u32 kind_v, u32 *ctag, |
155 | bool cacheable, bool unmapped_pte, | 155 | bool cacheable, bool unmapped_pte, |
156 | int rw_flag, bool sparse, u32 flags) | 156 | int rw_flag, bool sparse, bool priv) |
157 | { | 157 | { |
158 | u64 pte_addr = 0; | 158 | u64 pte_addr = 0; |
159 | u64 pde_addr = 0; | 159 | u64 pde_addr = 0; |
@@ -195,7 +195,7 @@ static int update_gmmu_pde0_locked(struct vm_gk20a *vm, | |||
195 | u64 *iova, | 195 | u64 *iova, |
196 | u32 kind_v, u32 *ctag, | 196 | u32 kind_v, u32 *ctag, |
197 | bool cacheable, bool unmapped_pte, | 197 | bool cacheable, bool unmapped_pte, |
198 | int rw_flag, bool sparse, u32 flags) | 198 | int rw_flag, bool sparse, bool priv) |
199 | { | 199 | { |
200 | bool small_valid, big_valid; | 200 | bool small_valid, big_valid; |
201 | u32 pte_addr_small = 0, pte_addr_big = 0; | 201 | u32 pte_addr_small = 0, pte_addr_big = 0; |
@@ -251,7 +251,7 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
251 | u64 *iova, | 251 | u64 *iova, |
252 | u32 kind_v, u32 *ctag, | 252 | u32 kind_v, u32 *ctag, |
253 | bool cacheable, bool unmapped_pte, | 253 | bool cacheable, bool unmapped_pte, |
254 | int rw_flag, bool sparse, u32 flags) | 254 | int rw_flag, bool sparse, bool priv) |
255 | { | 255 | { |
256 | struct gk20a *g = vm->mm->g; | 256 | struct gk20a *g = vm->mm->g; |
257 | u32 page_size = vm->gmmu_page_sizes[gmmu_pgsz_idx]; | 257 | u32 page_size = vm->gmmu_page_sizes[gmmu_pgsz_idx]; |
@@ -269,6 +269,9 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
269 | gmmu_new_pte_address_sys_f(*iova | 269 | gmmu_new_pte_address_sys_f(*iova |
270 | >> gmmu_new_pte_address_shift_v()); | 270 | >> gmmu_new_pte_address_shift_v()); |
271 | 271 | ||
272 | if (priv) | ||
273 | pte_w[0] |= gmmu_new_pte_privilege_true_f(); | ||
274 | |||
272 | pte_w[1] = *iova >> (24 + gmmu_new_pte_address_shift_v()) | | 275 | pte_w[1] = *iova >> (24 + gmmu_new_pte_address_shift_v()) | |
273 | gmmu_new_pte_kind_f(kind_v) | | 276 | gmmu_new_pte_kind_f(kind_v) | |
274 | gmmu_new_pte_comptagline_f(*ctag / ctag_granularity); | 277 | gmmu_new_pte_comptagline_f(*ctag / ctag_granularity); |