diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 30 |
2 files changed, 29 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 69da03e1..f70c4bb7 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -1196,7 +1196,8 @@ static int __gk20a_channel_open(struct gk20a *g, struct file *filp) | |||
1196 | return -ENOMEM; | 1196 | return -ENOMEM; |
1197 | } | 1197 | } |
1198 | 1198 | ||
1199 | trace_gk20a_channel_sched_defaults(GK20A_TP_ARGS_SCHED(ch)); | 1199 | gk20a_channel_trace_sched_param( |
1200 | trace_gk20a_channel_sched_defaults, ch); | ||
1200 | 1201 | ||
1201 | filp->private_data = ch; | 1202 | filp->private_data = ch; |
1202 | return 0; | 1203 | return 0; |
@@ -3060,8 +3061,8 @@ long gk20a_channel_ioctl(struct file *filp, | |||
3060 | gk20a_dbg(gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", | 3061 | gk20a_dbg(gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d", |
3061 | timeout, ch->hw_chid); | 3062 | timeout, ch->hw_chid); |
3062 | ch->timeout_ms_max = timeout; | 3063 | ch->timeout_ms_max = timeout; |
3063 | 3064 | gk20a_channel_trace_sched_param( | |
3064 | trace_gk20a_channel_set_timeout(GK20A_TP_ARGS_SCHED(ch)); | 3065 | trace_gk20a_channel_set_timeout, ch); |
3065 | break; | 3066 | break; |
3066 | } | 3067 | } |
3067 | case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX: | 3068 | case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX: |
@@ -3075,8 +3076,8 @@ long gk20a_channel_ioctl(struct file *filp, | |||
3075 | timeout, ch->hw_chid); | 3076 | timeout, ch->hw_chid); |
3076 | ch->timeout_ms_max = timeout; | 3077 | ch->timeout_ms_max = timeout; |
3077 | ch->timeout_debug_dump = timeout_debug_dump; | 3078 | ch->timeout_debug_dump = timeout_debug_dump; |
3078 | 3079 | gk20a_channel_trace_sched_param( | |
3079 | trace_gk20a_channel_set_timeout(GK20A_TP_ARGS_SCHED(ch)); | 3080 | trace_gk20a_channel_set_timeout, ch); |
3080 | break; | 3081 | break; |
3081 | } | 3082 | } |
3082 | case NVGPU_IOCTL_CHANNEL_GET_TIMEDOUT: | 3083 | case NVGPU_IOCTL_CHANNEL_GET_TIMEDOUT: |
@@ -3095,8 +3096,8 @@ long gk20a_channel_ioctl(struct file *filp, | |||
3095 | ((struct nvgpu_set_priority_args *)buf)->priority); | 3096 | ((struct nvgpu_set_priority_args *)buf)->priority); |
3096 | 3097 | ||
3097 | gk20a_idle(dev); | 3098 | gk20a_idle(dev); |
3098 | 3099 | gk20a_channel_trace_sched_param( | |
3099 | trace_gk20a_channel_set_priority(GK20A_TP_ARGS_SCHED(ch)); | 3100 | trace_gk20a_channel_set_priority, ch); |
3100 | break; | 3101 | break; |
3101 | case NVGPU_IOCTL_CHANNEL_ENABLE: | 3102 | case NVGPU_IOCTL_CHANNEL_ENABLE: |
3102 | err = gk20a_busy(dev); | 3103 | err = gk20a_busy(dev); |
@@ -3182,8 +3183,8 @@ long gk20a_channel_ioctl(struct file *filp, | |||
3182 | ((struct nvgpu_runlist_interleave_args *)buf)->level); | 3183 | ((struct nvgpu_runlist_interleave_args *)buf)->level); |
3183 | 3184 | ||
3184 | gk20a_idle(dev); | 3185 | gk20a_idle(dev); |
3185 | 3186 | gk20a_channel_trace_sched_param( | |
3186 | trace_gk20a_channel_set_runlist_interleave(GK20A_TP_ARGS_SCHED(ch)); | 3187 | trace_gk20a_channel_set_runlist_interleave, ch); |
3187 | break; | 3188 | break; |
3188 | case NVGPU_IOCTL_CHANNEL_SET_TIMESLICE: | 3189 | case NVGPU_IOCTL_CHANNEL_SET_TIMESLICE: |
3189 | err = gk20a_busy(dev); | 3190 | err = gk20a_busy(dev); |
@@ -3197,8 +3198,8 @@ long gk20a_channel_ioctl(struct file *filp, | |||
3197 | ((struct nvgpu_timeslice_args *)buf)->timeslice_us); | 3198 | ((struct nvgpu_timeslice_args *)buf)->timeslice_us); |
3198 | 3199 | ||
3199 | gk20a_idle(dev); | 3200 | gk20a_idle(dev); |
3200 | 3201 | gk20a_channel_trace_sched_param( | |
3201 | trace_gk20a_channel_set_timeslice(GK20A_TP_ARGS_SCHED(ch)); | 3202 | trace_gk20a_channel_set_timeslice, ch); |
3202 | break; | 3203 | break; |
3203 | case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: | 3204 | case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: |
3204 | if (ch->g->ops.gr.set_preemption_mode) { | 3205 | if (ch->g->ops.gr.set_preemption_mode) { |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 87cf2459..49da164c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1064,18 +1064,22 @@ static inline struct tsg_gk20a *tsg_gk20a_from_ch(struct channel_gk20a *ch) | |||
1064 | return tsg; | 1064 | return tsg; |
1065 | } | 1065 | } |
1066 | 1066 | ||
1067 | 1067 | static inline void gk20a_channel_trace_sched_param( | |
1068 | #define GK20A_TP_ARGS_SCHED(ch) \ | 1068 | void (*trace)(int chid, int tsgid, pid_t pid, u32 timeslice, |
1069 | ch->hw_chid, \ | 1069 | u32 timeout, const char *interleave, |
1070 | ch->tsgid, \ | 1070 | const char *graphics_preempt_mode, |
1071 | ch->pid, \ | 1071 | const char *compute_preempt_mode), |
1072 | gk20a_is_channel_marked_as_tsg(ch) ? \ | 1072 | struct channel_gk20a *ch) |
1073 | tsg_gk20a_from_ch(ch)->timeslice_us : ch->timeslice_us, \ | 1073 | { |
1074 | ch->timeout_ms_max, \ | 1074 | (trace)(ch->hw_chid, ch->tsgid, ch->pid, |
1075 | gk20a_fifo_interleave_level_name(ch->interleave_level), \ | 1075 | gk20a_is_channel_marked_as_tsg(ch) ? |
1076 | gr_gk20a_graphics_preempt_mode_name(ch->ch_ctx.gr_ctx ? \ | 1076 | tsg_gk20a_from_ch(ch)->timeslice_us : ch->timeslice_us, |
1077 | ch->ch_ctx.gr_ctx->graphics_preempt_mode : 0), \ | 1077 | ch->timeout_ms_max, |
1078 | gr_gk20a_compute_preempt_mode_name(ch->ch_ctx.gr_ctx ? \ | 1078 | gk20a_fifo_interleave_level_name(ch->interleave_level), |
1079 | ch->ch_ctx.gr_ctx->compute_preempt_mode : 0) | 1079 | gr_gk20a_graphics_preempt_mode_name(ch->ch_ctx.gr_ctx ? |
1080 | ch->ch_ctx.gr_ctx->graphics_preempt_mode : 0), | ||
1081 | gr_gk20a_compute_preempt_mode_name(ch->ch_ctx.gr_ctx ? | ||
1082 | ch->ch_ctx.gr_ctx->compute_preempt_mode : 0)); | ||
1083 | } | ||
1080 | 1084 | ||
1081 | #endif /* GK20A_H */ | 1085 | #endif /* GK20A_H */ |