diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hw_top_gp106.h | 36 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 26 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_top_gp10b.h | 36 |
3 files changed, 97 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gp106/hw_top_gp106.h b/drivers/gpu/nvgpu/gp106/hw_top_gp106.h index ed8e0888..bef6b804 100644 --- a/drivers/gpu/nvgpu/gp106/hw_top_gp106.h +++ b/drivers/gpu/nvgpu/gp106/hw_top_gp106.h | |||
@@ -158,6 +158,42 @@ static inline u32 top_device_info_entry_enum_v(void) | |||
158 | { | 158 | { |
159 | return 0x00000002; | 159 | return 0x00000002; |
160 | } | 160 | } |
161 | static inline u32 top_device_info_entry_data_v(void) | ||
162 | { | ||
163 | return 0x00000001; | ||
164 | } | ||
165 | static inline u32 top_device_info_data_type_v(u32 r) | ||
166 | { | ||
167 | return (r >> 30) & 0x1; | ||
168 | } | ||
169 | static inline u32 top_device_info_data_type_enum2_v(void) | ||
170 | { | ||
171 | return 0x00000000; | ||
172 | } | ||
173 | static inline u32 top_device_info_data_inst_id_v(u32 r) | ||
174 | { | ||
175 | return (r >> 26) & 0xf; | ||
176 | } | ||
177 | static inline u32 top_device_info_data_pri_base_v(u32 r) | ||
178 | { | ||
179 | return (r >> 12) & 0xfff; | ||
180 | } | ||
181 | static inline u32 top_device_info_data_pri_base_align_v(void) | ||
182 | { | ||
183 | return 0x0000000c; | ||
184 | } | ||
185 | static inline u32 top_device_info_data_fault_id_enum_v(u32 r) | ||
186 | { | ||
187 | return (r >> 3) & 0x1f; | ||
188 | } | ||
189 | static inline u32 top_device_info_data_fault_id_v(u32 r) | ||
190 | { | ||
191 | return (r >> 2) & 0x1; | ||
192 | } | ||
193 | static inline u32 top_device_info_data_fault_id_valid_v(void) | ||
194 | { | ||
195 | return 0x00000001; | ||
196 | } | ||
161 | static inline u32 top_scratch1_r(void) | 197 | static inline u32 top_scratch1_r(void) |
162 | { | 198 | { |
163 | return 0x0002240c; | 199 | return 0x0002240c; |
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index 45de221e..89b5527d 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |||
@@ -182,7 +182,8 @@ static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c) | |||
182 | return 0; | 182 | return 0; |
183 | } | 183 | } |
184 | 184 | ||
185 | static int gp10b_fifo_engine_enum_from_type(struct gk20a *g, u32 engine_type) | 185 | static int gp10b_fifo_engine_enum_from_type(struct gk20a *g, u32 engine_type, |
186 | u32 *inst_id) | ||
186 | { | 187 | { |
187 | int ret = ENGINE_INVAL_GK20A; | 188 | int ret = ENGINE_INVAL_GK20A; |
188 | 189 | ||
@@ -197,6 +198,28 @@ static int gp10b_fifo_engine_enum_from_type(struct gk20a *g, u32 engine_type) | |||
197 | return ret; | 198 | return ret; |
198 | } | 199 | } |
199 | 200 | ||
201 | void gp10b_device_info_data_parse(struct gk20a *g, u32 table_entry, | ||
202 | u32 *inst_id, u32 *pri_base, u32 *fault_id) | ||
203 | { | ||
204 | if (top_device_info_data_type_v(table_entry) == | ||
205 | top_device_info_data_type_enum2_v()) { | ||
206 | if (inst_id) | ||
207 | *inst_id = top_device_info_data_inst_id_v(table_entry); | ||
208 | if (pri_base) { | ||
209 | *pri_base = | ||
210 | (top_device_info_data_pri_base_v(table_entry) | ||
211 | << top_device_info_data_pri_base_align_v()); | ||
212 | } | ||
213 | if (fault_id && (top_device_info_data_fault_id_v(table_entry) == | ||
214 | top_device_info_data_fault_id_valid_v())) { | ||
215 | *fault_id = | ||
216 | top_device_info_data_fault_id_enum_v(table_entry); | ||
217 | } | ||
218 | } else | ||
219 | gk20a_err(g->dev, "unknown device_info_data %d", | ||
220 | top_device_info_data_type_v(table_entry)); | ||
221 | } | ||
222 | |||
200 | void gp10b_init_fifo(struct gpu_ops *gops) | 223 | void gp10b_init_fifo(struct gpu_ops *gops) |
201 | { | 224 | { |
202 | gm20b_init_fifo(gops); | 225 | gm20b_init_fifo(gops); |
@@ -204,4 +227,5 @@ void gp10b_init_fifo(struct gpu_ops *gops) | |||
204 | gops->fifo.get_pbdma_signature = gp10b_fifo_get_pbdma_signature; | 227 | gops->fifo.get_pbdma_signature = gp10b_fifo_get_pbdma_signature; |
205 | gops->fifo.resetup_ramfc = gp10b_fifo_resetup_ramfc; | 228 | gops->fifo.resetup_ramfc = gp10b_fifo_resetup_ramfc; |
206 | gops->fifo.engine_enum_from_type = gp10b_fifo_engine_enum_from_type; | 229 | gops->fifo.engine_enum_from_type = gp10b_fifo_engine_enum_from_type; |
230 | gops->fifo.device_info_data_parse = gp10b_device_info_data_parse; | ||
207 | } | 231 | } |
diff --git a/drivers/gpu/nvgpu/gp10b/hw_top_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_top_gp10b.h index 5376717f..c6645ca0 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_top_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_top_gp10b.h | |||
@@ -186,4 +186,40 @@ static inline u32 top_device_info_entry_engine_type_v(void) | |||
186 | { | 186 | { |
187 | return 0x00000002; | 187 | return 0x00000002; |
188 | } | 188 | } |
189 | static inline u32 top_device_info_entry_data_v(void) | ||
190 | { | ||
191 | return 0x00000001; | ||
192 | } | ||
193 | static inline u32 top_device_info_data_type_v(u32 r) | ||
194 | { | ||
195 | return (r >> 30) & 0x1; | ||
196 | } | ||
197 | static inline u32 top_device_info_data_type_enum2_v(void) | ||
198 | { | ||
199 | return 0x00000000; | ||
200 | } | ||
201 | static inline u32 top_device_info_data_inst_id_v(u32 r) | ||
202 | { | ||
203 | return (r >> 26) & 0xf; | ||
204 | } | ||
205 | static inline u32 top_device_info_data_pri_base_v(u32 r) | ||
206 | { | ||
207 | return (r >> 12) & 0xfff; | ||
208 | } | ||
209 | static inline u32 top_device_info_data_pri_base_align_v(void) | ||
210 | { | ||
211 | return 0x0000000c; | ||
212 | } | ||
213 | static inline u32 top_device_info_data_fault_id_enum_v(u32 r) | ||
214 | { | ||
215 | return (r >> 3) & 0x1f; | ||
216 | } | ||
217 | static inline u32 top_device_info_data_fault_id_v(u32 r) | ||
218 | { | ||
219 | return (r >> 2) & 0x1; | ||
220 | } | ||
221 | static inline u32 top_device_info_data_fault_id_valid_v(void) | ||
222 | { | ||
223 | return 0x00000001; | ||
224 | } | ||
189 | #endif | 225 | #endif |