diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 2 |
5 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index feb80adf..e11ecc8b 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -264,7 +264,7 @@ static void channel_gk20a_bind(struct channel_gk20a *ch_gk20a) | |||
264 | struct fifo_engine_info_gk20a *engine_info = | 264 | struct fifo_engine_info_gk20a *engine_info = |
265 | f->engine_info + ENGINE_GR_GK20A; | 265 | f->engine_info + ENGINE_GR_GK20A; |
266 | 266 | ||
267 | u32 inst_ptr = sg_phys(ch_gk20a->inst_block.sgt->sgl) | 267 | u32 inst_ptr = gk20a_mem_phys(&ch_gk20a->inst_block) |
268 | >> ram_in_base_shift_v(); | 268 | >> ram_in_base_shift_v(); |
269 | 269 | ||
270 | gk20a_dbg_info("bind channel %d inst ptr 0x%08x", | 270 | gk20a_dbg_info("bind channel %d inst ptr 0x%08x", |
@@ -323,7 +323,7 @@ int channel_gk20a_alloc_inst(struct gk20a *g, struct channel_gk20a *ch) | |||
323 | return err; | 323 | return err; |
324 | 324 | ||
325 | gk20a_dbg_info("channel %d inst block physical addr: 0x%16llx", | 325 | gk20a_dbg_info("channel %d inst block physical addr: 0x%16llx", |
326 | ch->hw_chid, (u64)sg_phys(ch->inst_block.sgt->sgl)); | 326 | ch->hw_chid, (u64)gk20a_mem_phys(&ch->inst_block)); |
327 | 327 | ||
328 | gk20a_dbg_fn("done"); | 328 | gk20a_dbg_fn("done"); |
329 | return 0; | 329 | return 0; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 47659445..88e3f60a 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -646,7 +646,7 @@ channel_from_inst_ptr(struct fifo_gk20a *f, u64 inst_ptr) | |||
646 | for (ci = 0; ci < f->num_channels; ci++) { | 646 | for (ci = 0; ci < f->num_channels; ci++) { |
647 | struct channel_gk20a *c = f->channel+ci; | 647 | struct channel_gk20a *c = f->channel+ci; |
648 | if (c->inst_block.cpu_va && | 648 | if (c->inst_block.cpu_va && |
649 | (inst_ptr == sg_phys(c->inst_block.sgt->sgl))) | 649 | (inst_ptr == gk20a_mem_phys(&c->inst_block))) |
650 | return f->channel+ci; | 650 | return f->channel+ci; |
651 | } | 651 | } |
652 | return NULL; | 652 | return NULL; |
@@ -1002,10 +1002,10 @@ static bool gk20a_fifo_handle_mmu_fault(struct gk20a *g) | |||
1002 | gk20a_fifo_set_ctx_mmu_error_ch(g, ch); | 1002 | gk20a_fifo_set_ctx_mmu_error_ch(g, ch); |
1003 | gk20a_channel_abort(ch); | 1003 | gk20a_channel_abort(ch); |
1004 | } else if (f.inst_ptr == | 1004 | } else if (f.inst_ptr == |
1005 | sg_phys(g->mm.bar1.inst_block.sgt->sgl)) { | 1005 | gk20a_mem_phys(&g->mm.bar1.inst_block)) { |
1006 | gk20a_err(dev_from_gk20a(g), "mmu fault from bar1"); | 1006 | gk20a_err(dev_from_gk20a(g), "mmu fault from bar1"); |
1007 | } else if (f.inst_ptr == | 1007 | } else if (f.inst_ptr == |
1008 | sg_phys(g->mm.pmu.inst_block.sgt->sgl)) { | 1008 | gk20a_mem_phys(&g->mm.pmu.inst_block)) { |
1009 | gk20a_err(dev_from_gk20a(g), "mmu fault from pmu"); | 1009 | gk20a_err(dev_from_gk20a(g), "mmu fault from pmu"); |
1010 | } else | 1010 | } else |
1011 | gk20a_err(dev_from_gk20a(g), "couldn't locate channel for mmu fault"); | 1011 | gk20a_err(dev_from_gk20a(g), "couldn't locate channel for mmu fault"); |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 95bb1eb6..275fbd4e 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -1349,7 +1349,7 @@ static int pmu_bootstrap(struct pmu_gk20a *pmu) | |||
1349 | pwr_falcon_itfen_ctxen_enable_f()); | 1349 | pwr_falcon_itfen_ctxen_enable_f()); |
1350 | gk20a_writel(g, pwr_pmu_new_instblk_r(), | 1350 | gk20a_writel(g, pwr_pmu_new_instblk_r(), |
1351 | pwr_pmu_new_instblk_ptr_f( | 1351 | pwr_pmu_new_instblk_ptr_f( |
1352 | sg_phys(mm->pmu.inst_block.sgt->sgl) >> 12) | | 1352 | gk20a_mem_phys(&mm->pmu.inst_block) >> 12) | |
1353 | pwr_pmu_new_instblk_valid_f(1) | | 1353 | pwr_pmu_new_instblk_valid_f(1) | |
1354 | pwr_pmu_new_instblk_target_sys_coh_f()); | 1354 | pwr_pmu_new_instblk_target_sys_coh_f()); |
1355 | 1355 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index ecb0f8ab..02706bad 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -1041,7 +1041,7 @@ static int bl_bootstrap(struct pmu_gk20a *pmu, | |||
1041 | pwr_falcon_itfen_ctxen_enable_f()); | 1041 | pwr_falcon_itfen_ctxen_enable_f()); |
1042 | gk20a_writel(g, pwr_pmu_new_instblk_r(), | 1042 | gk20a_writel(g, pwr_pmu_new_instblk_r(), |
1043 | pwr_pmu_new_instblk_ptr_f( | 1043 | pwr_pmu_new_instblk_ptr_f( |
1044 | sg_phys(mm->pmu.inst_block.sgt->sgl) >> 12) | | 1044 | gk20a_mem_phys(&mm->pmu.inst_block) >> 12) | |
1045 | pwr_pmu_new_instblk_valid_f(1) | | 1045 | pwr_pmu_new_instblk_valid_f(1) | |
1046 | pwr_pmu_new_instblk_target_sys_coh_f()); | 1046 | pwr_pmu_new_instblk_target_sys_coh_f()); |
1047 | 1047 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 10d2a13e..530df04a 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -24,7 +24,7 @@ static void channel_gm20b_bind(struct channel_gk20a *ch_gk20a) | |||
24 | { | 24 | { |
25 | struct gk20a *g = ch_gk20a->g; | 25 | struct gk20a *g = ch_gk20a->g; |
26 | 26 | ||
27 | u32 inst_ptr = sg_phys(ch_gk20a->inst_block.sgt->sgl) | 27 | u32 inst_ptr = gk20a_mem_phys(&ch_gk20a->inst_block) |
28 | >> ram_in_base_shift_v(); | 28 | >> ram_in_base_shift_v(); |
29 | 29 | ||
30 | gk20a_dbg_info("bind channel %d inst ptr 0x%08x", | 30 | gk20a_dbg_info("bind channel %d inst ptr 0x%08x", |