diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 13d0a871..ae6c3d22 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -637,20 +637,20 @@ static const struct gpu_ops gv100_ops = { | |||
637 | }, | 637 | }, |
638 | #ifdef CONFIG_GK20A_CTXSW_TRACE | 638 | #ifdef CONFIG_GK20A_CTXSW_TRACE |
639 | .fecs_trace = { | 639 | .fecs_trace = { |
640 | .alloc_user_buffer = NULL, | 640 | .alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc, |
641 | .free_user_buffer = NULL, | 641 | .free_user_buffer = gk20a_ctxsw_dev_ring_free, |
642 | .mmap_user_buffer = NULL, | 642 | .mmap_user_buffer = gk20a_ctxsw_dev_mmap_buffer, |
643 | .init = NULL, | 643 | .init = gk20a_fecs_trace_init, |
644 | .deinit = NULL, | 644 | .deinit = gk20a_fecs_trace_deinit, |
645 | .enable = NULL, | 645 | .enable = gk20a_fecs_trace_enable, |
646 | .disable = NULL, | 646 | .disable = gk20a_fecs_trace_disable, |
647 | .is_enabled = NULL, | 647 | .is_enabled = gk20a_fecs_trace_is_enabled, |
648 | .reset = NULL, | 648 | .reset = gk20a_fecs_trace_reset, |
649 | .flush = NULL, | 649 | .flush = NULL, |
650 | .poll = NULL, | 650 | .poll = gk20a_fecs_trace_poll, |
651 | .bind_channel = NULL, | 651 | .bind_channel = gk20a_fecs_trace_bind_channel, |
652 | .unbind_channel = NULL, | 652 | .unbind_channel = gk20a_fecs_trace_unbind_channel, |
653 | .max_entries = NULL, | 653 | .max_entries = gk20a_gr_max_entries, |
654 | }, | 654 | }, |
655 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 655 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
656 | .mm = { | 656 | .mm = { |
@@ -939,6 +939,8 @@ int gv100_init_hal(struct gk20a *g) | |||
939 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); | 939 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); |
940 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); | 940 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); |
941 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); | 941 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); |
942 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); | ||
943 | |||
942 | /* for now */ | 944 | /* for now */ |
943 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); | 945 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); |
944 | 946 | ||