diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.h | 3 |
2 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 677f4eb4..a58f726a 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -952,6 +952,8 @@ int gm20b_bootstrap_hs_flcn(struct gk20a *g) | |||
952 | acr_dmem = (u64 *) | 952 | acr_dmem = (u64 *) |
953 | &(((u8 *)acr_ucode_data_t210_load)[ | 953 | &(((u8 *)acr_ucode_data_t210_load)[ |
954 | acr_ucode_header_t210_load[2]]); | 954 | acr_ucode_header_t210_load[2]]); |
955 | acr->acr_dmem_desc = (struct flcn_acr_desc *)((u8 *)( | ||
956 | pacr_ucode_cpuva) + acr_ucode_header_t210_load[2]); | ||
955 | ((struct flcn_acr_desc *)acr_dmem)->nonwpr_ucode_blob_start = | 957 | ((struct flcn_acr_desc *)acr_dmem)->nonwpr_ucode_blob_start = |
956 | start; | 958 | start; |
957 | ((struct flcn_acr_desc *)acr_dmem)->nonwpr_ucode_blob_size = | 959 | ((struct flcn_acr_desc *)acr_dmem)->nonwpr_ucode_blob_size = |
@@ -993,7 +995,8 @@ int gm20b_bootstrap_hs_flcn(struct gk20a *g) | |||
993 | bl_dmem_desc->data_size = acr_ucode_header_t210_load[3]; | 995 | bl_dmem_desc->data_size = acr_ucode_header_t210_load[3]; |
994 | gk20a_free_sgtable(&sgt_pmu_ucode); | 996 | gk20a_free_sgtable(&sgt_pmu_ucode); |
995 | sgt_pmu_ucode = NULL; | 997 | sgt_pmu_ucode = NULL; |
996 | } | 998 | } else |
999 | acr->acr_dmem_desc->nonwpr_ucode_blob_size = 0; | ||
997 | status = pmu_exec_gen_bl(g, bl_dmem_desc, 1); | 1000 | status = pmu_exec_gen_bl(g, bl_dmem_desc, 1); |
998 | if (status != 0) { | 1001 | if (status != 0) { |
999 | err = status; | 1002 | err = status; |
@@ -1325,9 +1328,6 @@ err_done: | |||
1325 | int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout) | 1328 | int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout) |
1326 | { | 1329 | { |
1327 | u32 data = 0; | 1330 | u32 data = 0; |
1328 | udelay(10); | ||
1329 | data = gk20a_readl(g, pwr_falcon_cpuctl_r()); | ||
1330 | gm20b_dbg_pmu("bef while cpuctl %xi, timeout %d\n", data, timeout); | ||
1331 | while (timeout != 0) { | 1331 | while (timeout != 0) { |
1332 | data = gk20a_readl(g, pwr_falcon_cpuctl_r()); | 1332 | data = gk20a_readl(g, pwr_falcon_cpuctl_r()); |
1333 | if (data & pwr_falcon_cpuctl_halt_intr_m()) | 1333 | if (data & pwr_falcon_cpuctl_halt_intr_m()) |
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h index 5fd5c39b..e5d126f8 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GM20B ACR | 2 | * GM20B ACR |
3 | * | 3 | * |
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -380,6 +380,7 @@ struct acr_gm20b { | |||
380 | struct acr_fw_header *fw_hdr; | 380 | struct acr_fw_header *fw_hdr; |
381 | u32 pmu_args; | 381 | u32 pmu_args; |
382 | const struct firmware *acr_fw; | 382 | const struct firmware *acr_fw; |
383 | struct flcn_acr_desc *acr_dmem_desc; | ||
383 | struct pmu_mem_desc acr_ucode; | 384 | struct pmu_mem_desc acr_ucode; |
384 | const struct firmware *hsbl_fw; | 385 | const struct firmware *hsbl_fw; |
385 | struct pmu_mem_desc hsbl_ucode; | 386 | struct pmu_mem_desc hsbl_ucode; |