diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/css_gr_gk20a.h | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 17 |
5 files changed, 58 insertions, 27 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c index 452bcd11..8f655b26 100644 --- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | |||
@@ -72,7 +72,7 @@ static inline u32 css_hw_get_pending_snapshots(struct gk20a *g) | |||
72 | } | 72 | } |
73 | 73 | ||
74 | /* informs hw how many snapshots have been processed (frees up fifo space) */ | 74 | /* informs hw how many snapshots have been processed (frees up fifo space) */ |
75 | static inline void css_hw_set_handled_snapshots(struct gk20a *g, u32 done) | 75 | inline void css_hw_set_handled_snapshots(struct gk20a *g, u32 done) |
76 | { | 76 | { |
77 | if (done > 0) { | 77 | if (done > 0) { |
78 | gk20a_writel(g, perf_pmasys_mem_bump_r(), | 78 | gk20a_writel(g, perf_pmasys_mem_bump_r(), |
@@ -127,7 +127,7 @@ static int css_gr_create_shared_data(struct gr_gk20a *gr) | |||
127 | return 0; | 127 | return 0; |
128 | } | 128 | } |
129 | 129 | ||
130 | static int css_hw_enable_snapshot(struct channel_gk20a *ch, | 130 | int css_hw_enable_snapshot(struct channel_gk20a *ch, |
131 | struct gk20a_cs_snapshot_client *cs_client) | 131 | struct gk20a_cs_snapshot_client *cs_client) |
132 | { | 132 | { |
133 | struct gk20a *g = ch->g; | 133 | struct gk20a *g = ch->g; |
@@ -203,7 +203,7 @@ failed_allocation: | |||
203 | return ret; | 203 | return ret; |
204 | } | 204 | } |
205 | 205 | ||
206 | static void css_hw_disable_snapshot(struct gr_gk20a *gr) | 206 | void css_hw_disable_snapshot(struct gr_gk20a *gr) |
207 | { | 207 | { |
208 | struct gk20a *g = gr->g; | 208 | struct gk20a *g = gr->g; |
209 | struct gk20a_cs_snapshot *data = gr->cs_data; | 209 | struct gk20a_cs_snapshot *data = gr->cs_data; |
@@ -399,7 +399,7 @@ next_hw_fifo_entry: | |||
399 | return 0; | 399 | return 0; |
400 | } | 400 | } |
401 | 401 | ||
402 | static u32 css_gr_allocate_perfmon_ids(struct gk20a_cs_snapshot *data, | 402 | u32 css_gr_allocate_perfmon_ids(struct gk20a_cs_snapshot *data, |
403 | u32 count) | 403 | u32 count) |
404 | { | 404 | { |
405 | unsigned long *pids = data->perfmon_ids; | 405 | unsigned long *pids = data->perfmon_ids; |
@@ -415,7 +415,7 @@ static u32 css_gr_allocate_perfmon_ids(struct gk20a_cs_snapshot *data, | |||
415 | return f; | 415 | return f; |
416 | } | 416 | } |
417 | 417 | ||
418 | static u32 css_gr_release_perfmon_ids(struct gk20a_cs_snapshot *data, | 418 | u32 css_gr_release_perfmon_ids(struct gk20a_cs_snapshot *data, |
419 | u32 start, | 419 | u32 start, |
420 | u32 count) | 420 | u32 count) |
421 | { | 421 | { |
@@ -653,7 +653,7 @@ void gr_gk20a_free_cyclestats_snapshot_data(struct gk20a *g) | |||
653 | nvgpu_mutex_destroy(&gr->cs_lock); | 653 | nvgpu_mutex_destroy(&gr->cs_lock); |
654 | } | 654 | } |
655 | 655 | ||
656 | static int css_hw_check_data_available(struct channel_gk20a *ch, u32 *pending, | 656 | int css_hw_check_data_available(struct channel_gk20a *ch, u32 *pending, |
657 | bool *hw_overflow) | 657 | bool *hw_overflow) |
658 | { | 658 | { |
659 | struct gk20a *g = ch->g; | 659 | struct gk20a *g = ch->g; |
@@ -670,13 +670,3 @@ static int css_hw_check_data_available(struct channel_gk20a *ch, u32 *pending, | |||
670 | *hw_overflow = css_hw_get_overflow_status(g); | 670 | *hw_overflow = css_hw_get_overflow_status(g); |
671 | return 0; | 671 | return 0; |
672 | } | 672 | } |
673 | |||
674 | void gk20a_init_css_ops(struct gpu_ops *gops) | ||
675 | { | ||
676 | gops->css.enable_snapshot = css_hw_enable_snapshot; | ||
677 | gops->css.disable_snapshot = css_hw_disable_snapshot; | ||
678 | gops->css.check_data_available = css_hw_check_data_available; | ||
679 | gops->css.set_handled_snapshots = css_hw_set_handled_snapshots; | ||
680 | gops->css.allocate_perfmon_ids = css_gr_allocate_perfmon_ids; | ||
681 | gops->css.release_perfmon_ids = css_gr_release_perfmon_ids; | ||
682 | } | ||
diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.h index a95eaeae..804308bc 100644 --- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Cycle stats snapshots support (subsystem for gr_gk20a). | 2 | * GK20A Cycle stats snapshots support (subsystem for gr_gk20a). |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -121,6 +121,16 @@ struct gk20a_cs_snapshot { | |||
121 | struct gk20a_cs_snapshot_fifo_entry *hw_get; | 121 | struct gk20a_cs_snapshot_fifo_entry *hw_get; |
122 | }; | 122 | }; |
123 | 123 | ||
124 | void gk20a_init_css_ops(struct gpu_ops *gops); | 124 | inline void css_hw_set_handled_snapshots(struct gk20a *g, u32 done); |
125 | int css_hw_enable_snapshot(struct channel_gk20a *ch, | ||
126 | struct gk20a_cs_snapshot_client *cs_client); | ||
127 | void css_hw_disable_snapshot(struct gr_gk20a *gr); | ||
128 | u32 css_gr_allocate_perfmon_ids(struct gk20a_cs_snapshot *data, | ||
129 | u32 count); | ||
130 | u32 css_gr_release_perfmon_ids(struct gk20a_cs_snapshot *data, | ||
131 | u32 start, | ||
132 | u32 count); | ||
133 | int css_hw_check_data_available(struct channel_gk20a *ch, u32 *pending, | ||
134 | bool *hw_overflow); | ||
125 | 135 | ||
126 | #endif /* CSS_GR_GK20A_H */ | 136 | #endif /* CSS_GR_GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 2d8ed9ec..300f0872 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -234,6 +234,16 @@ static const struct gpu_ops gm20b_ops = { | |||
234 | .cde = { | 234 | .cde = { |
235 | .get_program_numbers = gm20b_cde_get_program_numbers, | 235 | .get_program_numbers = gm20b_cde_get_program_numbers, |
236 | }, | 236 | }, |
237 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
238 | .css = { | ||
239 | .enable_snapshot = css_hw_enable_snapshot, | ||
240 | .disable_snapshot = css_hw_disable_snapshot, | ||
241 | .check_data_available = css_hw_check_data_available, | ||
242 | .set_handled_snapshots = css_hw_set_handled_snapshots, | ||
243 | .allocate_perfmon_ids = css_gr_allocate_perfmon_ids, | ||
244 | .release_perfmon_ids = css_gr_release_perfmon_ids, | ||
245 | }, | ||
246 | #endif | ||
237 | .falcon = { | 247 | .falcon = { |
238 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 248 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
239 | }, | 249 | }, |
@@ -253,6 +263,9 @@ int gm20b_init_hal(struct gk20a *g) | |||
253 | gops->dbg_session_ops = gm20b_ops.dbg_session_ops; | 263 | gops->dbg_session_ops = gm20b_ops.dbg_session_ops; |
254 | gops->debug = gm20b_ops.debug; | 264 | gops->debug = gm20b_ops.debug; |
255 | gops->cde = gm20b_ops.cde; | 265 | gops->cde = gm20b_ops.cde; |
266 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
267 | gops->css = gm20b_ops.css; | ||
268 | #endif | ||
256 | gops->falcon = gm20b_ops.falcon; | 269 | gops->falcon = gm20b_ops.falcon; |
257 | 270 | ||
258 | /* Lone functions */ | 271 | /* Lone functions */ |
@@ -303,9 +316,6 @@ int gm20b_init_hal(struct gk20a *g) | |||
303 | gm20b_init_regops(gops); | 316 | gm20b_init_regops(gops); |
304 | gm20b_init_therm_ops(gops); | 317 | gm20b_init_therm_ops(gops); |
305 | gk20a_init_tsg_ops(gops); | 318 | gk20a_init_tsg_ops(gops); |
306 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
307 | gk20a_init_css_ops(gops); | ||
308 | #endif | ||
309 | g->name = "gm20b"; | 319 | g->name = "gm20b"; |
310 | 320 | ||
311 | c->twod_class = FERMI_TWOD_A; | 321 | c->twod_class = FERMI_TWOD_A; |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 2ebf93e2..c54232aa 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -278,6 +278,16 @@ static const struct gpu_ops gp106_ops = { | |||
278 | .need_scatter_buffer = gp10b_need_scatter_buffer, | 278 | .need_scatter_buffer = gp10b_need_scatter_buffer, |
279 | .populate_scatter_buffer = gp10b_populate_scatter_buffer, | 279 | .populate_scatter_buffer = gp10b_populate_scatter_buffer, |
280 | }, | 280 | }, |
281 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
282 | .css = { | ||
283 | .enable_snapshot = css_hw_enable_snapshot, | ||
284 | .disable_snapshot = css_hw_disable_snapshot, | ||
285 | .check_data_available = css_hw_check_data_available, | ||
286 | .set_handled_snapshots = css_hw_set_handled_snapshots, | ||
287 | .allocate_perfmon_ids = css_gr_allocate_perfmon_ids, | ||
288 | .release_perfmon_ids = css_gr_release_perfmon_ids, | ||
289 | }, | ||
290 | #endif | ||
281 | .xve = { | 291 | .xve = { |
282 | .sw_init = xve_sw_init_gp106, | 292 | .sw_init = xve_sw_init_gp106, |
283 | .get_speed = xve_get_speed_gp106, | 293 | .get_speed = xve_get_speed_gp106, |
@@ -314,6 +324,9 @@ int gp106_init_hal(struct gk20a *g) | |||
314 | gops->debug = gp106_ops.debug; | 324 | gops->debug = gp106_ops.debug; |
315 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; | 325 | gops->dbg_session_ops = gp106_ops.dbg_session_ops; |
316 | gops->cde = gp106_ops.cde; | 326 | gops->cde = gp106_ops.cde; |
327 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
328 | gops->css = gp106_ops.css; | ||
329 | #endif | ||
317 | gops->xve = gp106_ops.xve; | 330 | gops->xve = gp106_ops.xve; |
318 | gops->falcon = gp106_ops.falcon; | 331 | gops->falcon = gp106_ops.falcon; |
319 | 332 | ||
@@ -342,9 +355,6 @@ int gp106_init_hal(struct gk20a *g) | |||
342 | gp106_init_regops(gops); | 355 | gp106_init_regops(gops); |
343 | gk20a_init_tsg_ops(gops); | 356 | gk20a_init_tsg_ops(gops); |
344 | gk20a_init_pramin_ops(gops); | 357 | gk20a_init_pramin_ops(gops); |
345 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
346 | gk20a_init_css_ops(gops); | ||
347 | #endif | ||
348 | gp106_init_therm_ops(gops); | 358 | gp106_init_therm_ops(gops); |
349 | 359 | ||
350 | g->name = "gp10x"; | 360 | g->name = "gp10x"; |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 796d26dd..e526af4c 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -245,6 +245,16 @@ static const struct gpu_ops gp10b_ops = { | |||
245 | .need_scatter_buffer = gp10b_need_scatter_buffer, | 245 | .need_scatter_buffer = gp10b_need_scatter_buffer, |
246 | .populate_scatter_buffer = gp10b_populate_scatter_buffer, | 246 | .populate_scatter_buffer = gp10b_populate_scatter_buffer, |
247 | }, | 247 | }, |
248 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
249 | .css = { | ||
250 | .enable_snapshot = css_hw_enable_snapshot, | ||
251 | .disable_snapshot = css_hw_disable_snapshot, | ||
252 | .check_data_available = css_hw_check_data_available, | ||
253 | .set_handled_snapshots = css_hw_set_handled_snapshots, | ||
254 | .allocate_perfmon_ids = css_gr_allocate_perfmon_ids, | ||
255 | .release_perfmon_ids = css_gr_release_perfmon_ids, | ||
256 | }, | ||
257 | #endif | ||
248 | .falcon = { | 258 | .falcon = { |
249 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, | 259 | .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, |
250 | }, | 260 | }, |
@@ -264,6 +274,9 @@ int gp10b_init_hal(struct gk20a *g) | |||
264 | gops->debug = gp10b_ops.debug; | 274 | gops->debug = gp10b_ops.debug; |
265 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; | 275 | gops->dbg_session_ops = gp10b_ops.dbg_session_ops; |
266 | gops->cde = gp10b_ops.cde; | 276 | gops->cde = gp10b_ops.cde; |
277 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
278 | gops->css = gp10b_ops.css; | ||
279 | #endif | ||
267 | gops->falcon = gp10b_ops.falcon; | 280 | gops->falcon = gp10b_ops.falcon; |
268 | 281 | ||
269 | /* Lone Functions */ | 282 | /* Lone Functions */ |
@@ -323,9 +336,7 @@ int gp10b_init_hal(struct gk20a *g) | |||
323 | gp10b_init_therm_ops(gops); | 336 | gp10b_init_therm_ops(gops); |
324 | gk20a_init_tsg_ops(gops); | 337 | gk20a_init_tsg_ops(gops); |
325 | gk20a_init_pramin_ops(gops); | 338 | gk20a_init_pramin_ops(gops); |
326 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 339 | |
327 | gk20a_init_css_ops(gops); | ||
328 | #endif | ||
329 | g->name = "gp10b"; | 340 | g->name = "gp10b"; |
330 | 341 | ||
331 | c->twod_class = FERMI_TWOD_A; | 342 | c->twod_class = FERMI_TWOD_A; |