diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index ac01302e..33cecfb4 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -665,8 +665,6 @@ static void pmu_copy_from_dmem(struct pmu_gk20a *pmu, | |||
665 | data = gk20a_readl(g, pwr_falcon_dmemd_r(port)); | 665 | data = gk20a_readl(g, pwr_falcon_dmemd_r(port)); |
666 | for (i = 0; i < bytes; i++) { | 666 | for (i = 0; i < bytes; i++) { |
667 | dst[(words << 2) + i] = ((u8 *)&data)[i]; | 667 | dst[(words << 2) + i] = ((u8 *)&data)[i]; |
668 | gk20a_dbg_pmu("read: dst_u8[%d]=0x%08x", | ||
669 | i, dst[(words << 2) + i]); | ||
670 | } | 668 | } |
671 | } | 669 | } |
672 | mutex_unlock(&pmu->pmu_copy_lock); | 670 | mutex_unlock(&pmu->pmu_copy_lock); |
@@ -1732,6 +1730,7 @@ static void pmu_handle_pg_buf_config_msg(struct gk20a *g, struct pmu_msg *msg, | |||
1732 | 1730 | ||
1733 | gk20a_dbg_fn(""); | 1731 | gk20a_dbg_fn(""); |
1734 | 1732 | ||
1733 | gk20a_dbg_pmu("reply PMU_PG_CMD_ID_ENG_BUF_LOAD PMU_PGENG_GR_BUFFER_IDX_FECS"); | ||
1735 | if (status != 0) { | 1734 | if (status != 0) { |
1736 | gk20a_err(dev_from_gk20a(g), "PGENG cmd aborted"); | 1735 | gk20a_err(dev_from_gk20a(g), "PGENG cmd aborted"); |
1737 | /* TBD: disable ELPG */ | 1736 | /* TBD: disable ELPG */ |
@@ -1905,6 +1904,7 @@ int gk20a_init_pmu_setup_hw2(struct gk20a *g) | |||
1905 | cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; | 1904 | cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; |
1906 | 1905 | ||
1907 | pmu->buf_loaded = false; | 1906 | pmu->buf_loaded = false; |
1907 | gk20a_dbg_pmu("cmd post PMU_PG_CMD_ID_ENG_BUF_LOAD PMU_PGENG_GR_BUFFER_IDX_FECS"); | ||
1908 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, | 1908 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, |
1909 | pmu_handle_pg_buf_config_msg, pmu, &desc, ~0); | 1909 | pmu_handle_pg_buf_config_msg, pmu, &desc, ~0); |
1910 | 1910 | ||
@@ -1931,6 +1931,7 @@ int gk20a_init_pmu_setup_hw2(struct gk20a *g) | |||
1931 | cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; | 1931 | cmd.cmd.pg.eng_buf_load.dma_idx = PMU_DMAIDX_VIRT; |
1932 | 1932 | ||
1933 | pmu->buf_loaded = false; | 1933 | pmu->buf_loaded = false; |
1934 | gk20a_dbg_pmu("cmd post PMU_PG_CMD_ID_ENG_BUF_LOAD PMU_PGENG_GR_BUFFER_IDX_ZBC"); | ||
1934 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, | 1935 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, |
1935 | pmu_handle_pg_buf_config_msg, pmu, &desc, ~0); | 1936 | pmu_handle_pg_buf_config_msg, pmu, &desc, ~0); |
1936 | 1937 | ||
@@ -2111,6 +2112,7 @@ static int pmu_init_powergating(struct pmu_gk20a *pmu) | |||
2111 | cmd.cmd.pg.elpg_cmd.engine_id = ENGINE_GR_GK20A; | 2112 | cmd.cmd.pg.elpg_cmd.engine_id = ENGINE_GR_GK20A; |
2112 | cmd.cmd.pg.elpg_cmd.cmd = PMU_PG_ELPG_CMD_INIT; | 2113 | cmd.cmd.pg.elpg_cmd.cmd = PMU_PG_ELPG_CMD_INIT; |
2113 | 2114 | ||
2115 | gk20a_dbg_pmu("cmd post PMU_PG_ELPG_CMD_INIT"); | ||
2114 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 2116 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
2115 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); | 2117 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); |
2116 | 2118 | ||
@@ -2124,6 +2126,7 @@ static int pmu_init_powergating(struct pmu_gk20a *pmu) | |||
2124 | cmd.cmd.pg.stat.sub_cmd_id = PMU_PG_STAT_CMD_ALLOC_DMEM; | 2126 | cmd.cmd.pg.stat.sub_cmd_id = PMU_PG_STAT_CMD_ALLOC_DMEM; |
2125 | cmd.cmd.pg.stat.data = 0; | 2127 | cmd.cmd.pg.stat.data = 0; |
2126 | 2128 | ||
2129 | gk20a_dbg_pmu("cmd post PMU_PG_STAT_CMD_ALLOC_DMEM"); | ||
2127 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, | 2130 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, |
2128 | pmu_handle_pg_stat_msg, pmu, &seq, ~0); | 2131 | pmu_handle_pg_stat_msg, pmu, &seq, ~0); |
2129 | 2132 | ||
@@ -2137,6 +2140,7 @@ static int pmu_init_powergating(struct pmu_gk20a *pmu) | |||
2137 | cmd.cmd.pg.elpg_cmd.engine_id = ENGINE_GR_GK20A; | 2140 | cmd.cmd.pg.elpg_cmd.engine_id = ENGINE_GR_GK20A; |
2138 | cmd.cmd.pg.elpg_cmd.cmd = PMU_PG_ELPG_CMD_DISALLOW; | 2141 | cmd.cmd.pg.elpg_cmd.cmd = PMU_PG_ELPG_CMD_DISALLOW; |
2139 | 2142 | ||
2143 | gk20a_dbg_pmu("cmd post PMU_PG_ELPG_CMD_DISALLOW"); | ||
2140 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 2144 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
2141 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); | 2145 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); |
2142 | 2146 | ||
@@ -2241,6 +2245,7 @@ static int pmu_init_perfmon(struct pmu_gk20a *pmu) | |||
2241 | payload.in.size = sizeof(struct pmu_perfmon_counter); | 2245 | payload.in.size = sizeof(struct pmu_perfmon_counter); |
2242 | payload.in.offset = pv->get_perfmon_cmd_init_offsetofvar(COUNTER_ALLOC); | 2246 | payload.in.offset = pv->get_perfmon_cmd_init_offsetofvar(COUNTER_ALLOC); |
2243 | 2247 | ||
2248 | gk20a_dbg_pmu("cmd post PMU_PERFMON_CMD_ID_INIT"); | ||
2244 | gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, PMU_COMMAND_QUEUE_LPQ, | 2249 | gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, PMU_COMMAND_QUEUE_LPQ, |
2245 | NULL, NULL, &seq, ~0); | 2250 | NULL, NULL, &seq, ~0); |
2246 | 2251 | ||
@@ -2474,6 +2479,7 @@ static void pmu_handle_zbc_msg(struct gk20a *g, struct pmu_msg *msg, | |||
2474 | void *param, u32 handle, u32 status) | 2479 | void *param, u32 handle, u32 status) |
2475 | { | 2480 | { |
2476 | struct pmu_gk20a *pmu = param; | 2481 | struct pmu_gk20a *pmu = param; |
2482 | gk20a_dbg_pmu("reply ZBC_TABLE_UPDATE"); | ||
2477 | pmu->zbc_save_done = 1; | 2483 | pmu->zbc_save_done = 1; |
2478 | } | 2484 | } |
2479 | 2485 | ||
@@ -2494,6 +2500,7 @@ static void pmu_save_zbc(struct gk20a *g, u32 entries) | |||
2494 | 2500 | ||
2495 | pmu->zbc_save_done = 0; | 2501 | pmu->zbc_save_done = 0; |
2496 | 2502 | ||
2503 | gk20a_dbg_pmu("cmd post ZBC_TABLE_UPDATE"); | ||
2497 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 2504 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
2498 | pmu_handle_zbc_msg, pmu, &seq, ~0); | 2505 | pmu_handle_zbc_msg, pmu, &seq, ~0); |
2499 | pmu_wait_message_cond(pmu, gk20a_get_gr_idle_timeout(g), | 2506 | pmu_wait_message_cond(pmu, gk20a_get_gr_idle_timeout(g), |
@@ -2545,6 +2552,7 @@ static int pmu_perfmon_start_sampling(struct pmu_gk20a *pmu) | |||
2545 | payload.in.offset = | 2552 | payload.in.offset = |
2546 | pv->get_perfmon_cmd_start_offsetofvar(COUNTER_ALLOC); | 2553 | pv->get_perfmon_cmd_start_offsetofvar(COUNTER_ALLOC); |
2547 | 2554 | ||
2555 | gk20a_dbg_pmu("cmd post PMU_PERFMON_CMD_ID_START"); | ||
2548 | gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, PMU_COMMAND_QUEUE_LPQ, | 2556 | gk20a_pmu_cmd_post(g, &cmd, NULL, &payload, PMU_COMMAND_QUEUE_LPQ, |
2549 | NULL, NULL, &seq, ~0); | 2557 | NULL, NULL, &seq, ~0); |
2550 | 2558 | ||
@@ -2563,6 +2571,7 @@ static int pmu_perfmon_stop_sampling(struct pmu_gk20a *pmu) | |||
2563 | cmd.hdr.size = PMU_CMD_HDR_SIZE + sizeof(struct pmu_perfmon_cmd_stop); | 2571 | cmd.hdr.size = PMU_CMD_HDR_SIZE + sizeof(struct pmu_perfmon_cmd_stop); |
2564 | cmd.cmd.perfmon.stop.cmd_type = PMU_PERFMON_CMD_ID_STOP; | 2572 | cmd.cmd.perfmon.stop.cmd_type = PMU_PERFMON_CMD_ID_STOP; |
2565 | 2573 | ||
2574 | gk20a_dbg_pmu("cmd post PMU_PERFMON_CMD_ID_STOP"); | ||
2566 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, | 2575 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ, |
2567 | NULL, NULL, &seq, ~0); | 2576 | NULL, NULL, &seq, ~0); |
2568 | return 0; | 2577 | return 0; |
@@ -2861,6 +2870,8 @@ static void pmu_dump_falcon_stats(struct pmu_gk20a *pmu) | |||
2861 | gk20a_err(dev_from_gk20a(g), "PMU_FALCON_REG_SP : 0x%x", | 2870 | gk20a_err(dev_from_gk20a(g), "PMU_FALCON_REG_SP : 0x%x", |
2862 | gk20a_readl(g, pwr_pmu_falcon_icd_rdata_r())); | 2871 | gk20a_readl(g, pwr_pmu_falcon_icd_rdata_r())); |
2863 | } | 2872 | } |
2873 | gk20a_err(dev_from_gk20a(g), "elpg stat: %d\n", | ||
2874 | pmu->elpg_stat); | ||
2864 | 2875 | ||
2865 | /* PMU may crash due to FECS crash. Dump FECS status */ | 2876 | /* PMU may crash due to FECS crash. Dump FECS status */ |
2866 | gk20a_fecs_dump_falcon_stats(g); | 2877 | gk20a_fecs_dump_falcon_stats(g); |
@@ -3166,6 +3177,7 @@ static int gk20a_pmu_enable_elpg_locked(struct gk20a *g) | |||
3166 | with follow up ELPG disable */ | 3177 | with follow up ELPG disable */ |
3167 | pmu->elpg_stat = PMU_ELPG_STAT_ON_PENDING; | 3178 | pmu->elpg_stat = PMU_ELPG_STAT_ON_PENDING; |
3168 | 3179 | ||
3180 | gk20a_dbg_pmu("cmd post PMU_PG_ELPG_CMD_ALLOW"); | ||
3169 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 3181 | status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
3170 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); | 3182 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); |
3171 | 3183 | ||
@@ -3313,6 +3325,7 @@ static int gk20a_pmu_disable_elpg_defer_enable(struct gk20a *g, bool enable) | |||
3313 | 3325 | ||
3314 | pmu->elpg_stat = PMU_ELPG_STAT_OFF_PENDING; | 3326 | pmu->elpg_stat = PMU_ELPG_STAT_OFF_PENDING; |
3315 | 3327 | ||
3328 | gk20a_dbg_pmu("cmd post PMU_PG_ELPG_CMD_DISALLOW"); | ||
3316 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, | 3329 | gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_HPQ, |
3317 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); | 3330 | pmu_handle_pg_elpg_msg, pmu, &seq, ~0); |
3318 | 3331 | ||
@@ -3491,12 +3504,14 @@ static int gk20a_pmu_ap_send_command(struct gk20a *g, | |||
3491 | /* Copy other members of command */ | 3504 | /* Copy other members of command */ |
3492 | switch (p_ap_cmd->cmn.cmd_id) { | 3505 | switch (p_ap_cmd->cmn.cmd_id) { |
3493 | case PMU_AP_CMD_ID_INIT: | 3506 | case PMU_AP_CMD_ID_INIT: |
3507 | gk20a_dbg_pmu("cmd post PMU_AP_CMD_ID_INIT"); | ||
3494 | cmd.cmd.pg.ap_cmd.init.pg_sampling_period_us = | 3508 | cmd.cmd.pg.ap_cmd.init.pg_sampling_period_us = |
3495 | p_ap_cmd->init.pg_sampling_period_us; | 3509 | p_ap_cmd->init.pg_sampling_period_us; |
3496 | p_callback = ap_callback_init_and_enable_ctrl; | 3510 | p_callback = ap_callback_init_and_enable_ctrl; |
3497 | break; | 3511 | break; |
3498 | 3512 | ||
3499 | case PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL: | 3513 | case PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL: |
3514 | gk20a_dbg_pmu("cmd post PMU_AP_CMD_ID_INIT_AND_ENABLE_CTRL"); | ||
3500 | cmd.cmd.pg.ap_cmd.init_and_enable_ctrl.ctrl_id = | 3515 | cmd.cmd.pg.ap_cmd.init_and_enable_ctrl.ctrl_id = |
3501 | p_ap_cmd->init_and_enable_ctrl.ctrl_id; | 3516 | p_ap_cmd->init_and_enable_ctrl.ctrl_id; |
3502 | memcpy( | 3517 | memcpy( |
@@ -3508,16 +3523,19 @@ static int gk20a_pmu_ap_send_command(struct gk20a *g, | |||
3508 | break; | 3523 | break; |
3509 | 3524 | ||
3510 | case PMU_AP_CMD_ID_ENABLE_CTRL: | 3525 | case PMU_AP_CMD_ID_ENABLE_CTRL: |
3526 | gk20a_dbg_pmu("cmd post PMU_AP_CMD_ID_ENABLE_CTRL"); | ||
3511 | cmd.cmd.pg.ap_cmd.enable_ctrl.ctrl_id = | 3527 | cmd.cmd.pg.ap_cmd.enable_ctrl.ctrl_id = |
3512 | p_ap_cmd->enable_ctrl.ctrl_id; | 3528 | p_ap_cmd->enable_ctrl.ctrl_id; |
3513 | break; | 3529 | break; |
3514 | 3530 | ||
3515 | case PMU_AP_CMD_ID_DISABLE_CTRL: | 3531 | case PMU_AP_CMD_ID_DISABLE_CTRL: |
3532 | gk20a_dbg_pmu("cmd post PMU_AP_CMD_ID_DISABLE_CTRL"); | ||
3516 | cmd.cmd.pg.ap_cmd.disable_ctrl.ctrl_id = | 3533 | cmd.cmd.pg.ap_cmd.disable_ctrl.ctrl_id = |
3517 | p_ap_cmd->disable_ctrl.ctrl_id; | 3534 | p_ap_cmd->disable_ctrl.ctrl_id; |
3518 | break; | 3535 | break; |
3519 | 3536 | ||
3520 | case PMU_AP_CMD_ID_KICK_CTRL: | 3537 | case PMU_AP_CMD_ID_KICK_CTRL: |
3538 | gk20a_dbg_pmu("cmd post PMU_AP_CMD_ID_KICK_CTRL"); | ||
3521 | cmd.cmd.pg.ap_cmd.kick_ctrl.ctrl_id = | 3539 | cmd.cmd.pg.ap_cmd.kick_ctrl.ctrl_id = |
3522 | p_ap_cmd->kick_ctrl.ctrl_id; | 3540 | p_ap_cmd->kick_ctrl.ctrl_id; |
3523 | cmd.cmd.pg.ap_cmd.kick_ctrl.skip_count = | 3541 | cmd.cmd.pg.ap_cmd.kick_ctrl.skip_count = |
@@ -3556,6 +3574,7 @@ static void ap_callback_init_and_enable_ctrl( | |||
3556 | if (!status) { | 3574 | if (!status) { |
3557 | switch (msg->msg.pg.ap_msg.cmn.msg_id) { | 3575 | switch (msg->msg.pg.ap_msg.cmn.msg_id) { |
3558 | case PMU_AP_MSG_ID_INIT_ACK: | 3576 | case PMU_AP_MSG_ID_INIT_ACK: |
3577 | gk20a_dbg_pmu("reply PMU_AP_CMD_ID_INIT"); | ||
3559 | break; | 3578 | break; |
3560 | 3579 | ||
3561 | default: | 3580 | default: |