diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/volt/volt_dev.c | 36 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/volt/volt_pmu.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/volt/volt_policy.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/volt/volt_rail.c | 14 |
4 files changed, 40 insertions, 45 deletions
diff --git a/drivers/gpu/nvgpu/volt/volt_dev.c b/drivers/gpu/nvgpu/volt/volt_dev.c index 12bad36c..8e229f4c 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.c +++ b/drivers/gpu/nvgpu/volt/volt_dev.c | |||
@@ -174,7 +174,7 @@ struct voltage_device *volt_volt_device_construct(struct gk20a *g, | |||
174 | u32 status = construct_pwm_volt_device(g, &pboard_obj, | 174 | u32 status = construct_pwm_volt_device(g, &pboard_obj, |
175 | sizeof(struct voltage_device_pwm), pargs); | 175 | sizeof(struct voltage_device_pwm), pargs); |
176 | if (status) { | 176 | if (status) { |
177 | gk20a_err(dev_from_gk20a(g), | 177 | nvgpu_err(g, |
178 | " Could not allocate memory for VOLTAGE_DEVICE type (%x).", | 178 | " Could not allocate memory for VOLTAGE_DEVICE type (%x).", |
179 | BOARDOBJ_GET_TYPE(pargs)); | 179 | BOARDOBJ_GET_TYPE(pargs)); |
180 | pboard_obj = NULL; | 180 | pboard_obj = NULL; |
@@ -218,8 +218,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
218 | 218 | ||
219 | if (ptmp_dev->super.operation_type == | 219 | if (ptmp_dev->super.operation_type == |
220 | CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID) { | 220 | CTRL_VOLT_DEVICE_OPERATION_TYPE_INVALID) { |
221 | gk20a_err(dev_from_gk20a(g), | 221 | nvgpu_err(g, " Invalid Voltage Device Operation Type."); |
222 | " Invalid Voltage Device Operation Type."); | ||
223 | 222 | ||
224 | status = -EINVAL; | 223 | status = -EINVAL; |
225 | goto done; | 224 | goto done; |
@@ -248,8 +247,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
248 | volt_domain = volt_rail_vbios_volt_domain_convert_to_internal(g, | 247 | volt_domain = volt_rail_vbios_volt_domain_convert_to_internal(g, |
249 | (u8)p_bios_entry->volt_domain); | 248 | (u8)p_bios_entry->volt_domain); |
250 | if (volt_domain == CTRL_VOLT_DOMAIN_INVALID) { | 249 | if (volt_domain == CTRL_VOLT_DOMAIN_INVALID) { |
251 | gk20a_err(dev_from_gk20a(g), | 250 | nvgpu_err(g, "invalid voltage domain = %d", |
252 | "invalid voltage domain = %d", | ||
253 | (u8)p_bios_entry->volt_domain); | 251 | (u8)p_bios_entry->volt_domain); |
254 | status = -EINVAL; | 252 | status = -EINVAL; |
255 | goto done; | 253 | goto done; |
@@ -283,8 +281,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
283 | 281 | ||
284 | pvolt_dev = volt_volt_device_construct(g, ptmp_dev); | 282 | pvolt_dev = volt_volt_device_construct(g, ptmp_dev); |
285 | if (pvolt_dev == NULL) { | 283 | if (pvolt_dev == NULL) { |
286 | gk20a_err(dev_from_gk20a(g), | 284 | nvgpu_err(g, " Failure to construct VOLTAGE_DEVICE object."); |
287 | " Failure to construct VOLTAGE_DEVICE object."); | ||
288 | 285 | ||
289 | status = -EINVAL; | 286 | status = -EINVAL; |
290 | goto done; | 287 | goto done; |
@@ -294,7 +291,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
294 | &p_Volt_Device_Meta_Data->volt_devices.super, | 291 | &p_Volt_Device_Meta_Data->volt_devices.super, |
295 | (struct boardobj *)pvolt_dev, entry_Idx); | 292 | (struct boardobj *)pvolt_dev, entry_Idx); |
296 | if (status) { | 293 | if (status) { |
297 | gk20a_err(dev_from_gk20a(g), | 294 | nvgpu_err(g, |
298 | "could not add VOLTAGE_DEVICE for entry %d into boardobjgrp ", | 295 | "could not add VOLTAGE_DEVICE for entry %d into boardobjgrp ", |
299 | entry_Idx); | 296 | entry_Idx); |
300 | goto done; | 297 | goto done; |
@@ -320,7 +317,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
320 | 317 | ||
321 | /* Check if there is room left in the voltage table. */ | 318 | /* Check if there is room left in the voltage table. */ |
322 | if (entry_cnt == VOLTAGE_TABLE_MAX_ENTRIES) { | 319 | if (entry_cnt == VOLTAGE_TABLE_MAX_ENTRIES) { |
323 | gk20a_err(dev_from_gk20a(g), "Voltage table is full"); | 320 | nvgpu_err(g, "Voltage table is full"); |
324 | status = -EINVAL; | 321 | status = -EINVAL; |
325 | goto done; | 322 | goto done; |
326 | } | 323 | } |
@@ -329,7 +326,7 @@ static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | |||
329 | volt_dev_construct_dev_entry_pwm(g, | 326 | volt_dev_construct_dev_entry_pwm(g, |
330 | voltage_uv, &pwm_entry); | 327 | voltage_uv, &pwm_entry); |
331 | if (pvolt_dev->pentry[entry_cnt] == NULL) { | 328 | if (pvolt_dev->pentry[entry_cnt] == NULL) { |
332 | gk20a_err(dev_from_gk20a(g), | 329 | nvgpu_err(g, |
333 | " Error creating voltage_device_pwm_entry!"); | 330 | " Error creating voltage_device_pwm_entry!"); |
334 | status = -EINVAL; | 331 | status = -EINVAL; |
335 | goto done; | 332 | goto done; |
@@ -463,7 +460,7 @@ u32 volt_device_state_init(struct gk20a *g, struct voltage_device *pvolt_dev) | |||
463 | rail_idx = volt_rail_volt_domain_convert_to_idx(g, | 460 | rail_idx = volt_rail_volt_domain_convert_to_idx(g, |
464 | pvolt_dev->volt_domain); | 461 | pvolt_dev->volt_domain); |
465 | if (rail_idx == CTRL_BOARDOBJ_IDX_INVALID) { | 462 | if (rail_idx == CTRL_BOARDOBJ_IDX_INVALID) { |
466 | gk20a_err(dev_from_gk20a(g), | 463 | nvgpu_err(g, |
467 | " could not convert voltage domain to rail index."); | 464 | " could not convert voltage domain to rail index."); |
468 | status = -EINVAL; | 465 | status = -EINVAL; |
469 | goto done; | 466 | goto done; |
@@ -471,7 +468,7 @@ u32 volt_device_state_init(struct gk20a *g, struct voltage_device *pvolt_dev) | |||
471 | 468 | ||
472 | pRail = VOLT_GET_VOLT_RAIL(&g->perf_pmu.volt, rail_idx); | 469 | pRail = VOLT_GET_VOLT_RAIL(&g->perf_pmu.volt, rail_idx); |
473 | if (pRail == NULL) { | 470 | if (pRail == NULL) { |
474 | gk20a_err(dev_from_gk20a(g), | 471 | nvgpu_err(g, |
475 | "could not obtain ptr to rail object from rail index"); | 472 | "could not obtain ptr to rail object from rail index"); |
476 | status = -EINVAL; | 473 | status = -EINVAL; |
477 | goto done; | 474 | goto done; |
@@ -480,7 +477,7 @@ u32 volt_device_state_init(struct gk20a *g, struct voltage_device *pvolt_dev) | |||
480 | status = volt_rail_volt_dev_register(g, pRail, | 477 | status = volt_rail_volt_dev_register(g, pRail, |
481 | BOARDOBJ_GET_IDX(pvolt_dev), pvolt_dev->operation_type); | 478 | BOARDOBJ_GET_IDX(pvolt_dev), pvolt_dev->operation_type); |
482 | if (status) { | 479 | if (status) { |
483 | gk20a_err(dev_from_gk20a(g), | 480 | nvgpu_err(g, |
484 | "Failed to register the device with rail obj"); | 481 | "Failed to register the device with rail obj"); |
485 | goto done; | 482 | goto done; |
486 | } | 483 | } |
@@ -488,8 +485,7 @@ u32 volt_device_state_init(struct gk20a *g, struct voltage_device *pvolt_dev) | |||
488 | 485 | ||
489 | done: | 486 | done: |
490 | if (status) | 487 | if (status) |
491 | gk20a_err(dev_from_gk20a(g), | 488 | nvgpu_err(g, "Error in building rail sw state device sw"); |
492 | "Error in building rail sw state device sw"); | ||
493 | 489 | ||
494 | return status; | 490 | return status; |
495 | } | 491 | } |
@@ -524,7 +520,7 @@ u32 volt_dev_sw_setup(struct gk20a *g) | |||
524 | status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_dev_metadata. | 520 | status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_dev_metadata. |
525 | volt_devices); | 521 | volt_devices); |
526 | if (status) { | 522 | if (status) { |
527 | gk20a_err(dev_from_gk20a(g), | 523 | nvgpu_err(g, |
528 | "error creating boardobjgrp for volt rail, status - 0x%x", | 524 | "error creating boardobjgrp for volt rail, status - 0x%x", |
529 | status); | 525 | status); |
530 | goto done; | 526 | goto done; |
@@ -547,7 +543,7 @@ u32 volt_dev_sw_setup(struct gk20a *g) | |||
547 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, | 543 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, |
548 | volt, VOLT, volt_device, VOLT_DEVICE); | 544 | volt, VOLT, volt_device, VOLT_DEVICE); |
549 | if (status) { | 545 | if (status) { |
550 | gk20a_err(dev_from_gk20a(g), | 546 | nvgpu_err(g, |
551 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 547 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
552 | status); | 548 | status); |
553 | goto done; | 549 | goto done; |
@@ -557,7 +553,7 @@ u32 volt_dev_sw_setup(struct gk20a *g) | |||
557 | &g->perf_pmu.volt.volt_dev_metadata.volt_devices.super, | 553 | &g->perf_pmu.volt.volt_dev_metadata.volt_devices.super, |
558 | volt, VOLT, volt_device, VOLT_DEVICE); | 554 | volt, VOLT, volt_device, VOLT_DEVICE); |
559 | if (status) { | 555 | if (status) { |
560 | gk20a_err(dev_from_gk20a(g), | 556 | nvgpu_err(g, |
561 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 557 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
562 | status); | 558 | status); |
563 | goto done; | 559 | goto done; |
@@ -569,9 +565,9 @@ u32 volt_dev_sw_setup(struct gk20a *g) | |||
569 | struct voltage_device *, pvolt_device, i) { | 565 | struct voltage_device *, pvolt_device, i) { |
570 | status = volt_device_state_init(g, pvolt_device); | 566 | status = volt_device_state_init(g, pvolt_device); |
571 | if (status) { | 567 | if (status) { |
572 | gk20a_err(dev_from_gk20a(g), | 568 | nvgpu_err(g, |
573 | "failure while executing devices's state init interface"); | 569 | "failure while executing devices's state init interface"); |
574 | gk20a_err(dev_from_gk20a(g), | 570 | nvgpu_err(g, |
575 | " railIdx = %d, status = 0x%x", i, status); | 571 | " railIdx = %d, status = 0x%x", i, status); |
576 | goto done; | 572 | goto done; |
577 | } | 573 | } |
diff --git a/drivers/gpu/nvgpu/volt/volt_pmu.c b/drivers/gpu/nvgpu/volt/volt_pmu.c index f8167000..dd2a0a63 100644 --- a/drivers/gpu/nvgpu/volt/volt_pmu.c +++ b/drivers/gpu/nvgpu/volt/volt_pmu.c | |||
@@ -38,7 +38,7 @@ static void volt_rpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
38 | gk20a_dbg_info(""); | 38 | gk20a_dbg_info(""); |
39 | 39 | ||
40 | if (msg->msg.volt.msg_type != NV_PMU_VOLT_MSG_ID_RPC) { | 40 | if (msg->msg.volt.msg_type != NV_PMU_VOLT_MSG_ID_RPC) { |
41 | gk20a_err(dev_from_gk20a(g), "unsupported msg for VOLT RPC %x", | 41 | nvgpu_err(g, "unsupported msg for VOLT RPC %x", |
42 | msg->msg.volt.msg_type); | 42 | msg->msg.volt.msg_type); |
43 | return; | 43 | return; |
44 | } | 44 | } |
@@ -82,7 +82,7 @@ static u32 volt_pmu_rpc_execute(struct gk20a *g, | |||
82 | volt_rpc_pmucmdhandler, (void *)&handler, | 82 | volt_rpc_pmucmdhandler, (void *)&handler, |
83 | &seqdesc, ~0); | 83 | &seqdesc, ~0); |
84 | if (status) { | 84 | if (status) { |
85 | gk20a_err(dev_from_gk20a(g), "unable to post volt RPC cmd %x", | 85 | nvgpu_err(g, "unable to post volt RPC cmd %x", |
86 | cmd.cmd.volt.cmd_type); | 86 | cmd.cmd.volt.cmd_type); |
87 | goto volt_pmu_rpc_execute; | 87 | goto volt_pmu_rpc_execute; |
88 | } | 88 | } |
@@ -93,7 +93,7 @@ static u32 volt_pmu_rpc_execute(struct gk20a *g, | |||
93 | 93 | ||
94 | if (handler.success == 0) { | 94 | if (handler.success == 0) { |
95 | status = -EINVAL; | 95 | status = -EINVAL; |
96 | gk20a_err(dev_from_gk20a(g), "rpc call to volt failed"); | 96 | nvgpu_err(g, "rpc call to volt failed"); |
97 | } | 97 | } |
98 | 98 | ||
99 | volt_pmu_rpc_execute: | 99 | volt_pmu_rpc_execute: |
@@ -109,7 +109,7 @@ u32 volt_pmu_send_load_cmd_to_pmu(struct gk20a *g) | |||
109 | 109 | ||
110 | status = volt_pmu_rpc_execute(g, &rpc_call); | 110 | status = volt_pmu_rpc_execute(g, &rpc_call); |
111 | if (status) | 111 | if (status) |
112 | gk20a_err(dev_from_gk20a(g), | 112 | nvgpu_err(g, |
113 | "Error while executing LOAD RPC: status = 0x%08x.", | 113 | "Error while executing LOAD RPC: status = 0x%08x.", |
114 | status); | 114 | status); |
115 | 115 | ||
@@ -126,7 +126,7 @@ static u32 volt_rail_get_voltage(struct gk20a *g, | |||
126 | rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain); | 126 | rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain); |
127 | if ((rail_idx == CTRL_VOLT_RAIL_INDEX_INVALID) || | 127 | if ((rail_idx == CTRL_VOLT_RAIL_INDEX_INVALID) || |
128 | (!VOLT_RAIL_INDEX_IS_VALID(&g->perf_pmu.volt, rail_idx))) { | 128 | (!VOLT_RAIL_INDEX_IS_VALID(&g->perf_pmu.volt, rail_idx))) { |
129 | gk20a_err(dev_from_gk20a(g), | 129 | nvgpu_err(g, |
130 | "failed: volt_domain = %d, voltage rail table = %d.", | 130 | "failed: volt_domain = %d, voltage rail table = %d.", |
131 | volt_domain, rail_idx); | 131 | volt_domain, rail_idx); |
132 | return -EINVAL; | 132 | return -EINVAL; |
@@ -139,7 +139,7 @@ static u32 volt_rail_get_voltage(struct gk20a *g, | |||
139 | /* Execute the voltage get request via PMU RPC. */ | 139 | /* Execute the voltage get request via PMU RPC. */ |
140 | status = volt_pmu_rpc_execute(g, &rpc_call); | 140 | status = volt_pmu_rpc_execute(g, &rpc_call); |
141 | if (status) { | 141 | if (status) { |
142 | gk20a_err(dev_from_gk20a(g), | 142 | nvgpu_err(g, |
143 | "Error while executing volt_rail_get_voltage rpc"); | 143 | "Error while executing volt_rail_get_voltage rpc"); |
144 | return status; | 144 | return status; |
145 | } | 145 | } |
@@ -166,11 +166,10 @@ static u32 volt_policy_set_voltage(struct gk20a *g, u8 client_id, | |||
166 | CTRL_VOLT_DOMAIN_INVALID) || | 166 | CTRL_VOLT_DOMAIN_INVALID) || |
167 | (prail_list->rails[i].voltage_uv == | 167 | (prail_list->rails[i].voltage_uv == |
168 | NV_PMU_VOLT_VALUE_0V_IN_UV)) { | 168 | NV_PMU_VOLT_VALUE_0V_IN_UV)) { |
169 | gk20a_err(dev_from_gk20a(g), "Invalid voltage domain or target "); | 169 | nvgpu_err(g, "Invalid voltage domain or target"); |
170 | gk20a_err(dev_from_gk20a(g), " client_id = %d, listEntry = %d ", | 170 | nvgpu_err(g, " client_id = %d, listEntry = %d", |
171 | client_id, i); | 171 | client_id, i); |
172 | gk20a_err(dev_from_gk20a(g), | 172 | nvgpu_err(g, " volt_domain = %d, voltage_uv = %d uV.", |
173 | "volt_domain = %d, voltage_uv = %d uV.", | ||
174 | prail_list->rails[i].volt_domain, | 173 | prail_list->rails[i].volt_domain, |
175 | prail_list->rails[i].voltage_uv); | 174 | prail_list->rails[i].voltage_uv); |
176 | status = -EINVAL; | 175 | status = -EINVAL; |
@@ -196,7 +195,7 @@ static u32 volt_policy_set_voltage(struct gk20a *g, u8 client_id, | |||
196 | /* Execute the voltage change request via PMU RPC. */ | 195 | /* Execute the voltage change request via PMU RPC. */ |
197 | status = volt_pmu_rpc_execute(g, &rpc_call); | 196 | status = volt_pmu_rpc_execute(g, &rpc_call); |
198 | if (status) | 197 | if (status) |
199 | gk20a_err(dev_from_gk20a(g), | 198 | nvgpu_err(g, |
200 | "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); | 199 | "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); |
201 | 200 | ||
202 | exit: | 201 | exit: |
@@ -244,7 +243,7 @@ static int volt_policy_set_noiseaware_vmin(struct gk20a *g, | |||
244 | /* Execute the voltage change request via PMU RPC. */ | 243 | /* Execute the voltage change request via PMU RPC. */ |
245 | status = volt_pmu_rpc_execute(g, &rpc_call); | 244 | status = volt_pmu_rpc_execute(g, &rpc_call); |
246 | if (status) { | 245 | if (status) { |
247 | gk20a_err(dev_from_gk20a(g), | 246 | nvgpu_err(g, |
248 | "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); | 247 | "Error while executing VOLT_POLICY_SET_VOLTAGE RPC"); |
249 | return -EINVAL; | 248 | return -EINVAL; |
250 | } | 249 | } |
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c index 239b908e..d9d4d9da 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.c +++ b/drivers/gpu/nvgpu/volt/volt_policy.c | |||
@@ -127,7 +127,7 @@ struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs) | |||
127 | sizeof(struct voltage_policy_split_rail_single_step), | 127 | sizeof(struct voltage_policy_split_rail_single_step), |
128 | pargs); | 128 | pargs); |
129 | if (status) { | 129 | if (status) { |
130 | gk20a_err(dev_from_gk20a(g), | 130 | nvgpu_err(g, |
131 | "Could not allocate memory for voltage_policy"); | 131 | "Could not allocate memory for voltage_policy"); |
132 | pboard_obj = NULL; | 132 | pboard_obj = NULL; |
133 | } | 133 | } |
@@ -219,7 +219,7 @@ static u32 volt_get_volt_policy_table(struct gk20a *g, | |||
219 | ppolicy = volt_volt_policy_construct(g, | 219 | ppolicy = volt_volt_policy_construct(g, |
220 | (void *)&policy_type_data); | 220 | (void *)&policy_type_data); |
221 | if (ppolicy == NULL) { | 221 | if (ppolicy == NULL) { |
222 | gk20a_err(dev_from_gk20a(g), | 222 | nvgpu_err(g, |
223 | "Failure to construct VOLT_POLICY object."); | 223 | "Failure to construct VOLT_POLICY object."); |
224 | status = -EINVAL; | 224 | status = -EINVAL; |
225 | goto done; | 225 | goto done; |
@@ -229,7 +229,7 @@ static u32 volt_get_volt_policy_table(struct gk20a *g, | |||
229 | &pvolt_policy_metadata->volt_policies.super, | 229 | &pvolt_policy_metadata->volt_policies.super, |
230 | (struct boardobj *)ppolicy, i); | 230 | (struct boardobj *)ppolicy, i); |
231 | if (status) { | 231 | if (status) { |
232 | gk20a_err(dev_from_gk20a(g), | 232 | nvgpu_err(g, |
233 | "could not add volt_policy for entry %d into boardobjgrp ", | 233 | "could not add volt_policy for entry %d into boardobjgrp ", |
234 | i); | 234 | i); |
235 | goto done; | 235 | goto done; |
@@ -307,7 +307,7 @@ u32 volt_policy_sw_setup(struct gk20a *g) | |||
307 | status = boardobjgrpconstruct_e32( | 307 | status = boardobjgrpconstruct_e32( |
308 | &g->perf_pmu.volt.volt_policy_metadata.volt_policies); | 308 | &g->perf_pmu.volt.volt_policy_metadata.volt_policies); |
309 | if (status) { | 309 | if (status) { |
310 | gk20a_err(dev_from_gk20a(g), | 310 | nvgpu_err(g, |
311 | "error creating boardobjgrp for volt rail, status - 0x%x", | 311 | "error creating boardobjgrp for volt rail, status - 0x%x", |
312 | status); | 312 | status); |
313 | goto done; | 313 | goto done; |
@@ -331,7 +331,7 @@ u32 volt_policy_sw_setup(struct gk20a *g) | |||
331 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, | 331 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, |
332 | volt, VOLT, volt_policy, VOLT_POLICY); | 332 | volt, VOLT, volt_policy, VOLT_POLICY); |
333 | if (status) { | 333 | if (status) { |
334 | gk20a_err(dev_from_gk20a(g), | 334 | nvgpu_err(g, |
335 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 335 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
336 | status); | 336 | status); |
337 | goto done; | 337 | goto done; |
@@ -341,7 +341,7 @@ u32 volt_policy_sw_setup(struct gk20a *g) | |||
341 | &g->perf_pmu.volt.volt_policy_metadata.volt_policies.super, | 341 | &g->perf_pmu.volt.volt_policy_metadata.volt_policies.super, |
342 | volt, VOLT, volt_policy, VOLT_POLICY); | 342 | volt, VOLT, volt_policy, VOLT_POLICY); |
343 | if (status) { | 343 | if (status) { |
344 | gk20a_err(dev_from_gk20a(g), | 344 | nvgpu_err(g, |
345 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 345 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
346 | status); | 346 | status); |
347 | goto done; | 347 | goto done; |
diff --git a/drivers/gpu/nvgpu/volt/volt_rail.c b/drivers/gpu/nvgpu/volt/volt_rail.c index aaad86a5..778c531e 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.c +++ b/drivers/gpu/nvgpu/volt/volt_rail.c | |||
@@ -64,7 +64,7 @@ u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail | |||
64 | 64 | ||
65 | exit: | 65 | exit: |
66 | if (status) | 66 | if (status) |
67 | gk20a_err(dev_from_gk20a(g), "Failed to register VOLTAGE_DEVICE"); | 67 | nvgpu_err(g, "Failed to register VOLTAGE_DEVICE"); |
68 | 68 | ||
69 | return status; | 69 | return status; |
70 | } | 70 | } |
@@ -94,7 +94,7 @@ static u32 volt_rail_state_init(struct gk20a *g, | |||
94 | 94 | ||
95 | status = boardobjgrpmask_e32_init(&pvolt_rail->volt_dev_mask, NULL); | 95 | status = boardobjgrpmask_e32_init(&pvolt_rail->volt_dev_mask, NULL); |
96 | if (status) { | 96 | if (status) { |
97 | gk20a_err(dev_from_gk20a(g), | 97 | nvgpu_err(g, |
98 | "Failed to initialize BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); | 98 | "Failed to initialize BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); |
99 | } | 99 | } |
100 | 100 | ||
@@ -138,7 +138,7 @@ static u32 volt_rail_init_pmudata_super(struct gk20a *g, | |||
138 | prail->volt_dev_mask.super.bitcount, | 138 | prail->volt_dev_mask.super.bitcount, |
139 | &rail_pmu_data->volt_dev_mask.super); | 139 | &rail_pmu_data->volt_dev_mask.super); |
140 | if (status) | 140 | if (status) |
141 | gk20a_err(dev_from_gk20a(g), | 141 | nvgpu_err(g, |
142 | "Failed to export BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); | 142 | "Failed to export BOARDOBJGRPMASK of VOLTAGE_DEVICEs"); |
143 | 143 | ||
144 | gk20a_dbg_info("Done"); | 144 | gk20a_dbg_info("Done"); |
@@ -370,7 +370,7 @@ u32 volt_rail_sw_setup(struct gk20a *g) | |||
370 | status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_rail_metadata. | 370 | status = boardobjgrpconstruct_e32(&g->perf_pmu.volt.volt_rail_metadata. |
371 | volt_rails); | 371 | volt_rails); |
372 | if (status) { | 372 | if (status) { |
373 | gk20a_err(dev_from_gk20a(g), | 373 | nvgpu_err(g, |
374 | "error creating boardobjgrp for volt rail, status - 0x%x", | 374 | "error creating boardobjgrp for volt rail, status - 0x%x", |
375 | status); | 375 | status); |
376 | goto done; | 376 | goto done; |
@@ -396,7 +396,7 @@ u32 volt_rail_sw_setup(struct gk20a *g) | |||
396 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, | 396 | status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, |
397 | volt, VOLT, volt_rail, VOLT_RAIL); | 397 | volt, VOLT, volt_rail, VOLT_RAIL); |
398 | if (status) { | 398 | if (status) { |
399 | gk20a_err(dev_from_gk20a(g), | 399 | nvgpu_err(g, |
400 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 400 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
401 | status); | 401 | status); |
402 | goto done; | 402 | goto done; |
@@ -406,7 +406,7 @@ u32 volt_rail_sw_setup(struct gk20a *g) | |||
406 | &g->perf_pmu.volt.volt_rail_metadata.volt_rails.super, | 406 | &g->perf_pmu.volt.volt_rail_metadata.volt_rails.super, |
407 | volt, VOLT, volt_rail, VOLT_RAIL); | 407 | volt, VOLT, volt_rail, VOLT_RAIL); |
408 | if (status) { | 408 | if (status) { |
409 | gk20a_err(dev_from_gk20a(g), | 409 | nvgpu_err(g, |
410 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", | 410 | "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x", |
411 | status); | 411 | status); |
412 | goto done; | 412 | goto done; |
@@ -418,7 +418,7 @@ u32 volt_rail_sw_setup(struct gk20a *g) | |||
418 | struct voltage_rail *, pvolt_rail, i) { | 418 | struct voltage_rail *, pvolt_rail, i) { |
419 | status = volt_rail_state_init(g, pvolt_rail); | 419 | status = volt_rail_state_init(g, pvolt_rail); |
420 | if (status) { | 420 | if (status) { |
421 | gk20a_err(dev_from_gk20a(g), | 421 | nvgpu_err(g, |
422 | "Failure while executing RAIL's state init railIdx = %d", | 422 | "Failure while executing RAIL's state init railIdx = %d", |
423 | i); | 423 | i); |
424 | goto done; | 424 | goto done; |