diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 6 |
2 files changed, 19 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 64466936..384ca28d 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -1645,17 +1645,24 @@ static int gr_gp10b_disable_channel_or_tsg(struct gk20a *g, struct channel_gk20a | |||
1645 | 1645 | ||
1646 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: restarted runlist"); | 1646 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: restarted runlist"); |
1647 | 1647 | ||
1648 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) | 1648 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, |
1649 | "CILP: tsgid: 0x%x", fault_ch->tsgid); | ||
1650 | |||
1651 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) { | ||
1649 | gk20a_fifo_issue_preempt(g, fault_ch->tsgid, true); | 1652 | gk20a_fifo_issue_preempt(g, fault_ch->tsgid, true); |
1650 | else | 1653 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, |
1654 | "CILP: preempted tsg"); | ||
1655 | } else { | ||
1651 | gk20a_fifo_issue_preempt(g, fault_ch->hw_chid, false); | 1656 | gk20a_fifo_issue_preempt(g, fault_ch->hw_chid, false); |
1652 | 1657 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, | |
1653 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: preempted the channel/tsg"); | 1658 | "CILP: preempted channel"); |
1659 | } | ||
1654 | 1660 | ||
1655 | return ret; | 1661 | return ret; |
1656 | } | 1662 | } |
1657 | 1663 | ||
1658 | static int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g, struct channel_gk20a *fault_ch) | 1664 | int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g, |
1665 | struct channel_gk20a *fault_ch) | ||
1659 | { | 1666 | { |
1660 | int ret; | 1667 | int ret; |
1661 | struct gr_ctx_desc *gr_ctx = fault_ch->ch_ctx.gr_ctx; | 1668 | struct gr_ctx_desc *gr_ctx = fault_ch->ch_ctx.gr_ctx; |
@@ -1888,7 +1895,7 @@ static int gr_gp10b_get_cilp_preempt_pending_chid(struct gk20a *g, int *__chid) | |||
1888 | return ret; | 1895 | return ret; |
1889 | } | 1896 | } |
1890 | 1897 | ||
1891 | static int gr_gp10b_handle_fecs_error(struct gk20a *g, | 1898 | int gr_gp10b_handle_fecs_error(struct gk20a *g, |
1892 | struct channel_gk20a *__ch, | 1899 | struct channel_gk20a *__ch, |
1893 | struct gr_gk20a_isr_data *isr_data) | 1900 | struct gr_gk20a_isr_data *isr_data) |
1894 | { | 1901 | { |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 81ec7927..76e48075 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -21,6 +21,7 @@ | |||
21 | #include "gk20a/mm_gk20a.h" | 21 | #include "gk20a/mm_gk20a.h" |
22 | 22 | ||
23 | struct gpu_ops; | 23 | struct gpu_ops; |
24 | struct gr_gk20a_isr_data; | ||
24 | 25 | ||
25 | enum { | 26 | enum { |
26 | PASCAL_CHANNEL_GPFIFO_A = 0xC06F, | 27 | PASCAL_CHANNEL_GPFIFO_A = 0xC06F, |
@@ -44,6 +45,11 @@ int gr_gp10b_init_fs_state(struct gk20a *g); | |||
44 | int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, | 45 | int gr_gp10b_alloc_buffer(struct vm_gk20a *vm, size_t size, |
45 | struct nvgpu_mem *mem); | 46 | struct nvgpu_mem *mem); |
46 | void gr_gp10b_create_sysfs(struct device *dev); | 47 | void gr_gp10b_create_sysfs(struct device *dev); |
48 | int gr_gp10b_handle_fecs_error(struct gk20a *g, | ||
49 | struct channel_gk20a *__ch, | ||
50 | struct gr_gk20a_isr_data *isr_data); | ||
51 | int gr_gp10b_set_cilp_preempt_pending(struct gk20a *g, | ||
52 | struct channel_gk20a *fault_ch); | ||
47 | 53 | ||
48 | struct gr_t18x { | 54 | struct gr_t18x { |
49 | struct { | 55 | struct { |