diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.c | 37 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/clk_gp106.h | 15 |
2 files changed, 28 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.c b/drivers/gpu/nvgpu/gp106/clk_gp106.c index d19baac5..057527a9 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.c +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.c | |||
@@ -106,47 +106,56 @@ int gp106_init_clk_support(struct gk20a *g) | |||
106 | .is_enable = 1, | 106 | .is_enable = 1, |
107 | .is_counter = 1, | 107 | .is_counter = 1, |
108 | .g = g, | 108 | .g = g, |
109 | .cntr.reg_ctrl_addr = trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_r(), | 109 | .cntr = { |
110 | .cntr.reg_ctrl_idx = | 110 | .reg_ctrl_addr = trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_r(), |
111 | trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_source_gpc2clk_f(), | 111 | .reg_ctrl_idx = trim_gpc_bcast_clk_cntr_ncgpcclk_cfg_source_gpc2clk_f(), |
112 | .cntr.reg_cntr_addr = trim_gpc_bcast_clk_cntr_ncgpcclk_cnt_r(), | 112 | .reg_cntr_addr = trim_gpc_bcast_clk_cntr_ncgpcclk_cnt_r() |
113 | }, | ||
113 | .name = "gpc2clk", | 114 | .name = "gpc2clk", |
114 | .scale = 1 | 115 | .scale = 1 |
115 | }; | 116 | }; |
116 | clk->namemap_xlat_table[0] = CTRL_CLK_DOMAIN_GPC2CLK; | 117 | clk->namemap_xlat_table[0] = CTRL_CLK_DOMAIN_GPC2CLK; |
118 | |||
117 | clk->clk_namemap[1] = (struct namemap_cfg) { | 119 | clk->clk_namemap[1] = (struct namemap_cfg) { |
118 | .namemap = CLK_NAMEMAP_INDEX_SYS2CLK, | 120 | .namemap = CLK_NAMEMAP_INDEX_SYS2CLK, |
119 | .is_enable = 1, | 121 | .is_enable = 1, |
120 | .is_counter = 1, | 122 | .is_counter = 1, |
121 | .g = g, | 123 | .g = g, |
122 | .cntr.reg_ctrl_addr = trim_sys_clk_cntr_ncsyspll_cfg_r(), | 124 | .cntr = { |
123 | .cntr.reg_ctrl_idx = trim_sys_clk_cntr_ncsyspll_cfg_source_sys2clk_f(), | 125 | .reg_ctrl_addr = trim_sys_clk_cntr_ncsyspll_cfg_r(), |
124 | .cntr.reg_cntr_addr = trim_sys_clk_cntr_ncsyspll_cnt_r(), | 126 | .reg_ctrl_idx = trim_sys_clk_cntr_ncsyspll_cfg_source_sys2clk_f(), |
127 | .reg_cntr_addr = trim_sys_clk_cntr_ncsyspll_cnt_r() | ||
128 | }, | ||
125 | .name = "sys2clk", | 129 | .name = "sys2clk", |
126 | .scale = 1 | 130 | .scale = 1 |
127 | }; | 131 | }; |
128 | clk->namemap_xlat_table[1] = CTRL_CLK_DOMAIN_SYS2CLK; | 132 | clk->namemap_xlat_table[1] = CTRL_CLK_DOMAIN_SYS2CLK; |
133 | |||
129 | clk->clk_namemap[2] = (struct namemap_cfg) { | 134 | clk->clk_namemap[2] = (struct namemap_cfg) { |
130 | .namemap = CLK_NAMEMAP_INDEX_XBAR2CLK, | 135 | .namemap = CLK_NAMEMAP_INDEX_XBAR2CLK, |
131 | .is_enable = 1, | 136 | .is_enable = 1, |
132 | .is_counter = 1, | 137 | .is_counter = 1, |
133 | .g = g, | 138 | .g = g, |
134 | .cntr.reg_ctrl_addr = trim_sys_clk_cntr_ncltcpll_cfg_r(), | 139 | .cntr = { |
135 | .cntr.reg_ctrl_idx = trim_sys_clk_cntr_ncltcpll_cfg_source_xbar2clk_f(), | 140 | .reg_ctrl_addr = trim_sys_clk_cntr_ncltcpll_cfg_r(), |
136 | .cntr.reg_cntr_addr = trim_sys_clk_cntr_ncltcpll_cnt_r(), | 141 | .reg_ctrl_idx = trim_sys_clk_cntr_ncltcpll_cfg_source_xbar2clk_f(), |
142 | .reg_cntr_addr = trim_sys_clk_cntr_ncltcpll_cnt_r() | ||
143 | }, | ||
137 | .name = "xbar2clk", | 144 | .name = "xbar2clk", |
138 | .scale = 1 | 145 | .scale = 1 |
139 | }; | 146 | }; |
140 | clk->namemap_xlat_table[2] = CTRL_CLK_DOMAIN_XBAR2CLK; | 147 | clk->namemap_xlat_table[2] = CTRL_CLK_DOMAIN_XBAR2CLK; |
148 | |||
141 | clk->clk_namemap[3] = (struct namemap_cfg) { | 149 | clk->clk_namemap[3] = (struct namemap_cfg) { |
142 | .namemap = CLK_NAMEMAP_INDEX_DRAMCLK, | 150 | .namemap = CLK_NAMEMAP_INDEX_DRAMCLK, |
143 | .is_enable = 1, | 151 | .is_enable = 1, |
144 | .is_counter = 1, | 152 | .is_counter = 1, |
145 | .g = g, | 153 | .g = g, |
146 | .cntr.reg_ctrl_addr = trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_r(), | 154 | .cntr = { |
147 | .cntr.reg_ctrl_idx = | 155 | .reg_ctrl_addr = trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_r(), |
148 | trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_source_dramdiv4_rec_clk1_f(), | 156 | .reg_ctrl_idx = trim_fbpa_bcast_clk_cntr_ncltcclk_cfg_source_dramdiv4_rec_clk1_f(), |
149 | .cntr.reg_cntr_addr = trim_fbpa_bcast_clk_cntr_ncltcclk_cnt_r(), | 157 | .reg_cntr_addr = trim_fbpa_bcast_clk_cntr_ncltcclk_cnt_r() |
158 | }, | ||
150 | .name = "dramdiv2_rec_clk1", | 159 | .name = "dramdiv2_rec_clk1", |
151 | .scale = 2 | 160 | .scale = 2 |
152 | }; | 161 | }; |
diff --git a/drivers/gpu/nvgpu/gp106/clk_gp106.h b/drivers/gpu/nvgpu/gp106/clk_gp106.h index 0342d927..97baa224 100644 --- a/drivers/gpu/nvgpu/gp106/clk_gp106.h +++ b/drivers/gpu/nvgpu/gp106/clk_gp106.h | |||
@@ -43,16 +43,11 @@ struct namemap_cfg { | |||
43 | u32 is_enable; /* Namemap enabled */ | 43 | u32 is_enable; /* Namemap enabled */ |
44 | u32 is_counter; /* Using cntr */ | 44 | u32 is_counter; /* Using cntr */ |
45 | struct gk20a *g; | 45 | struct gk20a *g; |
46 | union { | 46 | struct { |
47 | struct { | 47 | u32 reg_ctrl_addr; |
48 | u32 reg_ctrl_addr; | 48 | u32 reg_ctrl_idx; |
49 | u32 reg_ctrl_idx; | 49 | u32 reg_cntr_addr; |
50 | u32 reg_cntr_addr; | 50 | } cntr; |
51 | } cntr; | ||
52 | struct { | ||
53 | /* Todo */ | ||
54 | } pll; | ||
55 | }; | ||
56 | u32 scale; | 51 | u32 scale; |
57 | char name[24]; | 52 | char name[24]; |
58 | }; | 53 | }; |