diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gp10b.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gv100.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gv11b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fuse/fuse_gm20b.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fuse/fuse_gp106.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fuse/fuse_gp10b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/xve/xve_gp106.h | 6 |
10 files changed, 34 insertions, 34 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gp10b.h b/drivers/gpu/nvgpu/common/fb/fb_gp10b.h index 52aa2a75..3012cb20 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gp10b.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gp10b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP10B FB | 2 | * GP10B FB |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,11 +22,11 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GP10B_FB | 25 | #ifndef NVGPU_FB_GP10B_H |
26 | #define _NVGPU_GP10B_FB | 26 | #define NVGPU_FB_GP10B_H |
27 | struct gk20a; | 27 | struct gk20a; |
28 | 28 | ||
29 | unsigned int gp10b_fb_compression_page_size(struct gk20a *g); | 29 | unsigned int gp10b_fb_compression_page_size(struct gk20a *g); |
30 | unsigned int gp10b_fb_compressible_page_size(struct gk20a *g); | 30 | unsigned int gp10b_fb_compressible_page_size(struct gk20a *g); |
31 | 31 | ||
32 | #endif | 32 | #endif /* NVGPU_FB_GP10B_H */ |
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.h b/drivers/gpu/nvgpu/common/fb/fb_gv100.h index d47fded2..161d4cd7 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv100.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 FB | 2 | * GV100 FB |
3 | * | 3 | * |
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GV100_FB | 25 | #ifndef NVGPU_FB_GV100_H |
26 | #define _NVGPU_GV100_FB | 26 | #define NVGPU_FB_GV100_H |
27 | 27 | ||
28 | struct gk20a; | 28 | struct gk20a; |
29 | 29 | ||
@@ -35,4 +35,4 @@ int gv100_fb_init_nvlink(struct gk20a *g); | |||
35 | int gv100_fb_enable_nvlink(struct gk20a *g); | 35 | int gv100_fb_enable_nvlink(struct gk20a *g); |
36 | size_t gv100_fb_get_vidmem_size(struct gk20a *g); | 36 | size_t gv100_fb_get_vidmem_size(struct gk20a *g); |
37 | 37 | ||
38 | #endif | 38 | #endif /* NVGPU_FB_GV100_H */ |
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv11b.h b/drivers/gpu/nvgpu/common/fb/fb_gv11b.h index 71fb3a41..66bf8e2c 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv11b.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gv11b.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GV11B_FB | 25 | #ifndef NVGPU_FB_GV11B_H |
26 | #define _NVGPU_GV11B_FB | 26 | #define NVGPU_FB_GV11B_H |
27 | 27 | ||
28 | #define NONREPLAY_REG_INDEX 0 | 28 | #define NONREPLAY_REG_INDEX 0 |
29 | #define REPLAY_REG_INDEX 1 | 29 | #define REPLAY_REG_INDEX 1 |
@@ -79,4 +79,4 @@ void fb_gv11b_write_mmu_fault_status(struct gk20a *g, u32 reg_val); | |||
79 | int gv11b_fb_mmu_invalidate_replay(struct gk20a *g, | 79 | int gv11b_fb_mmu_invalidate_replay(struct gk20a *g, |
80 | u32 invalidate_replay_val); | 80 | u32 invalidate_replay_val); |
81 | 81 | ||
82 | #endif | 82 | #endif /* NVGPU_FB_GV11B_H */ |
diff --git a/drivers/gpu/nvgpu/common/fuse/fuse_gm20b.h b/drivers/gpu/nvgpu/common/fuse/fuse_gm20b.h index b22499ad..a543a1e5 100644 --- a/drivers/gpu/nvgpu/common/fuse/fuse_gm20b.h +++ b/drivers/gpu/nvgpu/common/fuse/fuse_gm20b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GM20B FUSE | 2 | * GM20B FUSE |
3 | * | 3 | * |
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GM20B_FUSE | 25 | #ifndef NVGPU_FUSE_GM20B_H |
26 | #define _NVGPU_GM20B_FUSE | 26 | #define NVGPU_FUSE_GM20B_H |
27 | 27 | ||
28 | #define GCPLEX_CONFIG_VPR_AUTO_FETCH_DISABLE_MASK ((u32)(1 << 0)) | 28 | #define GCPLEX_CONFIG_VPR_AUTO_FETCH_DISABLE_MASK ((u32)(1 << 0)) |
29 | #define GCPLEX_CONFIG_VPR_ENABLED_MASK ((u32)(1 << 1)) | 29 | #define GCPLEX_CONFIG_VPR_ENABLED_MASK ((u32)(1 << 1)) |
@@ -42,4 +42,4 @@ void gm20b_fuse_ctrl_opt_tpc_gpc(struct gk20a *g, u32 gpc, u32 val); | |||
42 | u32 gm20b_fuse_opt_sec_debug_en(struct gk20a *g); | 42 | u32 gm20b_fuse_opt_sec_debug_en(struct gk20a *g); |
43 | u32 gm20b_fuse_opt_priv_sec_en(struct gk20a *g); | 43 | u32 gm20b_fuse_opt_priv_sec_en(struct gk20a *g); |
44 | 44 | ||
45 | #endif | 45 | #endif /* NVGPU_FUSE_GM20B_H */ |
diff --git a/drivers/gpu/nvgpu/common/fuse/fuse_gp106.h b/drivers/gpu/nvgpu/common/fuse/fuse_gp106.h index f014ee8c..24be7982 100644 --- a/drivers/gpu/nvgpu/common/fuse/fuse_gp106.h +++ b/drivers/gpu/nvgpu/common/fuse/fuse_gp106.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GP106 FUSE | 2 | * GP106 FUSE |
3 | * | 3 | * |
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GP106_FUSE | 25 | #ifndef NVGPU_FUSE_GP106_H |
26 | #define _NVGPU_GP106_FUSE | 26 | #define NVGPU_FUSE_GP106_H |
27 | 27 | ||
28 | struct gk20a; | 28 | struct gk20a; |
29 | 29 | ||
@@ -36,4 +36,4 @@ u32 gp106_fuse_read_vin_cal_gain_offset_fuse(struct gk20a *g, | |||
36 | u32 vin_id, s8 *gain, | 36 | u32 vin_id, s8 *gain, |
37 | s8 *offset); | 37 | s8 *offset); |
38 | 38 | ||
39 | #endif | 39 | #endif /* NVGPU_FUSE_GP106_H */ |
diff --git a/drivers/gpu/nvgpu/common/fuse/fuse_gp10b.h b/drivers/gpu/nvgpu/common/fuse/fuse_gp10b.h index d9037e22..4d3b2b07 100644 --- a/drivers/gpu/nvgpu/common/fuse/fuse_gp10b.h +++ b/drivers/gpu/nvgpu/common/fuse/fuse_gp10b.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVGPU_GP10B_FUSE | 25 | #ifndef NVGPU_FUSE_GP10B_H |
26 | #define _NVGPU_GP10B_FUSE | 26 | #define NVGPU_FUSE_GP10B_H |
27 | 27 | ||
28 | struct gk20a; | 28 | struct gk20a; |
29 | 29 | ||
@@ -31,4 +31,4 @@ int gp10b_fuse_check_priv_security(struct gk20a *g); | |||
31 | bool gp10b_fuse_is_opt_ecc_enable(struct gk20a *g); | 31 | bool gp10b_fuse_is_opt_ecc_enable(struct gk20a *g); |
32 | bool gp10b_fuse_is_opt_feature_override_disable(struct gk20a *g); | 32 | bool gp10b_fuse_is_opt_feature_override_disable(struct gk20a *g); |
33 | 33 | ||
34 | #endif | 34 | #endif /* NVGPU_FUSE_GP10B_H */ |
diff --git a/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h b/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h index 7a22f030..794922d7 100644 --- a/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h +++ b/drivers/gpu/nvgpu/common/mm/buddy_allocator_priv.h | |||
@@ -20,8 +20,8 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef BUDDY_ALLOCATOR_PRIV_H | 23 | #ifndef NVGPU_MM_BUDDY_ALLOCATOR_PRIV_H |
24 | #define BUDDY_ALLOCATOR_PRIV_H | 24 | #define NVGPU_MM_BUDDY_ALLOCATOR_PRIV_H |
25 | 25 | ||
26 | #include <nvgpu/rbtree.h> | 26 | #include <nvgpu/rbtree.h> |
27 | #include <nvgpu/list.h> | 27 | #include <nvgpu/list.h> |
@@ -221,4 +221,4 @@ static inline struct nvgpu_allocator *balloc_owner( | |||
221 | return a->owner; | 221 | return a->owner; |
222 | } | 222 | } |
223 | 223 | ||
224 | #endif | 224 | #endif /* NVGPU_MM_BUDDY_ALLOCATOR_PRIV_H */ |
diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h index 02f20515..13d1a8ce 100644 --- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h | |||
@@ -19,8 +19,8 @@ | |||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | #ifndef __PRIV_RING_GM20B_H__ | 22 | #ifndef NVGPU_PRIV_RING_GM20B_H |
23 | #define __PRIV_RING_GM20B_H__ | 23 | #define NVGPU_PRIV_RING_GM20B_H |
24 | 24 | ||
25 | struct gk20a; | 25 | struct gk20a; |
26 | 26 | ||
@@ -29,4 +29,4 @@ void gm20b_priv_ring_enable(struct gk20a *g); | |||
29 | void gm20b_priv_set_timeout_settings(struct gk20a *g); | 29 | void gm20b_priv_set_timeout_settings(struct gk20a *g); |
30 | u32 gm20b_priv_ring_enum_ltc(struct gk20a *g); | 30 | u32 gm20b_priv_ring_enum_ltc(struct gk20a *g); |
31 | 31 | ||
32 | #endif /*__PRIV_RING_GM20B_H__*/ | 32 | #endif /* NVGPU_PRIV_RING_GM20B_H */ |
diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h index dd418e5b..db96ec04 100644 --- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h +++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h | |||
@@ -21,8 +21,8 @@ | |||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | #ifndef __PRIV_RING_GP10B_H__ | 24 | #ifndef NVGPU_PRIV_RING_GP10B_H |
25 | #define __PRIV_RING_GP10B_H__ | 25 | #define NVGPU_PRIV_RING_GP10B_H |
26 | 26 | ||
27 | struct gk20a; | 27 | struct gk20a; |
28 | 28 | ||
@@ -30,4 +30,4 @@ void gp10b_priv_ring_isr(struct gk20a *g); | |||
30 | void gp10b_priv_ring_decode_error_code(struct gk20a *g, | 30 | void gp10b_priv_ring_decode_error_code(struct gk20a *g, |
31 | u32 error_code); | 31 | u32 error_code); |
32 | 32 | ||
33 | #endif /*__PRIV_RING_GP10B_H__*/ | 33 | #endif /* NVGPU_PRIV_RING_GP10B_H */ |
diff --git a/drivers/gpu/nvgpu/common/xve/xve_gp106.h b/drivers/gpu/nvgpu/common/xve/xve_gp106.h index e0be35ac..992f0c86 100644 --- a/drivers/gpu/nvgpu/common/xve/xve_gp106.h +++ b/drivers/gpu/nvgpu/common/xve/xve_gp106.h | |||
@@ -20,8 +20,8 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #ifndef __XVE_GP106_H__ | 23 | #ifndef NVGPU_XVE_GP106_H |
24 | #define __XVE_GP106_H__ | 24 | #define NVGPU_XVE_GP106_H |
25 | 25 | ||
26 | #include "gk20a/gk20a.h" | 26 | #include "gk20a/gk20a.h" |
27 | 27 | ||
@@ -69,4 +69,4 @@ void xve_rearm_msi_gp106(struct gk20a *g); | |||
69 | void xve_enable_shadow_rom_gp106(struct gk20a *g); | 69 | void xve_enable_shadow_rom_gp106(struct gk20a *g); |
70 | void xve_disable_shadow_rom_gp106(struct gk20a *g); | 70 | void xve_disable_shadow_rom_gp106(struct gk20a *g); |
71 | 71 | ||
72 | #endif | 72 | #endif /* NVGPU_XVE_GP106_H */ |