diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_fw.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/perf/perf.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/perf/perf.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pstate/pstate.c | 2 |
6 files changed, 52 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c index 95ddb71c..9c9e3fe8 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c | |||
@@ -1311,6 +1311,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1311 | clk_avfs_get_vin_cal_fuse_v20; | 1311 | clk_avfs_get_vin_cal_fuse_v20; |
1312 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = | 1312 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = |
1313 | nvgpu_clk_vf_change_inject_data_fill_gv10x; | 1313 | nvgpu_clk_vf_change_inject_data_fill_gv10x; |
1314 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = | ||
1315 | perf_pmu_vfe_load_gv10x; | ||
1314 | } else { | 1316 | } else { |
1315 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = | 1317 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = |
1316 | get_pmu_init_msg_pmu_queue_params_v4; | 1318 | get_pmu_init_msg_pmu_queue_params_v4; |
@@ -1482,6 +1484,10 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1482 | clk_avfs_get_vin_cal_fuse_v10; | 1484 | clk_avfs_get_vin_cal_fuse_v10; |
1483 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = | 1485 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = |
1484 | nvgpu_clk_vf_change_inject_data_fill_gp10x; | 1486 | nvgpu_clk_vf_change_inject_data_fill_gp10x; |
1487 | g->ops.pmu_ver.clk.clk_set_boot_clk = | ||
1488 | nvgpu_clk_set_boot_fll_clk_gv10x; | ||
1489 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = | ||
1490 | perf_pmu_vfe_load; | ||
1485 | break; | 1491 | break; |
1486 | case APP_VERSION_GM20B: | 1492 | case APP_VERSION_GM20B: |
1487 | g->ops.pmu_ver.pg_cmd_eng_buf_load_size = | 1493 | g->ops.pmu_ver.pg_cmd_eng_buf_load_size = |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 38952daf..f71ddc2c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -819,6 +819,7 @@ struct gpu_ops { | |||
819 | u32 (*clk_vf_change_inject_data_fill)(struct gk20a *g, | 819 | u32 (*clk_vf_change_inject_data_fill)(struct gk20a *g, |
820 | struct nv_pmu_clk_rpc *rpccall, | 820 | struct nv_pmu_clk_rpc *rpccall, |
821 | struct set_fll_clk *setfllclk); | 821 | struct set_fll_clk *setfllclk); |
822 | u32 (*perf_pmu_vfe_load)(struct gk20a *g); | ||
822 | }clk; | 823 | }clk; |
823 | } pmu_ver; | 824 | } pmu_ver; |
824 | struct { | 825 | struct { |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h index 83d08afc..aedf7988 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperf.h | |||
@@ -37,6 +37,34 @@ | |||
37 | #define NV_PMU_PERF_CMD_ID_BOARDOBJ_GRP_SET (0x00000003) | 37 | #define NV_PMU_PERF_CMD_ID_BOARDOBJ_GRP_SET (0x00000003) |
38 | #define NV_PMU_PERF_CMD_ID_BOARDOBJ_GRP_GET_STATUS (0x00000004) | 38 | #define NV_PMU_PERF_CMD_ID_BOARDOBJ_GRP_GET_STATUS (0x00000004) |
39 | 39 | ||
40 | /*! | ||
41 | * RPC calls serviced by PERF unit. | ||
42 | */ | ||
43 | #define NV_PMU_RPC_ID_PERF_BOARD_OBJ_GRP_CMD 0x00 | ||
44 | #define NV_PMU_RPC_ID_PERF_LOAD 0x01 | ||
45 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_INFO_GET 0x02 | ||
46 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_INFO_SET 0x03 | ||
47 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_SET_CONTROL 0x04 | ||
48 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_QUEUE_CHANGE 0x05 | ||
49 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_LOCK 0x06 | ||
50 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_LOAD 0x07 | ||
51 | #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_QUERY 0x08 | ||
52 | #define NV_PMU_RPC_ID_PERF_PERF_LIMITS_INVALIDATE 0x09 | ||
53 | #define NV_PMU_RPC_ID_PERF_VFE_EQU_EVAL 0x0A | ||
54 | #define NV_PMU_RPC_ID_PERF_VFE_INVALIDATE 0x0B | ||
55 | #define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_SET 0x0C | ||
56 | #define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_GET 0x0D | ||
57 | #define NV_PMU_RPC_ID_PERF__COUNT 0x0E | ||
58 | /* | ||
59 | * Defines the structure that holds data | ||
60 | * used to execute LOAD RPC. | ||
61 | */ | ||
62 | struct nv_pmu_rpc_struct_perf_load { | ||
63 | /*[IN/OUT] Must be first field in RPC structure */ | ||
64 | struct nv_pmu_rpc_header hdr; | ||
65 | u32 scratch[1]; | ||
66 | }; | ||
67 | |||
40 | struct nv_pmu_perf_cmd_set_object { | 68 | struct nv_pmu_perf_cmd_set_object { |
41 | u8 cmd_type; | 69 | u8 cmd_type; |
42 | u8 pad[2]; | 70 | u8 pad[2]; |
diff --git a/drivers/gpu/nvgpu/perf/perf.c b/drivers/gpu/nvgpu/perf/perf.c index bf63e1ea..900496fd 100644 --- a/drivers/gpu/nvgpu/perf/perf.c +++ b/drivers/gpu/nvgpu/perf/perf.c | |||
@@ -65,6 +65,21 @@ static int pmu_handle_perf_event(struct gk20a *g, void *pmu_msg) | |||
65 | return 0; | 65 | return 0; |
66 | } | 66 | } |
67 | 67 | ||
68 | u32 perf_pmu_vfe_load_gv10x(struct gk20a *g) | ||
69 | { | ||
70 | struct nvgpu_pmu *pmu = &g->pmu; | ||
71 | struct nv_pmu_rpc_struct_perf_load rpc; | ||
72 | u32 status = 0; | ||
73 | |||
74 | memset(&rpc, 0, sizeof(struct nv_pmu_rpc_struct_perf_load)); | ||
75 | PMU_RPC_EXECUTE_CPB(status, pmu, PERF, VFE_INVALIDATE, &rpc, 0); | ||
76 | if (status) { | ||
77 | nvgpu_err(g, "Failed to execute RPC status=0x%x", | ||
78 | status); | ||
79 | } | ||
80 | return status; | ||
81 | } | ||
82 | |||
68 | u32 perf_pmu_vfe_load(struct gk20a *g) | 83 | u32 perf_pmu_vfe_load(struct gk20a *g) |
69 | { | 84 | { |
70 | struct pmu_cmd cmd; | 85 | struct pmu_cmd cmd; |
diff --git a/drivers/gpu/nvgpu/perf/perf.h b/drivers/gpu/nvgpu/perf/perf.h index c3708f61..180efb2c 100644 --- a/drivers/gpu/nvgpu/perf/perf.h +++ b/drivers/gpu/nvgpu/perf/perf.h | |||
@@ -74,5 +74,6 @@ struct perf_pmupstate { | |||
74 | }; | 74 | }; |
75 | 75 | ||
76 | u32 perf_pmu_vfe_load(struct gk20a *g); | 76 | u32 perf_pmu_vfe_load(struct gk20a *g); |
77 | u32 perf_pmu_vfe_load_gv10x(struct gk20a *g); | ||
77 | 78 | ||
78 | #endif | 79 | #endif |
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index e61ec0f8..3d6a436d 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c | |||
@@ -184,7 +184,7 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g) | |||
184 | if (err) | 184 | if (err) |
185 | return err; | 185 | return err; |
186 | 186 | ||
187 | err = perf_pmu_vfe_load(g); | 187 | err = g->ops.pmu_ver.clk.perf_pmu_vfe_load(g); |
188 | if (err) | 188 | if (err) |
189 | return err; | 189 | return err; |
190 | 190 | ||