diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h | 10 |
3 files changed, 32 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 4984af46..79eee0e5 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -407,6 +407,25 @@ static void gr_gv11b_set_coalesce_buffer_size(struct gk20a *g, u32 data) | |||
407 | gk20a_dbg_fn("done"); | 407 | gk20a_dbg_fn("done"); |
408 | } | 408 | } |
409 | 409 | ||
410 | |||
411 | static void gv11b_gr_set_shader_exceptions(struct gk20a *g, u32 data) | ||
412 | { | ||
413 | u32 val; | ||
414 | |||
415 | gk20a_dbg_fn(""); | ||
416 | |||
417 | if (data == NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE) | ||
418 | val = 0; | ||
419 | else | ||
420 | val = 0xffffffff; | ||
421 | |||
422 | /* setup sm warp esr report masks */ | ||
423 | gk20a_writel(g, gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r(), val); | ||
424 | |||
425 | /* setup sm global esr report mask */ | ||
426 | gk20a_writel(g, gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r(), val); | ||
427 | } | ||
428 | |||
410 | static int gr_gv11b_handle_sw_method(struct gk20a *g, u32 addr, | 429 | static int gr_gv11b_handle_sw_method(struct gk20a *g, u32 addr, |
411 | u32 class_num, u32 offset, u32 data) | 430 | u32 class_num, u32 offset, u32 data) |
412 | { | 431 | { |
@@ -415,7 +434,7 @@ static int gr_gv11b_handle_sw_method(struct gk20a *g, u32 addr, | |||
415 | if (class_num == VOLTA_COMPUTE_A) { | 434 | if (class_num == VOLTA_COMPUTE_A) { |
416 | switch (offset << 2) { | 435 | switch (offset << 2) { |
417 | case NVC0C0_SET_SHADER_EXCEPTIONS: | 436 | case NVC0C0_SET_SHADER_EXCEPTIONS: |
418 | gk20a_gr_set_shader_exceptions(g, data); | 437 | gv11b_gr_set_shader_exceptions(g, data); |
419 | break; | 438 | break; |
420 | default: | 439 | default: |
421 | goto fail; | 440 | goto fail; |
@@ -425,7 +444,7 @@ static int gr_gv11b_handle_sw_method(struct gk20a *g, u32 addr, | |||
425 | if (class_num == VOLTA_A) { | 444 | if (class_num == VOLTA_A) { |
426 | switch (offset << 2) { | 445 | switch (offset << 2) { |
427 | case NVC397_SET_SHADER_EXCEPTIONS: | 446 | case NVC397_SET_SHADER_EXCEPTIONS: |
428 | gk20a_gr_set_shader_exceptions(g, data); | 447 | gv11b_gr_set_shader_exceptions(g, data); |
429 | break; | 448 | break; |
430 | case NVC397_SET_CIRCULAR_BUFFER_SIZE: | 449 | case NVC397_SET_CIRCULAR_BUFFER_SIZE: |
431 | g->ops.gr.set_circular_buffer_size(g, data); | 450 | g->ops.gr.set_circular_buffer_size(g, data); |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index d31c92ca..b2549edd 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -43,6 +43,8 @@ enum { | |||
43 | #define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc | 43 | #define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc |
44 | #define NVC397_SET_GO_IDLE_TIMEOUT 0x022c | 44 | #define NVC397_SET_GO_IDLE_TIMEOUT 0x022c |
45 | 45 | ||
46 | #define NVA297_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0 | ||
47 | |||
46 | void gv11b_init_gr(struct gpu_ops *ops); | 48 | void gv11b_init_gr(struct gpu_ops *ops); |
47 | int gr_gv11b_alloc_buffer(struct vm_gk20a *vm, size_t size, | 49 | int gr_gv11b_alloc_buffer(struct vm_gk20a *vm, size_t size, |
48 | struct mem_desc *mem); | 50 | struct mem_desc *mem); |
diff --git a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h index 99da5f73..656597ba 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -554,6 +554,14 @@ static inline u32 gr_fe_hww_esr_en_enable_f(void) | |||
554 | { | 554 | { |
555 | return 0x80000000; | 555 | return 0x80000000; |
556 | } | 556 | } |
557 | static inline u32 gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r(void) | ||
558 | { | ||
559 | return 0x00419ea8; | ||
560 | } | ||
561 | static inline u32 gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r(void) | ||
562 | { | ||
563 | return 0x00419eac; | ||
564 | } | ||
557 | static inline u32 gr_fe_go_idle_timeout_r(void) | 565 | static inline u32 gr_fe_go_idle_timeout_r(void) |
558 | { | 566 | { |
559 | return 0x00404154; | 567 | return 0x00404154; |