diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | 42 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 3 |
5 files changed, 54 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 31a3ceeb..d99c48fb 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -886,7 +886,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch) | |||
886 | /* if lock is already taken, a reset is taking place | 886 | /* if lock is already taken, a reset is taking place |
887 | so no need to repeat */ | 887 | so no need to repeat */ |
888 | if (!was_reset) { | 888 | if (!was_reset) { |
889 | trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); | 889 | gk20a_ctxsw_trace_channel_reset(g, ch); |
890 | gk20a_fifo_reset_engine(g, | 890 | gk20a_fifo_reset_engine(g, |
891 | g->fifo.deferred_fault_engines); | 891 | g->fifo.deferred_fault_engines); |
892 | } | 892 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c index 04109df0..3f39ced1 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/hashtable.h> | 23 | #include <linux/hashtable.h> |
24 | #include <linux/debugfs.h> | 24 | #include <linux/debugfs.h> |
25 | #include <linux/log2.h> | 25 | #include <linux/log2.h> |
26 | #include <trace/events/gk20a.h> | ||
26 | #include <uapi/linux/nvgpu.h> | 27 | #include <uapi/linux/nvgpu.h> |
27 | #include "ctxsw_trace_gk20a.h" | 28 | #include "ctxsw_trace_gk20a.h" |
28 | #include "gk20a.h" | 29 | #include "gk20a.h" |
@@ -620,6 +621,47 @@ void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid) | |||
620 | wake_up_interruptible(&dev->readout_wq); | 621 | wake_up_interruptible(&dev->readout_wq); |
621 | } | 622 | } |
622 | 623 | ||
624 | void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) | ||
625 | { | ||
626 | #ifdef CONFIG_GK20A_CTXSW_TRACE | ||
627 | struct nvgpu_ctxsw_trace_entry entry = { | ||
628 | .vmid = 0, | ||
629 | .tag = NVGPU_CTXSW_TAG_RESET, | ||
630 | .timestamp = gk20a_read_ptimer(g), | ||
631 | .context_id = 0, | ||
632 | .pid = ch->pid, | ||
633 | }; | ||
634 | |||
635 | gk20a_ctxsw_trace_write(g, &entry); | ||
636 | #endif | ||
637 | trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); | ||
638 | gk20a_ctxsw_trace_wake_up(g, 0); | ||
639 | } | ||
640 | |||
641 | void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) | ||
642 | { | ||
643 | #ifdef CONFIG_GK20A_CTXSW_TRACE | ||
644 | struct nvgpu_ctxsw_trace_entry entry = { | ||
645 | .vmid = 0, | ||
646 | .tag = NVGPU_CTXSW_TAG_RESET, | ||
647 | .timestamp = gk20a_read_ptimer(g), | ||
648 | .context_id = 0, | ||
649 | .pid = 0, | ||
650 | }; | ||
651 | struct channel_gk20a *ch; | ||
652 | |||
653 | mutex_lock(&tsg->ch_list_lock); | ||
654 | ch = list_entry(&tsg->ch_list, struct channel_gk20a, ch_entry); | ||
655 | mutex_unlock(&tsg->ch_list_lock); | ||
656 | |||
657 | entry.pid = ch->pid; | ||
658 | |||
659 | gk20a_ctxsw_trace_write(g, &entry); | ||
660 | #endif | ||
661 | trace_gk20a_channel_reset(~0, tsg->tsgid); | ||
662 | gk20a_ctxsw_trace_wake_up(g, 0); | ||
663 | } | ||
664 | |||
623 | void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops) | 665 | void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops) |
624 | { | 666 | { |
625 | ops->fecs_trace.alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc; | 667 | ops->fecs_trace.alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc; |
diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h index 7a2f4aeb..dacc0b50 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.h | |||
@@ -23,6 +23,7 @@ struct channel_gk20a; | |||
23 | struct channel_ctx_gk20a; | 23 | struct channel_ctx_gk20a; |
24 | struct gk20a_ctxsw_dev; | 24 | struct gk20a_ctxsw_dev; |
25 | struct gk20a_fecs_trace; | 25 | struct gk20a_fecs_trace; |
26 | struct tsg_gk20a; | ||
26 | 27 | ||
27 | 28 | ||
28 | int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp); | 29 | int gk20a_ctxsw_dev_release(struct inode *inode, struct file *filp); |
@@ -40,4 +41,8 @@ int gk20a_ctxsw_trace_write(struct gk20a *, struct nvgpu_ctxsw_trace_entry *); | |||
40 | void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid); | 41 | void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid); |
41 | void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops); | 42 | void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops); |
42 | 43 | ||
44 | void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch); | ||
45 | void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg); | ||
46 | |||
47 | |||
43 | #endif /* __CTXSW_TRACE_GK20A_H */ | 48 | #endif /* __CTXSW_TRACE_GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 396c5ee5..b0e2ce1f 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1083,10 +1083,10 @@ static bool gk20a_fifo_handle_mmu_fault( | |||
1083 | /* if lock is already taken, a reset is taking place | 1083 | /* if lock is already taken, a reset is taking place |
1084 | so no need to repeat */ | 1084 | so no need to repeat */ |
1085 | if (!was_reset) { | 1085 | if (!was_reset) { |
1086 | trace_gk20a_channel_reset( | 1086 | if (ch) |
1087 | ch ? ch->hw_chid : ~0, | 1087 | gk20a_ctxsw_trace_channel_reset(g, ch); |
1088 | tsg ? tsg->tsgid : | 1088 | else |
1089 | NVGPU_INVALID_TSG_ID); | 1089 | gk20a_ctxsw_trace_tsg_reset(g, tsg); |
1090 | gk20a_fifo_reset_engine(g, engine_id); | 1090 | gk20a_fifo_reset_engine(g, engine_id); |
1091 | } | 1091 | } |
1092 | mutex_unlock(&g->fifo.gr_reset_mutex); | 1092 | mutex_unlock(&g->fifo.gr_reset_mutex); |
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index d1cba979..83fd65ff 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <trace/events/gk20a.h> | 17 | #include <trace/events/gk20a.h> |
18 | 18 | ||
19 | #include "vgpu/vgpu.h" | 19 | #include "vgpu/vgpu.h" |
20 | #include "gk20a/ctxsw_trace_gk20a.h" | ||
20 | #include "gk20a/hw_fifo_gk20a.h" | 21 | #include "gk20a/hw_fifo_gk20a.h" |
21 | #include "gk20a/hw_ram_gk20a.h" | 22 | #include "gk20a/hw_ram_gk20a.h" |
22 | 23 | ||
@@ -629,7 +630,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) | |||
629 | gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u", | 630 | gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u", |
630 | info->type, info->chid); | 631 | info->type, info->chid); |
631 | 632 | ||
632 | trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); | 633 | gk20a_ctxsw_trace_channel_reset(g, ch); |
633 | 634 | ||
634 | switch (info->type) { | 635 | switch (info->type) { |
635 | case TEGRA_VGPU_FIFO_INTR_PBDMA: | 636 | case TEGRA_VGPU_FIFO_INTR_PBDMA: |