diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_mclk.c | 627 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_mclk.h | 30 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/pmu_gp106.c | 2 |
4 files changed, 632 insertions, 29 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h index d638424f..e24aada2 100644 --- a/drivers/gpu/nvgpu/clk/clk.h +++ b/drivers/gpu/nvgpu/clk/clk.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #include "clk_domain.h" | 20 | #include "clk_domain.h" |
21 | #include "clk_prog.h" | 21 | #include "clk_prog.h" |
22 | #include "clk_vf_point.h" | 22 | #include "clk_vf_point.h" |
23 | #include "clk_mclk.h" | ||
23 | #include "gk20a/gk20a.h" | 24 | #include "gk20a/gk20a.h" |
24 | 25 | ||
25 | #define NV_PERF_DOMAIN_4X_CLOCK_DOMAIN_SKIP 0x10 | 26 | #define NV_PERF_DOMAIN_4X_CLOCK_DOMAIN_SKIP 0x10 |
@@ -33,6 +34,7 @@ struct clk_pmupstate { | |||
33 | struct clk_domains clk_domainobjs; | 34 | struct clk_domains clk_domainobjs; |
34 | struct clk_progs clk_progobjs; | 35 | struct clk_progs clk_progobjs; |
35 | struct clk_vf_points clk_vf_pointobjs; | 36 | struct clk_vf_points clk_vf_pointobjs; |
37 | struct clk_mclk_state clk_mclk; | ||
36 | }; | 38 | }; |
37 | 39 | ||
38 | struct clockentry { | 40 | struct clockentry { |
diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.c b/drivers/gpu/nvgpu/clk/clk_mclk.c index affcb54c..df010221 100644 --- a/drivers/gpu/nvgpu/clk/clk_mclk.c +++ b/drivers/gpu/nvgpu/clk/clk_mclk.c | |||
@@ -20,12 +20,16 @@ | |||
20 | 20 | ||
21 | #define VREG_COUNT 24 | 21 | #define VREG_COUNT 24 |
22 | 22 | ||
23 | #define DEFAULT_BOOT_MCLK_SPEED gk20a_mclk_high_speed | ||
24 | #define MCLK_LOW_SPEED_LIMIT 405 | ||
25 | #define MCLK_MID_SPEED_LIMIT 810 | ||
26 | |||
23 | struct memory_link_training_pattern { | 27 | struct memory_link_training_pattern { |
24 | u32 regaddr; | 28 | u32 regaddr; |
25 | u32 writeval; | 29 | u32 writeval; |
26 | }; | 30 | }; |
27 | 31 | ||
28 | static struct memory_link_training_pattern memory_shadow_reglist[] = { | 32 | static struct memory_link_training_pattern memory_shadow_p0_reglist[] = { |
29 | {0x9a065c, 0x20}, | 33 | {0x9a065c, 0x20}, |
30 | {0x98467c, 0xffff0000}, | 34 | {0x98467c, 0xffff0000}, |
31 | {0x984708, 0x30550}, | 35 | {0x984708, 0x30550}, |
@@ -41,6 +45,47 @@ static struct memory_link_training_pattern memory_shadow_reglist[] = { | |||
41 | {0x9a065c, 0x00}, | 45 | {0x9a065c, 0x00}, |
42 | }; | 46 | }; |
43 | 47 | ||
48 | static struct memory_link_training_pattern memory_shadow_p5_reglist[] = { | ||
49 | {0x9a065c, 0x10}, | ||
50 | {0x98467c, 0xfff10000}, | ||
51 | {0x984708, 0x30002}, | ||
52 | {0x98470c, 0x1414}, | ||
53 | {0x9006a0, 0x12121212}, | ||
54 | {0x9006a4, 0x12121212}, | ||
55 | {0x9046a0, 0x12121212}, | ||
56 | {0x9046a4, 0x12121212}, | ||
57 | {0x9086a0, 0x12121212}, | ||
58 | {0x9086a4, 0x12121212}, | ||
59 | {0x90c6a0, 0x12121212}, | ||
60 | {0x90c6a4, 0x12121212}, | ||
61 | {0x9106a0, 0x12121212}, | ||
62 | {0x9106a4, 0x12121212}, | ||
63 | {0x9146a0, 0x12121212}, | ||
64 | {0x9146a4, 0x12121212}, | ||
65 | {0x9a065c, 0x0}, | ||
66 | {0x9a08e0, 0x10}, | ||
67 | {0x9846a8, 0x0f0f0f0f}, | ||
68 | {0x9846ac, 0x0f0f0f0f}, | ||
69 | {0x984d98, 0x22222222}, | ||
70 | {0x984d9c, 0x22222222}, | ||
71 | {0x984da0, 0x22222222}, | ||
72 | {0x984da4, 0x22222222}, | ||
73 | {0x984da8, 0x22222222}, | ||
74 | {0x984dac, 0x22222222}, | ||
75 | {0x984dac, 0x22222222}, | ||
76 | {0x984d70, 0x0}, | ||
77 | {0x984d74, 0x0}, | ||
78 | {0x984d78, 0x0}, | ||
79 | {0x984d7c, 0x0}, | ||
80 | {0x984d80, 0x0}, | ||
81 | {0x984d84, 0x0}, | ||
82 | {0x984d88, 0x0}, | ||
83 | {0x984d8c, 0x0}, | ||
84 | {0x984d90, 0x0}, | ||
85 | {0x984d94, 0x0}, | ||
86 | {0x9a08e0, 0x0}, | ||
87 | }; | ||
88 | |||
44 | static struct memory_link_training_pattern memory_pattern_reglist[] = { | 89 | static struct memory_link_training_pattern memory_pattern_reglist[] = { |
45 | {0x9a0968, 0x0}, | 90 | {0x9a0968, 0x0}, |
46 | {0x9a0920, 0x0}, | 91 | {0x9a0920, 0x0}, |
@@ -1548,7 +1593,154 @@ static struct memory_link_training_pattern memory_pattern_reglist[] = { | |||
1548 | {0x9a0904, 0xffffffff}, | 1593 | {0x9a0904, 0xffffffff}, |
1549 | }; | 1594 | }; |
1550 | 1595 | ||
1551 | static u8 seq_script_gp106[] = { | 1596 | /* MID SPEED TO LOW SPEED */ |
1597 | static u8 seq_script_step33_ls_gp106[] = { | ||
1598 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, | ||
1599 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x00, 0x02, | ||
1600 | 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, | ||
1601 | 0x00, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x10, 0x49, 0x90, 0x00, | ||
1602 | 0x00, 0x00, 0x0C, 0x00, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x10, | ||
1603 | 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, | ||
1604 | 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x10, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, | ||
1605 | 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, | ||
1606 | 0x48, 0x03, 0x9A, 0x00, 0x88, 0x00, 0x70, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, | ||
1607 | 0x90, 0x8F, 0x82, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, | ||
1608 | 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x90, 0x00, 0x9A, 0x00, 0x61, 0x00, 0x00, | ||
1609 | 0x00, 0x90, 0x00, 0x9A, 0x00, 0x7F, 0x00, 0x00, 0xC0, 0x2E, 0x00, 0x02, 0x00, | ||
1610 | 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x27, 0x00, 0x98, 0x06, 0x9A, 0x00, 0x00, | ||
1611 | 0x00, 0x00, 0x00, 0x9C, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, | ||
1612 | 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0x38, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, | ||
1613 | 0x00, 0x34, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, 0x00, 0x34, 0x0D, 0x9A, 0x00, | ||
1614 | 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x8B, 0xC0, 0x24, | ||
1615 | 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x00, | ||
1616 | 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, 0x00, 0x01, 0x00, 0xF4, 0x73, 0x13, | ||
1617 | 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x20, 0x13, 0x00, 0x00, 0x00, 0x01, 0x18, | ||
1618 | 0x00, 0x20, 0x13, 0x00, 0x02, 0x00, 0x01, 0x18, 0x20, 0x20, 0x13, 0x00, 0x00, | ||
1619 | 0x00, 0x03, 0x20, 0x20, 0x73, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x20, | ||
1620 | 0x13, 0x00, 0x01, 0x3B, 0x04, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x01, 0x00, | ||
1621 | 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x08, 0x10, 0x20, 0x20, 0x13, 0x00, | ||
1622 | 0x01, 0x00, 0x03, 0x20, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, | ||
1623 | 0x00, 0x02, 0x00, 0x90, 0x73, 0x13, 0x00, 0x15, 0x00, 0x03, 0x00, 0x00, 0x00, | ||
1624 | 0x02, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x21, 0x00, 0x1F, 0x00, 0x2C, 0x20, 0x13, | ||
1625 | 0x00, 0x00, 0x03, 0x00, 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x04, 0x10, | ||
1626 | 0xF4, 0x73, 0x13, 0x00, 0x00, 0x01, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, | ||
1627 | 0x01, 0x01, 0x00, 0xEC, 0x73, 0x13, 0x00, 0x00, 0x00, 0x01, 0x00, 0xF4, 0x73, | ||
1628 | 0x13, 0x00, 0x11, 0x01, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x01, 0x00, | ||
1629 | 0x00, 0x5C, 0x06, 0x9A, 0x00, 0x11, 0x00, 0x00, 0x00, 0x70, 0x06, 0x9A, 0x00, | ||
1630 | 0x06, 0x13, 0x08, 0xB4, 0x98, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, | ||
1631 | 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x06, 0x9A, 0x00, 0x0E, 0x06, | ||
1632 | 0x0E, 0x06, 0xD4, 0x0E, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x40, 0xD4, 0x0E, 0x9A, | ||
1633 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x80, 0x40, | ||
1634 | 0x13, 0x00, 0x02, 0x00, 0x2C, 0x01, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0x10, | ||
1635 | 0x27, 0x00, 0x00, 0x21, 0x00, 0x1D, 0x00, 0x70, 0x06, 0x9A, 0x00, 0x06, 0x13, | ||
1636 | 0x08, 0x34, 0x48, 0x02, 0x9A, 0x00, 0xA3, 0x44, 0x14, 0x86, 0x90, 0x02, 0x9A, | ||
1637 | 0x00, 0x12, 0x2C, 0x18, 0x06, 0x94, 0x02, 0x9A, 0x00, 0x8A, 0x82, 0x41, 0x24, | ||
1638 | 0x98, 0x02, 0x9A, 0x00, 0x11, 0x05, 0x06, 0x88, 0x9C, 0x02, 0x9A, 0x00, 0x8C, | ||
1639 | 0x10, 0x00, 0x22, 0xA8, 0x02, 0x9A, 0x00, 0x0B, 0x86, 0x00, 0x01, 0x4C, 0x02, | ||
1640 | 0x9A, 0x00, 0x85, 0x0C, 0x05, 0x06, 0x30, 0x1F, 0x9A, 0x00, 0x03, 0x16, 0x2C, | ||
1641 | 0x00, 0xE0, 0x08, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x03, 0x9A, 0x00, | ||
1642 | 0x00, 0x00, 0x00, 0x00, 0x94, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
1643 | 0x0B, 0x9A, 0x00, 0x06, 0x22, 0x22, 0x22, 0x90, 0x00, 0x9A, 0x00, 0x7E, 0x00, | ||
1644 | 0x00, 0x40, 0x2E, 0x00, 0x02, 0x00, 0xD0, 0x07, 0x00, 0x00, 0x21, 0x00, 0x0D, | ||
1645 | 0x00, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x03, 0x9A, 0x00, | ||
1646 | 0x01, 0x00, 0x00, 0x00, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x80, 0x90, | ||
1647 | 0x03, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x03, 0x9A, 0x00, 0x23, 0x01, | ||
1648 | 0x30, 0x00, 0x00, 0x03, 0x9A, 0x00, 0x2D, 0x02, 0x00, 0x00, 0x2E, 0x00, 0x02, | ||
1649 | 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x07, 0x00, 0x00, 0x02, 0x9A, 0x00, | ||
1650 | 0x00, 0x90, 0x8F, 0x82, 0x18, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, | ||
1651 | 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, | ||
1652 | 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x78, 0x09, 0x9A, 0x00, 0x0B, 0x1E, 0x7A, | ||
1653 | 0x88, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, 0x00, | ||
1654 | 0x00, 0x00, 0x0A, 0x98, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x10, | ||
1655 | 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, | ||
1656 | 0x0A, 0x98, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, | ||
1657 | 0x00, 0x74, 0x09, 0x90, 0x00, 0x15, 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, | ||
1658 | 0x20, 0xA1, 0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x74, 0x49, 0x90, 0x00, 0x15, | ||
1659 | 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x20, 0xA1, 0x07, 0x00, 0x21, 0x00, | ||
1660 | 0x0D, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x01, 0x30, 0x08, 0x9A, | ||
1661 | 0x00, 0x91, 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, | ||
1662 | 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, 0x10, 0x49, 0x90, 0x00, 0x00, | ||
1663 | 0x00, 0x08, 0x19, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, 0x20, 0x00, | ||
1664 | 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, | ||
1665 | 0x00, 0x0B, 0x00, 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x00, 0x02, 0x9A, 0x00, | ||
1666 | 0x00, 0x98, 0x8F, 0x02, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
1667 | }; | ||
1668 | |||
1669 | /* LOW SPEED TO MID SPEED */ | ||
1670 | static u8 seq_script_step33_gp106[] = { | ||
1671 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, | ||
1672 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x00, 0x02, | ||
1673 | 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, | ||
1674 | 0x00, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x10, 0x49, 0x90, 0x00, | ||
1675 | 0x00, 0x00, 0x0C, 0x00, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x10, | ||
1676 | 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, | ||
1677 | 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x10, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, | ||
1678 | 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, | ||
1679 | 0x48, 0x03, 0x9A, 0x00, 0x88, 0x00, 0x70, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, | ||
1680 | 0x90, 0x8F, 0x82, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, | ||
1681 | 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x90, 0x00, 0x9A, 0x00, 0x61, 0x00, 0x00, | ||
1682 | 0x00, 0x90, 0x00, 0x9A, 0x00, 0x7F, 0x00, 0x00, 0xC0, 0x2E, 0x00, 0x02, 0x00, | ||
1683 | 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x27, 0x00, 0x98, 0x06, 0x9A, 0x00, 0x00, | ||
1684 | 0x00, 0x00, 0x00, 0x9C, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, | ||
1685 | 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0x38, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, | ||
1686 | 0x00, 0x34, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, 0x00, 0x34, 0x0D, 0x9A, 0x00, | ||
1687 | 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x8B, 0xC0, 0x24, | ||
1688 | 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x00, | ||
1689 | 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, 0x00, 0x01, 0x00, 0xF4, 0x73, 0x13, | ||
1690 | 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x20, 0x13, 0x00, 0x00, 0x00, 0x01, 0x18, | ||
1691 | 0x00, 0x20, 0x13, 0x00, 0x02, 0x00, 0x01, 0x18, 0x20, 0x20, 0x13, 0x00, 0x00, | ||
1692 | 0x00, 0x03, 0x20, 0x20, 0x73, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x20, | ||
1693 | 0x13, 0x00, 0x01, 0x3B, 0x02, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x01, 0x00, | ||
1694 | 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x08, 0x10, 0x20, 0x20, 0x13, 0x00, | ||
1695 | 0x01, 0x00, 0x03, 0x20, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, | ||
1696 | 0x00, 0x02, 0x00, 0x90, 0x73, 0x13, 0x00, 0x15, 0x00, 0x03, 0x00, 0x00, 0x00, | ||
1697 | 0x02, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x21, 0x00, 0x1F, 0x00, 0x2C, 0x20, 0x13, | ||
1698 | 0x00, 0x00, 0x03, 0x00, 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x04, 0x10, | ||
1699 | 0xF4, 0x73, 0x13, 0x00, 0x00, 0x01, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, | ||
1700 | 0x01, 0x01, 0x00, 0xEC, 0x73, 0x13, 0x00, 0x00, 0x00, 0x01, 0x00, 0xF4, 0x73, | ||
1701 | 0x13, 0x00, 0x11, 0x01, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x01, 0x00, | ||
1702 | 0x00, 0x5C, 0x06, 0x9A, 0x00, 0x11, 0x00, 0x00, 0x00, 0x70, 0x06, 0x9A, 0x00, | ||
1703 | 0x06, 0x13, 0x08, 0xB4, 0x98, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, | ||
1704 | 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x06, 0x9A, 0x00, 0x0E, 0x06, | ||
1705 | 0x0E, 0x06, 0xD4, 0x0E, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x40, 0xD4, 0x0E, 0x9A, | ||
1706 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x80, 0x40, | ||
1707 | 0x13, 0x00, 0x02, 0x00, 0x2C, 0x01, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0x10, | ||
1708 | 0x27, 0x00, 0x00, 0x21, 0x00, 0x1D, 0x00, 0x70, 0x06, 0x9A, 0x00, 0x06, 0x13, | ||
1709 | 0x08, 0x34, 0x48, 0x02, 0x9A, 0x00, 0xA3, 0x44, 0x14, 0x86, 0x90, 0x02, 0x9A, | ||
1710 | 0x00, 0x12, 0x2C, 0x18, 0x06, 0x94, 0x02, 0x9A, 0x00, 0x8A, 0x82, 0x41, 0x24, | ||
1711 | 0x98, 0x02, 0x9A, 0x00, 0x11, 0x05, 0x06, 0x88, 0x9C, 0x02, 0x9A, 0x00, 0x8C, | ||
1712 | 0x10, 0x00, 0x22, 0xA8, 0x02, 0x9A, 0x00, 0x0B, 0x86, 0x00, 0x01, 0x4C, 0x02, | ||
1713 | 0x9A, 0x00, 0x85, 0x0C, 0x05, 0x06, 0x30, 0x1F, 0x9A, 0x00, 0x03, 0x16, 0x2C, | ||
1714 | 0x00, 0xE0, 0x08, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x03, 0x9A, 0x00, | ||
1715 | 0x00, 0x00, 0x00, 0x00, 0x94, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
1716 | 0x0B, 0x9A, 0x00, 0x06, 0x22, 0x22, 0x22, 0x90, 0x00, 0x9A, 0x00, 0x7E, 0x00, | ||
1717 | 0x00, 0x40, 0x2E, 0x00, 0x02, 0x00, 0xD0, 0x07, 0x00, 0x00, 0x21, 0x00, 0x0D, | ||
1718 | 0x00, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x03, 0x9A, 0x00, | ||
1719 | 0x01, 0x00, 0x00, 0x00, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x80, 0x90, | ||
1720 | 0x03, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x03, 0x9A, 0x00, 0x23, 0x01, | ||
1721 | 0x30, 0x00, 0x00, 0x03, 0x9A, 0x00, 0x2D, 0x02, 0x00, 0x00, 0x2E, 0x00, 0x02, | ||
1722 | 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x07, 0x00, 0x00, 0x02, 0x9A, 0x00, | ||
1723 | 0x00, 0x90, 0x8F, 0x82, 0x18, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, | ||
1724 | 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, | ||
1725 | 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x78, 0x09, 0x9A, 0x00, 0x0B, 0x1E, 0x7A, | ||
1726 | 0x88, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, 0x00, | ||
1727 | 0x00, 0x00, 0x0A, 0x98, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x10, | ||
1728 | 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, | ||
1729 | 0x0A, 0x98, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, | ||
1730 | 0x00, 0x74, 0x09, 0x90, 0x00, 0x15, 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, | ||
1731 | 0x20, 0xA1, 0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x74, 0x49, 0x90, 0x00, 0x15, | ||
1732 | 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x20, 0xA1, 0x07, 0x00, 0x21, 0x00, | ||
1733 | 0x0D, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x01, 0x30, 0x08, 0x9A, | ||
1734 | 0x00, 0x91, 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, | ||
1735 | 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, 0x10, 0x49, 0x90, 0x00, 0x00, | ||
1736 | 0x00, 0x08, 0x19, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, 0x20, 0x00, | ||
1737 | 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, | ||
1738 | 0x00, 0x0B, 0x00, 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x00, 0x02, 0x9A, 0x00, | ||
1739 | 0x00, 0x98, 0x8F, 0x02, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
1740 | }; | ||
1741 | |||
1742 | /* LOW/MID SPEED TO HIGH SPEED */ | ||
1743 | static u8 seq_script_step28_gp106[] = { | ||
1552 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, | 1744 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, |
1553 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x07, 0x00, 0x30, 0x03, | 1745 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x07, 0x00, 0x30, 0x03, |
1554 | 0x9A, 0x00, 0x14, 0x00, 0x10, 0x00, 0x38, 0xD6, 0x00, 0x00, 0x00, 0x60, 0x00, | 1746 | 0x9A, 0x00, 0x14, 0x00, 0x10, 0x00, 0x38, 0xD6, 0x00, 0x00, 0x00, 0x60, 0x00, |
@@ -1644,7 +1836,177 @@ static u8 seq_script_gp106[] = { | |||
1644 | 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x25, 0x10, 0x49, 0x90, 0x00, 0x00, | 1836 | 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x25, 0x10, 0x49, 0x90, 0x00, 0x00, |
1645 | 0x00, 0x0C, 0x25, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x25, 0x20, 0x00, | 1837 | 0x00, 0x0C, 0x25, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x25, 0x20, 0x00, |
1646 | 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, | 1838 | 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, |
1647 | 0x00, 0x13, 0x00, 0x00, 0x00, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00}; | 1839 | 0x00, 0x13, 0x00, 0x00, 0x00, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00 |
1840 | }; | ||
1841 | |||
1842 | /* HIGH SPEED TO LOW SPEED */ | ||
1843 | static u8 seq_script_step32_ls_gp106[] = { | ||
1844 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, | ||
1845 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x0B, 0x00, 0x10, 0x09, | ||
1846 | 0x90, 0x00, 0x00, 0x00, 0x0C, 0x24, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, | ||
1847 | 0x24, 0x10, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x24, 0x14, 0x49, 0x90, 0x00, | ||
1848 | 0x00, 0x00, 0x0C, 0x24, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2E, | ||
1849 | 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x10, 0x03, | ||
1850 | 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, | ||
1851 | 0x00, 0x21, 0x00, 0x0D, 0x00, 0x48, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x70, 0x00, | ||
1852 | 0x00, 0x02, 0x9A, 0x00, 0x00, 0x10, 0x8F, 0x82, 0x14, 0x03, 0x9A, 0x00, 0x01, | ||
1853 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x10, 0x8F, 0x02, 0x90, 0x00, | ||
1854 | 0x9A, 0x00, 0x61, 0x00, 0x00, 0x00, 0x90, 0x00, 0x9A, 0x00, 0x7F, 0x00, 0x00, | ||
1855 | 0xC0, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x35, 0x00, | ||
1856 | 0x98, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x06, 0x9A, 0x00, 0x00, | ||
1857 | 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0x85, 0x8F, 0x8B, 0xF7, 0x38, 0x1F, | ||
1858 | 0x9A, 0x00, 0x00, 0x00, 0x01, 0x00, 0x34, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, | ||
1859 | 0x00, 0x34, 0x0D, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, | ||
1860 | 0xE7, 0x8F, 0x8B, 0xF7, 0x40, 0x0D, 0x9A, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x24, | ||
1861 | 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0x08, 0x08, 0x9A, 0x00, 0x70, 0x00, | ||
1862 | 0xA0, 0x4A, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x30, 0x08, 0x9A, | ||
1863 | 0x00, 0x90, 0x20, 0x67, 0x01, 0x30, 0x08, 0x9A, 0x00, 0x90, 0x20, 0x67, 0x00, | ||
1864 | 0xF4, 0x73, 0x13, 0x00, 0x12, 0x11, 0x00, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, | ||
1865 | 0x11, 0x00, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x20, | ||
1866 | 0x13, 0x00, 0x00, 0x00, 0x03, 0x98, 0x00, 0x20, 0x13, 0x00, 0x02, 0x00, 0x03, | ||
1867 | 0x98, 0x20, 0x20, 0x13, 0x00, 0x00, 0x00, 0x03, 0x20, 0x20, 0x73, 0x13, 0x00, | ||
1868 | 0x00, 0x00, 0x00, 0x00, 0x30, 0x20, 0x13, 0x00, 0x06, 0x00, 0x00, 0x10, 0x34, | ||
1869 | 0x20, 0x13, 0x00, 0x00, 0x10, 0x67, 0x06, 0x24, 0x20, 0x13, 0x00, 0x01, 0x3B, | ||
1870 | 0x04, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x01, 0x00, 0x00, 0x28, 0x20, 0x13, | ||
1871 | 0x00, 0x10, 0x00, 0x08, 0x10, 0x20, 0x20, 0x13, 0x00, 0x01, 0x00, 0x03, 0x20, | ||
1872 | 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x02, 0x00, 0x90, | ||
1873 | 0x73, 0x13, 0x00, 0x15, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0xFA, | ||
1874 | 0x00, 0x00, 0x21, 0x00, 0x23, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x03, 0x00, | ||
1875 | 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x04, 0x10, 0xF4, 0x73, 0x13, 0x00, | ||
1876 | 0x00, 0x11, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, 0x11, 0x01, 0x00, 0xF0, | ||
1877 | 0x73, 0x13, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x73, 0x13, 0x00, 0x00, 0x00, | ||
1878 | 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x11, 0x01, 0x00, 0xF4, 0x73, 0x13, | ||
1879 | 0x00, 0x11, 0x11, 0x00, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x20, 0x27, 0x00, | ||
1880 | 0x5C, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0x06, 0x9A, 0x00, 0x06, | ||
1881 | 0x06, 0x06, 0x06, 0x9C, 0x06, 0x9A, 0x00, 0x06, 0x06, 0x06, 0x06, 0x94, 0x06, | ||
1882 | 0x9A, 0x00, 0x0E, 0x06, 0x0E, 0x06, 0x0C, 0x06, 0x9A, 0x00, 0x50, 0x20, 0x00, | ||
1883 | 0xFD, 0xD4, 0x0E, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x40, 0xD4, 0x0E, 0x9A, 0x00, | ||
1884 | 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x80, 0x40, 0x13, | ||
1885 | 0x00, 0x02, 0x00, 0x2C, 0x01, 0x00, 0x00, 0x21, 0x00, 0x23, 0x00, 0x2C, 0x08, | ||
1886 | 0x9A, 0x00, 0x00, 0x00, 0x15, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, | ||
1887 | 0x00, 0x48, 0x02, 0x9A, 0x00, 0xA3, 0x44, 0x14, 0x84, 0x90, 0x02, 0x9A, 0x00, | ||
1888 | 0x0A, 0x17, 0x0E, 0x03, 0x94, 0x02, 0x9A, 0x00, 0x89, 0x02, 0x21, 0x24, 0x98, | ||
1889 | 0x02, 0x9A, 0x00, 0x11, 0x04, 0x05, 0x88, 0x9C, 0x02, 0x9A, 0x00, 0x6C, 0x10, | ||
1890 | 0x00, 0x22, 0xA0, 0x02, 0x9A, 0x00, 0x32, 0x00, 0x61, 0xD3, 0xA8, 0x02, 0x9A, | ||
1891 | 0x00, 0x0B, 0x86, 0x00, 0x02, 0x14, 0x06, 0x9A, 0x00, 0x77, 0x3E, 0x03, 0x30, | ||
1892 | 0x10, 0x06, 0x9A, 0x00, 0x77, 0x3E, 0x03, 0x30, 0x08, 0x08, 0x9A, 0x00, 0x70, | ||
1893 | 0x00, 0x00, 0x48, 0x78, 0x07, 0x10, 0x00, 0x33, 0x03, 0x00, 0x82, 0x4C, 0x02, | ||
1894 | 0x9A, 0x00, 0x85, 0x0C, 0x05, 0x04, 0x30, 0x1F, 0x9A, 0x00, 0x03, 0x16, 0x2C, | ||
1895 | 0x00, 0xE0, 0x08, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x9A, 0x00, | ||
1896 | 0x7E, 0x00, 0x00, 0x40, 0x2E, 0x00, 0x02, 0x00, 0xD0, 0x07, 0x00, 0x00, 0x21, | ||
1897 | 0x00, 0x0D, 0x00, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x03, | ||
1898 | 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, | ||
1899 | 0x80, 0x38, 0x03, 0x9A, 0x00, 0x23, 0x00, 0x30, 0x00, 0x00, 0x03, 0x9A, 0x00, | ||
1900 | 0x25, 0x01, 0x00, 0x00, 0x54, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x80, 0x00, 0x2E, | ||
1901 | 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x09, 0x00, 0x30, 0x03, | ||
1902 | 0x9A, 0x00, 0x30, 0x00, 0x10, 0x00, 0x48, 0x03, 0x9A, 0x00, 0x88, 0x00, 0x70, | ||
1903 | 0x00, 0x38, 0xD6, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x04, 0xD6, 0x00, 0x00, | ||
1904 | 0x01, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0x20, 0x4E, 0x00, 0x00, 0x21, | ||
1905 | 0x00, 0x07, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x82, 0x18, 0x03, | ||
1906 | 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, | ||
1907 | 0x02, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, | ||
1908 | 0x78, 0x09, 0x9A, 0x00, 0x0F, 0x3E, 0x7A, 0x88, 0x30, 0x08, 0x9A, 0x00, 0x91, | ||
1909 | 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x88, 0x14, 0x09, | ||
1910 | 0x90, 0x00, 0x00, 0x00, 0x0A, 0x88, 0x10, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, | ||
1911 | 0x88, 0x14, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x88, 0x00, 0x00, 0x02, 0x00, | ||
1912 | 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x74, 0x09, 0x90, 0x00, 0x15, | ||
1913 | 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x20, 0xA1, 0x07, 0x00, 0x01, 0x00, | ||
1914 | 0x02, 0x00, 0x74, 0x49, 0x90, 0x00, 0x15, 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, | ||
1915 | 0x00, 0x20, 0xA1, 0x07, 0x00, 0x21, 0x00, 0x05, 0x00, 0x30, 0x08, 0x9A, 0x00, | ||
1916 | 0x91, 0x10, 0x27, 0x01, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x00, 0x20, | ||
1917 | 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, | ||
1918 | 0x02, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x00, 0x02, 0x9A, | ||
1919 | 0x00, 0x00, 0x98, 0x8F, 0x02, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
1920 | }; | ||
1921 | |||
1922 | /* HIGH SPEED TO LOW/MID SPEED */ | ||
1923 | static u8 seq_script_step32_gp106[] = { | ||
1924 | 0x34, 0x00, 0x02, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x00, 0x03, 0x00, 0x01, | ||
1925 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00, 0x0B, 0x00, 0x10, 0x09, | ||
1926 | 0x90, 0x00, 0x00, 0x00, 0x0C, 0x24, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0C, | ||
1927 | 0x24, 0x10, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x24, 0x14, 0x49, 0x90, 0x00, | ||
1928 | 0x00, 0x00, 0x0C, 0x24, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2E, | ||
1929 | 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x03, 0x00, 0x10, 0x03, | ||
1930 | 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, | ||
1931 | 0x00, 0x21, 0x00, 0x0D, 0x00, 0x48, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x70, 0x00, | ||
1932 | 0x00, 0x02, 0x9A, 0x00, 0x00, 0x10, 0x8F, 0x82, 0x14, 0x03, 0x9A, 0x00, 0x01, | ||
1933 | 0x00, 0x00, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x10, 0x8F, 0x02, 0x90, 0x00, | ||
1934 | 0x9A, 0x00, 0x61, 0x00, 0x00, 0x00, 0x90, 0x00, 0x9A, 0x00, 0x7F, 0x00, 0x00, | ||
1935 | 0xC0, 0x2E, 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x35, 0x00, | ||
1936 | 0x98, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x06, 0x9A, 0x00, 0x00, | ||
1937 | 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, 0x85, 0x8F, 0x8B, 0xF7, 0x38, 0x1F, | ||
1938 | 0x9A, 0x00, 0x00, 0x00, 0x01, 0x00, 0x34, 0x1F, 0x9A, 0x00, 0x00, 0x00, 0x01, | ||
1939 | 0x00, 0x34, 0x0D, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x08, 0x9A, 0x00, | ||
1940 | 0xE7, 0x8F, 0x8B, 0xF7, 0x40, 0x0D, 0x9A, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x24, | ||
1941 | 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x83, 0x40, 0x08, 0x08, 0x9A, 0x00, 0x70, 0x00, | ||
1942 | 0xA0, 0x4A, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x30, 0x08, 0x9A, | ||
1943 | 0x00, 0x90, 0x20, 0x67, 0x01, 0x30, 0x08, 0x9A, 0x00, 0x90, 0x20, 0x67, 0x00, | ||
1944 | 0xF4, 0x73, 0x13, 0x00, 0x12, 0x11, 0x00, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, | ||
1945 | 0x11, 0x00, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x20, | ||
1946 | 0x13, 0x00, 0x00, 0x00, 0x03, 0x98, 0x00, 0x20, 0x13, 0x00, 0x02, 0x00, 0x03, | ||
1947 | 0x98, 0x20, 0x20, 0x13, 0x00, 0x00, 0x00, 0x03, 0x20, 0x20, 0x73, 0x13, 0x00, | ||
1948 | 0x00, 0x00, 0x00, 0x00, 0x30, 0x20, 0x13, 0x00, 0x06, 0x00, 0x00, 0x10, 0x34, | ||
1949 | 0x20, 0x13, 0x00, 0x00, 0x10, 0x67, 0x06, 0x24, 0x20, 0x13, 0x00, 0x01, 0x3B, | ||
1950 | 0x02, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x01, 0x00, 0x00, 0x28, 0x20, 0x13, | ||
1951 | 0x00, 0x10, 0x00, 0x08, 0x10, 0x20, 0x20, 0x13, 0x00, 0x01, 0x00, 0x03, 0x20, | ||
1952 | 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x02, 0x00, 0x90, | ||
1953 | 0x73, 0x13, 0x00, 0x15, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0xFA, | ||
1954 | 0x00, 0x00, 0x21, 0x00, 0x25, 0x00, 0x2C, 0x20, 0x13, 0x00, 0x00, 0x03, 0x00, | ||
1955 | 0x00, 0x28, 0x20, 0x13, 0x00, 0x10, 0x00, 0x04, 0x10, 0xF4, 0x73, 0x13, 0x00, | ||
1956 | 0x00, 0x11, 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x10, 0x11, 0x01, 0x00, 0xF0, | ||
1957 | 0x73, 0x13, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x73, 0x13, 0x00, 0x00, 0x00, | ||
1958 | 0x01, 0x00, 0xF4, 0x73, 0x13, 0x00, 0x11, 0x11, 0x01, 0x00, 0xF4, 0x73, 0x13, | ||
1959 | 0x00, 0x11, 0x11, 0x00, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x20, 0x27, 0x00, | ||
1960 | 0x5C, 0x06, 0x9A, 0x00, 0x11, 0x00, 0x00, 0x00, 0x70, 0x06, 0x9A, 0x00, 0x06, | ||
1961 | 0x13, 0x08, 0xB4, 0x98, 0x06, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x06, | ||
1962 | 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x06, 0x9A, 0x00, 0x0E, 0x06, 0x0E, | ||
1963 | 0x06, 0x0C, 0x06, 0x9A, 0x00, 0x50, 0x20, 0x00, 0xFD, 0xD4, 0x0E, 0x9A, 0x00, | ||
1964 | 0x00, 0x00, 0x00, 0x40, 0xD4, 0x0E, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, | ||
1965 | 0x08, 0x9A, 0x00, 0xE7, 0x8F, 0x80, 0x40, 0x13, 0x00, 0x02, 0x00, 0x2C, 0x01, | ||
1966 | 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0x10, 0x27, 0x00, 0x00, 0x21, 0x00, 0x25, | ||
1967 | 0x00, 0x70, 0x06, 0x9A, 0x00, 0x06, 0x13, 0x08, 0x34, 0x2C, 0x08, 0x9A, 0x00, | ||
1968 | 0x00, 0x00, 0x15, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x00, 0x48, | ||
1969 | 0x02, 0x9A, 0x00, 0xA3, 0x44, 0x14, 0x86, 0x90, 0x02, 0x9A, 0x00, 0x12, 0x2C, | ||
1970 | 0x18, 0x06, 0x94, 0x02, 0x9A, 0x00, 0x8A, 0x82, 0x41, 0x24, 0x98, 0x02, 0x9A, | ||
1971 | 0x00, 0x11, 0x05, 0x06, 0x88, 0x9C, 0x02, 0x9A, 0x00, 0x8C, 0x10, 0x00, 0x22, | ||
1972 | 0xA0, 0x02, 0x9A, 0x00, 0x32, 0x00, 0x61, 0xD3, 0xA8, 0x02, 0x9A, 0x00, 0x0B, | ||
1973 | 0x86, 0x00, 0x01, 0x14, 0x06, 0x9A, 0x00, 0x77, 0x3E, 0x03, 0x30, 0x10, 0x06, | ||
1974 | 0x9A, 0x00, 0x77, 0x3E, 0x03, 0x30, 0x08, 0x08, 0x9A, 0x00, 0x70, 0x00, 0x00, | ||
1975 | 0x48, 0x78, 0x07, 0x10, 0x00, 0x33, 0x03, 0x00, 0x82, 0x4C, 0x02, 0x9A, 0x00, | ||
1976 | 0x85, 0x0C, 0x05, 0x06, 0x30, 0x1F, 0x9A, 0x00, 0x03, 0x16, 0x2C, 0x00, 0xE0, | ||
1977 | 0x08, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x9A, 0x00, 0x7E, 0x00, | ||
1978 | 0x00, 0x40, 0x2E, 0x00, 0x02, 0x00, 0xD0, 0x07, 0x00, 0x00, 0x21, 0x00, 0x0D, | ||
1979 | 0x00, 0x14, 0x03, 0x9A, 0x00, 0x01, 0x00, 0x00, 0x00, 0x10, 0x03, 0x9A, 0x00, | ||
1980 | 0x01, 0x00, 0x00, 0x00, 0x10, 0x02, 0x9A, 0x00, 0x00, 0x00, 0x00, 0x80, 0x38, | ||
1981 | 0x03, 0x9A, 0x00, 0x23, 0x01, 0x30, 0x00, 0x00, 0x03, 0x9A, 0x00, 0x2D, 0x02, | ||
1982 | 0x00, 0x00, 0x54, 0x03, 0x9A, 0x00, 0x00, 0x00, 0x80, 0x00, 0x2E, 0x00, 0x02, | ||
1983 | 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x09, 0x00, 0x30, 0x03, 0x9A, 0x00, | ||
1984 | 0x30, 0x00, 0x10, 0x00, 0x48, 0x03, 0x9A, 0x00, 0x88, 0x00, 0x70, 0x00, 0x38, | ||
1985 | 0xD6, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x04, 0xD6, 0x00, 0x00, 0x01, 0x00, | ||
1986 | 0x00, 0x00, 0x2E, 0x00, 0x02, 0x00, 0x20, 0x4E, 0x00, 0x00, 0x21, 0x00, 0x07, | ||
1987 | 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x82, 0x18, 0x03, 0x9A, 0x00, | ||
1988 | 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x90, 0x8F, 0x02, 0x2E, | ||
1989 | 0x00, 0x02, 0x00, 0xE8, 0x03, 0x00, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x78, 0x09, | ||
1990 | 0x9A, 0x00, 0x0B, 0x1E, 0x7A, 0x88, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, | ||
1991 | 0x00, 0x10, 0x09, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x14, 0x09, 0x90, 0x00, | ||
1992 | 0x00, 0x00, 0x0A, 0x98, 0x10, 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x14, | ||
1993 | 0x49, 0x90, 0x00, 0x00, 0x00, 0x0A, 0x98, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, | ||
1994 | 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x74, 0x09, 0x90, 0x00, 0x15, 0x00, 0x03, | ||
1995 | 0x00, 0x0F, 0x00, 0x00, 0x00, 0x20, 0xA1, 0x07, 0x00, 0x01, 0x00, 0x02, 0x00, | ||
1996 | 0x74, 0x49, 0x90, 0x00, 0x15, 0x00, 0x03, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x20, | ||
1997 | 0xA1, 0x07, 0x00, 0x21, 0x00, 0x0D, 0x00, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, | ||
1998 | 0x27, 0x01, 0x30, 0x08, 0x9A, 0x00, 0x91, 0x10, 0x27, 0x00, 0x10, 0x09, 0x90, | ||
1999 | 0x00, 0x00, 0x00, 0x08, 0x19, 0x14, 0x09, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, | ||
2000 | 0x10, 0x49, 0x90, 0x00, 0x00, 0x00, 0x08, 0x19, 0x14, 0x49, 0x90, 0x00, 0x00, | ||
2001 | 0x00, 0x08, 0x19, 0x20, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
2002 | 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x21, 0x00, 0x03, | ||
2003 | 0x00, 0x00, 0x02, 0x9A, 0x00, 0x00, 0x98, 0x8F, 0x02, 0x16, 0x00, 0x02, 0x00, | ||
2004 | 0x00, 0x00, 0x00, 0x00, | ||
2005 | }; | ||
2006 | |||
2007 | #ifdef CONFIG_DEBUG_FS | ||
2008 | static int mclk_debugfs_init(struct gk20a *g); | ||
2009 | #endif | ||
1648 | 2010 | ||
1649 | static void mclk_memory_load_training_pattern(struct gk20a *g) | 2011 | static void mclk_memory_load_training_pattern(struct gk20a *g) |
1650 | { | 2012 | { |
@@ -1671,11 +2033,18 @@ static void mclk_memory_load_shadow_regs(struct gk20a *g) | |||
1671 | 2033 | ||
1672 | gk20a_dbg_info(""); | 2034 | gk20a_dbg_info(""); |
1673 | 2035 | ||
1674 | reg_writes = ((sizeof(memory_shadow_reglist) / | 2036 | reg_writes = ((sizeof(memory_shadow_p0_reglist) / |
1675 | sizeof((memory_shadow_reglist)[0]))); | 2037 | sizeof((memory_shadow_p0_reglist)[0]))); |
2038 | for (index = 0; index < reg_writes; index++) { | ||
2039 | gk20a_writel(g, memory_shadow_p0_reglist[index].regaddr, | ||
2040 | memory_shadow_p0_reglist[index].writeval); | ||
2041 | } | ||
2042 | |||
2043 | reg_writes = ((sizeof(memory_shadow_p5_reglist) / | ||
2044 | sizeof((memory_shadow_p5_reglist)[0]))); | ||
1676 | for (index = 0; index < reg_writes; index++) { | 2045 | for (index = 0; index < reg_writes; index++) { |
1677 | gk20a_writel(g, memory_shadow_reglist[index].regaddr, | 2046 | gk20a_writel(g, memory_shadow_p5_reglist[index].regaddr, |
1678 | memory_shadow_reglist[index].writeval); | 2047 | memory_shadow_p5_reglist[index].writeval); |
1679 | } | 2048 | } |
1680 | 2049 | ||
1681 | gk20a_dbg_fn("done"); | 2050 | gk20a_dbg_fn("done"); |
@@ -1713,23 +2082,95 @@ status_update: | |||
1713 | *((u32 *)param) = msg_status; | 2082 | *((u32 *)param) = msg_status; |
1714 | } | 2083 | } |
1715 | 2084 | ||
1716 | int clk_mclkseq_build_prgm_gddr5(struct gk20a *g) | 2085 | int clk_mclkseq_init_mclk_gddr5(struct gk20a *g) |
1717 | { | 2086 | { |
2087 | struct clk_mclk_state *mclk; | ||
2088 | |||
2089 | gk20a_dbg_fn(""); | ||
2090 | |||
2091 | mclk = &g->clk_pmu.clk_mclk; | ||
2092 | |||
2093 | mutex_init(&mclk->mclk_mutex); | ||
2094 | |||
2095 | mclk->speed = gk20a_mclk_low_speed; /* Value from Devinit */ | ||
2096 | |||
2097 | /* Load Shadow registers */ | ||
2098 | mclk_memory_load_shadow_regs(g); | ||
2099 | |||
2100 | /* Load RAM pattern */ | ||
2101 | mclk_memory_load_training_pattern(g); | ||
2102 | |||
2103 | mclk->vreg_buf = kzalloc((sizeof(u32) * VREG_COUNT), GFP_KERNEL); | ||
2104 | if (!mclk->vreg_buf) { | ||
2105 | gk20a_err(dev_from_gk20a(g), | ||
2106 | "unable to allocate memory for VREG"); | ||
2107 | return -ENOMEM; | ||
2108 | } | ||
2109 | |||
2110 | #ifdef CONFIG_DEBUG_FS | ||
2111 | if (!mclk->debugfs_set) { | ||
2112 | if (mclk_debugfs_init(g)) | ||
2113 | mclk->debugfs_set = true; | ||
2114 | } | ||
2115 | #endif | ||
2116 | mclk->change = clk_mclkseq_change_mclk_gddr5; | ||
2117 | |||
2118 | return mclk->change(g, DEFAULT_BOOT_MCLK_SPEED); | ||
2119 | } | ||
2120 | |||
2121 | int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, enum gk20a_mclk_speed speed) | ||
2122 | { | ||
2123 | struct clk_mclk_state *mclk; | ||
1718 | struct pmu_payload payload = { {0} }; | 2124 | struct pmu_payload payload = { {0} }; |
1719 | void *vreg_buf = NULL; | ||
1720 | struct nv_pmu_seq_cmd cmd; | 2125 | struct nv_pmu_seq_cmd cmd; |
1721 | struct nv_pmu_seq_cmd_run_script *pseq_cmd; | 2126 | struct nv_pmu_seq_cmd_run_script *pseq_cmd; |
1722 | u32 seqdesc; | 2127 | u32 seqdesc; |
1723 | u32 status = 0; | 2128 | u32 status = 0; |
1724 | u32 seq_completion_status = ~0x0; | 2129 | u32 seq_completion_status = ~0x0; |
2130 | u8 *seq_script_ptr = NULL; | ||
2131 | size_t seq_script_size = 0; | ||
2132 | #ifdef CONFIG_DEBUG_FS | ||
2133 | u64 t0, t1; | ||
2134 | #endif | ||
1725 | 2135 | ||
1726 | gk20a_dbg_info(""); | 2136 | gk20a_dbg_info(""); |
1727 | 2137 | ||
1728 | /* Load Shadow registers */ | 2138 | mclk = &g->clk_pmu.clk_mclk; |
1729 | mclk_memory_load_shadow_regs(g); | ||
1730 | 2139 | ||
1731 | /* Load RAM pattern */ | 2140 | mutex_lock(&mclk->mclk_mutex); |
1732 | mclk_memory_load_training_pattern(g); | 2141 | |
2142 | if (speed == mclk->speed) | ||
2143 | goto exit_status; | ||
2144 | |||
2145 | switch (speed) { | ||
2146 | case gk20a_mclk_mid_speed: | ||
2147 | if (mclk->speed == gk20a_mclk_low_speed) { | ||
2148 | seq_script_ptr = seq_script_step33_gp106; | ||
2149 | seq_script_size = sizeof(seq_script_step33_gp106); | ||
2150 | } else { | ||
2151 | seq_script_ptr = seq_script_step32_gp106; | ||
2152 | seq_script_size = sizeof(seq_script_step32_gp106); | ||
2153 | } | ||
2154 | break; | ||
2155 | case gk20a_mclk_high_speed: | ||
2156 | seq_script_ptr = seq_script_step28_gp106; | ||
2157 | seq_script_size = sizeof(seq_script_step28_gp106); | ||
2158 | break; | ||
2159 | case gk20a_mclk_low_speed: | ||
2160 | if (mclk->speed == gk20a_mclk_mid_speed) { | ||
2161 | seq_script_ptr = seq_script_step33_ls_gp106; | ||
2162 | seq_script_size = sizeof(seq_script_step33_ls_gp106); | ||
2163 | } else { | ||
2164 | seq_script_ptr = seq_script_step32_ls_gp106; | ||
2165 | seq_script_size = sizeof(seq_script_step32_ls_gp106); | ||
2166 | } | ||
2167 | break; | ||
2168 | default: | ||
2169 | gk20a_err(dev_from_gk20a(g), | ||
2170 | "Illegal MCLK clock change"); | ||
2171 | status = -EINVAL; | ||
2172 | goto exit_status; | ||
2173 | } | ||
1733 | 2174 | ||
1734 | /* Fill command header with SEQ ID & size */ | 2175 | /* Fill command header with SEQ ID & size */ |
1735 | memset(&cmd, 0, sizeof(cmd)); | 2176 | memset(&cmd, 0, sizeof(cmd)); |
@@ -1741,26 +2182,29 @@ int clk_mclkseq_build_prgm_gddr5(struct gk20a *g) | |||
1741 | pseq_cmd = &cmd.run_script; | 2182 | pseq_cmd = &cmd.run_script; |
1742 | pseq_cmd->cmd_type = NV_PMU_SEQ_CMD_ID_RUN_SCRIPT; | 2183 | pseq_cmd->cmd_type = NV_PMU_SEQ_CMD_ID_RUN_SCRIPT; |
1743 | 2184 | ||
1744 | gk20a_writel(g, 0x132000, 0x98010000); | 2185 | #ifdef CONFIG_DEBUG_FS |
1745 | udelay(0x5); | 2186 | g->ops.read_ptimer(g, &t0); |
2187 | #endif | ||
2188 | |||
2189 | if (speed == gk20a_mclk_high_speed) { | ||
2190 | gk20a_writel(g, 0x132000, 0x98010000); | ||
2191 | /* Introduce delay */ | ||
2192 | gk20a_readl(g, 0x132000); | ||
2193 | gk20a_readl(g, 0x132000); | ||
2194 | } | ||
2195 | |||
1746 | gk20a_writel(g, 0x137300, 0x20000103); | 2196 | gk20a_writel(g, 0x137300, 0x20000103); |
1747 | 2197 | ||
1748 | /* Read sequencer binary*/ | 2198 | /* Read sequencer binary*/ |
1749 | payload.in.buf = seq_script_gp106; | 2199 | payload.in.buf = seq_script_ptr; |
1750 | payload.in.size = sizeof(seq_script_gp106); | 2200 | payload.in.size = seq_script_size; |
1751 | payload.in.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; | 2201 | payload.in.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; |
1752 | payload.in.offset = offsetof(struct nv_pmu_seq_cmd_run_script, | 2202 | payload.in.offset = offsetof(struct nv_pmu_seq_cmd_run_script, |
1753 | script_alloc); | 2203 | script_alloc); |
1754 | 2204 | ||
1755 | vreg_buf = kzalloc((sizeof(u32) * VREG_COUNT), GFP_KERNEL); | 2205 | memset(mclk->vreg_buf, 0, (sizeof(u32) * VREG_COUNT)); |
1756 | if (!vreg_buf) { | ||
1757 | status = -ENOMEM; | ||
1758 | gk20a_err(dev_from_gk20a(g), | ||
1759 | "unable to allocate memory for VREG"); | ||
1760 | goto exit_status; | ||
1761 | } | ||
1762 | 2206 | ||
1763 | payload.out.buf = vreg_buf; | 2207 | payload.out.buf = mclk->vreg_buf; |
1764 | payload.out.size = (VREG_COUNT * sizeof(u32)); | 2208 | payload.out.size = (VREG_COUNT * sizeof(u32)); |
1765 | payload.out.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; | 2209 | payload.out.fb_size = PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED; |
1766 | payload.out.offset = offsetof(struct nv_pmu_seq_cmd_run_script, | 2210 | payload.out.offset = offsetof(struct nv_pmu_seq_cmd_run_script, |
@@ -1777,7 +2221,6 @@ int clk_mclkseq_build_prgm_gddr5(struct gk20a *g) | |||
1777 | cmd.hdr.unit_id); | 2221 | cmd.hdr.unit_id); |
1778 | goto exit_status; | 2222 | goto exit_status; |
1779 | } | 2223 | } |
1780 | |||
1781 | /* wait till sequencer script complete */ | 2224 | /* wait till sequencer script complete */ |
1782 | pmu_wait_message_cond(&g->pmu, (gk20a_get_gr_idle_timeout(g)), | 2225 | pmu_wait_message_cond(&g->pmu, (gk20a_get_gr_idle_timeout(g)), |
1783 | &seq_completion_status, 0); | 2226 | &seq_completion_status, 0); |
@@ -1788,7 +2231,137 @@ int clk_mclkseq_build_prgm_gddr5(struct gk20a *g) | |||
1788 | goto exit_status; | 2231 | goto exit_status; |
1789 | } | 2232 | } |
1790 | 2233 | ||
2234 | mclk->speed = speed; | ||
2235 | |||
2236 | #ifdef CONFIG_DEBUG_FS | ||
2237 | g->ops.read_ptimer(g, &t1); | ||
2238 | mclk->switch_num++; | ||
2239 | |||
2240 | if (mclk->switch_num == 1) { | ||
2241 | mclk->switch_max = mclk->switch_min = | ||
2242 | mclk->switch_avg = (t1-t0)/1000; | ||
2243 | mclk->switch_std = 0; | ||
2244 | } else { | ||
2245 | s64 prev_avg; | ||
2246 | u64 curr = (t1-t0)/1000; | ||
2247 | |||
2248 | mclk->switch_max = curr > mclk->switch_max ? | ||
2249 | curr : mclk->switch_max; | ||
2250 | mclk->switch_min = mclk->switch_min ? | ||
2251 | (curr < mclk->switch_min ? | ||
2252 | curr : mclk->switch_min) : curr; | ||
2253 | prev_avg = mclk->switch_avg; | ||
2254 | mclk->switch_avg = (curr + | ||
2255 | (mclk->switch_avg * (mclk->switch_num-1))) / | ||
2256 | mclk->switch_num; | ||
2257 | mclk->switch_std += | ||
2258 | (curr - mclk->switch_avg) * (curr - prev_avg); | ||
2259 | } | ||
2260 | #endif | ||
1791 | exit_status: | 2261 | exit_status: |
1792 | kfree(vreg_buf); | 2262 | |
2263 | mutex_unlock(&mclk->mclk_mutex); | ||
1793 | return status; | 2264 | return status; |
1794 | } | 2265 | } |
2266 | |||
2267 | #ifdef CONFIG_DEBUG_FS | ||
2268 | static int mclk_debug_speed_set(void *data, u64 val) | ||
2269 | { | ||
2270 | enum gk20a_mclk_speed speed; | ||
2271 | struct gk20a *g = (struct gk20a *) data; | ||
2272 | struct clk_mclk_state *mclk; | ||
2273 | |||
2274 | mclk = &g->clk_pmu.clk_mclk; | ||
2275 | |||
2276 | /* TODO thia should be done according to VBIOS tables */ | ||
2277 | |||
2278 | speed = (val <= MCLK_LOW_SPEED_LIMIT) ? gk20a_mclk_low_speed : | ||
2279 | (val <= MCLK_MID_SPEED_LIMIT) ? gk20a_mclk_mid_speed : | ||
2280 | gk20a_mclk_high_speed; | ||
2281 | |||
2282 | if (mclk->change) | ||
2283 | return mclk->change(g, speed); | ||
2284 | return 0; | ||
2285 | |||
2286 | } | ||
2287 | |||
2288 | DEFINE_SIMPLE_ATTRIBUTE( | ||
2289 | mclk_debug_speed_set_fops, | ||
2290 | NULL, | ||
2291 | mclk_debug_speed_set, | ||
2292 | "%llu\n" | ||
2293 | ); | ||
2294 | |||
2295 | static int mclk_switch_stats_show(struct seq_file *s, void *unused) | ||
2296 | { | ||
2297 | struct gk20a *g = s->private; | ||
2298 | struct clk_mclk_state *mclk; | ||
2299 | u64 num; | ||
2300 | s64 tmp, avg, std, max, min; | ||
2301 | |||
2302 | mclk = &g->clk_pmu.clk_mclk; | ||
2303 | |||
2304 | /* Make copy of structure to reduce time with lock held */ | ||
2305 | mutex_lock(&mclk->mclk_mutex); | ||
2306 | std = mclk->switch_std; | ||
2307 | avg = mclk->switch_avg; | ||
2308 | max = mclk->switch_max; | ||
2309 | min = mclk->switch_min; | ||
2310 | num = mclk->switch_num; | ||
2311 | mutex_unlock(&mclk->mclk_mutex); | ||
2312 | |||
2313 | tmp = std; | ||
2314 | do_div(tmp, num); | ||
2315 | seq_printf(s, "MCLK:\n number of transitions: %lld\n", | ||
2316 | num); | ||
2317 | seq_printf(s, "max / min : %lld / %lld usec\n", | ||
2318 | max, min); | ||
2319 | seq_printf(s, "avg / std : %lld / %ld usec\n", | ||
2320 | avg, int_sqrt(tmp)); | ||
2321 | |||
2322 | return 0; | ||
2323 | } | ||
2324 | |||
2325 | static int mclk_switch_stats_open(struct inode *inode, struct file *file) | ||
2326 | { | ||
2327 | return single_open(file, mclk_switch_stats_show, inode->i_private); | ||
2328 | } | ||
2329 | |||
2330 | static const struct file_operations mclk_switch_stats_fops = { | ||
2331 | .open = mclk_switch_stats_open, | ||
2332 | .read = seq_read, | ||
2333 | .llseek = seq_lseek, | ||
2334 | .release = single_release, | ||
2335 | }; | ||
2336 | |||
2337 | |||
2338 | static int mclk_debugfs_init(struct gk20a *g) | ||
2339 | { | ||
2340 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
2341 | |||
2342 | struct dentry *gpu_root = platform->debugfs; | ||
2343 | struct dentry *d; | ||
2344 | |||
2345 | gk20a_dbg(gpu_dbg_info, "g=%p", g); | ||
2346 | |||
2347 | d = debugfs_create_file( | ||
2348 | "mclk_speed_set", | ||
2349 | S_IWUGO, | ||
2350 | gpu_root, | ||
2351 | g, | ||
2352 | &mclk_debug_speed_set_fops); | ||
2353 | if (!d) | ||
2354 | return -ENOMEM; | ||
2355 | |||
2356 | d = debugfs_create_file( | ||
2357 | "mclk_switch_stats", | ||
2358 | S_IRUGO, | ||
2359 | gpu_root, | ||
2360 | g, | ||
2361 | &mclk_switch_stats_fops); | ||
2362 | if (!d) | ||
2363 | return -ENOMEM; | ||
2364 | |||
2365 | return 0; | ||
2366 | } | ||
2367 | #endif | ||
diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.h b/drivers/gpu/nvgpu/clk/clk_mclk.h index f86893f7..c3261eac 100644 --- a/drivers/gpu/nvgpu/clk/clk_mclk.h +++ b/drivers/gpu/nvgpu/clk/clk_mclk.h | |||
@@ -14,6 +14,34 @@ | |||
14 | #ifndef _CLKMCLK_H_ | 14 | #ifndef _CLKMCLK_H_ |
15 | #define _CLKMCLK_H_ | 15 | #define _CLKMCLK_H_ |
16 | 16 | ||
17 | int clk_mclkseq_build_prgm_gddr5(struct gk20a *g); | 17 | #include <linux/mutex.h> |
18 | |||
19 | enum gk20a_mclk_speed { | ||
20 | gk20a_mclk_low_speed, | ||
21 | gk20a_mclk_mid_speed, | ||
22 | gk20a_mclk_high_speed | ||
23 | }; | ||
24 | |||
25 | struct clk_mclk_state { | ||
26 | enum gk20a_mclk_speed speed; | ||
27 | struct mutex mclk_mutex; | ||
28 | void *vreg_buf; | ||
29 | |||
30 | /* function pointers */ | ||
31 | int (*change)(struct gk20a *g, enum gk20a_mclk_speed speed); | ||
32 | |||
33 | #ifdef CONFIG_DEBUG_FS | ||
34 | s64 switch_max; | ||
35 | s64 switch_min; | ||
36 | u64 switch_num; | ||
37 | s64 switch_avg; | ||
38 | s64 switch_std; | ||
39 | bool debugfs_set; | ||
40 | #endif | ||
41 | }; | ||
42 | |||
43 | int clk_mclkseq_init_mclk_gddr5(struct gk20a *g); | ||
44 | int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, | ||
45 | enum gk20a_mclk_speed speed); | ||
18 | 46 | ||
19 | #endif | 47 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index 48653142..f3e7b298 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c | |||
@@ -195,7 +195,7 @@ void gp106_init_pmu_ops(struct gpu_ops *gops) | |||
195 | gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; | 195 | gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; |
196 | gops->pmu.dump_secure_fuses = NULL; | 196 | gops->pmu.dump_secure_fuses = NULL; |
197 | gops->pmu.reset = gp106_falcon_reset; | 197 | gops->pmu.reset = gp106_falcon_reset; |
198 | gops->pmu.mclk_init = clk_mclkseq_build_prgm_gddr5; | 198 | gops->pmu.mclk_init = clk_mclkseq_init_mclk_gddr5; |
199 | 199 | ||
200 | gk20a_dbg_fn("done"); | 200 | gk20a_dbg_fn("done"); |
201 | } | 201 | } |