diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmuif/gpmuiftherm.h | 71 |
3 files changed, 77 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 43f673f5..7699cd53 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -969,6 +969,9 @@ struct gk20a { | |||
969 | /* PCIe power states. */ | 969 | /* PCIe power states. */ |
970 | bool xve_l0s; | 970 | bool xve_l0s; |
971 | bool xve_l1; | 971 | bool xve_l1; |
972 | |||
973 | /* Current warning temp in sfxp24.8 */ | ||
974 | s32 curr_warn_temp; | ||
972 | }; | 975 | }; |
973 | 976 | ||
974 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) | 977 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index c31bd187..6ec0067b 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -28,6 +28,7 @@ | |||
28 | #include "pmuif/gpmuifperf.h" | 28 | #include "pmuif/gpmuifperf.h" |
29 | #include "pmuif/gpmuifpmgr.h" | 29 | #include "pmuif/gpmuifpmgr.h" |
30 | #include "pmuif/gpmuifvolt.h" | 30 | #include "pmuif/gpmuifvolt.h" |
31 | #include "pmuif/gpmuiftherm.h" | ||
31 | 32 | ||
32 | /* defined by pmu hw spec */ | 33 | /* defined by pmu hw spec */ |
33 | #define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) | 34 | #define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) |
@@ -365,6 +366,7 @@ struct pmu_cmd { | |||
365 | struct nv_pmu_volt_cmd volt; | 366 | struct nv_pmu_volt_cmd volt; |
366 | struct nv_pmu_clk_cmd clk; | 367 | struct nv_pmu_clk_cmd clk; |
367 | struct nv_pmu_pmgr_cmd pmgr; | 368 | struct nv_pmu_pmgr_cmd pmgr; |
369 | struct nv_pmu_therm_cmd therm; | ||
368 | } cmd; | 370 | } cmd; |
369 | }; | 371 | }; |
370 | 372 | ||
@@ -382,6 +384,7 @@ struct pmu_msg { | |||
382 | struct nv_pmu_volt_msg volt; | 384 | struct nv_pmu_volt_msg volt; |
383 | struct nv_pmu_clk_msg clk; | 385 | struct nv_pmu_clk_msg clk; |
384 | struct nv_pmu_pmgr_msg pmgr; | 386 | struct nv_pmu_pmgr_msg pmgr; |
387 | struct nv_pmu_therm_msg therm; | ||
385 | } msg; | 388 | } msg; |
386 | }; | 389 | }; |
387 | 390 | ||
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h new file mode 100644 index 00000000..9c10e93c --- /dev/null +++ b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h | |||
@@ -0,0 +1,71 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #ifndef _GPMUIFTHERM_H_ | ||
15 | #define _GPMUIFTHERM_H_ | ||
16 | |||
17 | #include "gk20a/pmu_common.h" | ||
18 | |||
19 | #define NV_PMU_THERM_CMD_ID_RPC 0x00000002 | ||
20 | #define NV_PMU_THERM_MSG_ID_RPC 0x00000002 | ||
21 | #define NV_PMU_THERM_RPC_ID_SLCT_EVENT_TEMP_TH_SET 0x00000006 | ||
22 | #define NV_PMU_THERM_EVENT_THERMAL_1 0x00000004 | ||
23 | |||
24 | struct nv_pmu_therm_rpc_slct_event_temp_th_set { | ||
25 | s32 temp_threshold; | ||
26 | u8 event_id; | ||
27 | flcn_status flcn_stat; | ||
28 | }; | ||
29 | |||
30 | struct nv_pmu_therm_rpc { | ||
31 | u8 function; | ||
32 | bool b_supported; | ||
33 | union { | ||
34 | struct nv_pmu_therm_rpc_slct_event_temp_th_set slct_event_temp_th_set; | ||
35 | } params; | ||
36 | }; | ||
37 | |||
38 | struct nv_pmu_therm_cmd_rpc { | ||
39 | u8 cmd_type; | ||
40 | u8 pad[3]; | ||
41 | struct nv_pmu_allocation request; | ||
42 | }; | ||
43 | |||
44 | #define NV_PMU_THERM_CMD_RPC_ALLOC_OFFSET \ | ||
45 | offsetof(struct nv_pmu_therm_cmd_rpc, request) | ||
46 | |||
47 | struct nv_pmu_therm_cmd { | ||
48 | union { | ||
49 | u8 cmd_type; | ||
50 | struct nv_pmu_therm_cmd_rpc rpc; | ||
51 | }; | ||
52 | }; | ||
53 | |||
54 | struct nv_pmu_therm_msg_rpc { | ||
55 | u8 msg_type; | ||
56 | u8 rsvd[3]; | ||
57 | struct nv_pmu_allocation response; | ||
58 | }; | ||
59 | |||
60 | #define NV_PMU_THERM_MSG_RPC_ALLOC_OFFSET \ | ||
61 | offsetof(struct nv_pmu_therm_msg_rpc, response) | ||
62 | |||
63 | struct nv_pmu_therm_msg { | ||
64 | union { | ||
65 | u8 msg_type; | ||
66 | struct nv_pmu_therm_msg_rpc rpc; | ||
67 | }; | ||
68 | }; | ||
69 | |||
70 | #endif | ||
71 | |||