diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 36 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 33 |
4 files changed, 67 insertions, 26 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 28d43081..309a1b08 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -135,6 +135,8 @@ struct gpu_ops { | |||
135 | u32 mode); | 135 | u32 mode); |
136 | int (*get_zcull_info)(struct gk20a *g, struct gr_gk20a *gr, | 136 | int (*get_zcull_info)(struct gk20a *g, struct gr_gk20a *gr, |
137 | struct gr_zcull_info *zcull_params); | 137 | struct gr_zcull_info *zcull_params); |
138 | bool (*is_tpc_addr)(u32 addr); | ||
139 | u32 (*get_tpc_num)(u32 addr); | ||
138 | } gr; | 140 | } gr; |
139 | const char *name; | 141 | const char *name; |
140 | struct { | 142 | struct { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 8ac1b276..452560d8 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5922,13 +5922,13 @@ int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr, | |||
5922 | } else | 5922 | } else |
5923 | *gpc_num = pri_get_gpc_num(addr); | 5923 | *gpc_num = pri_get_gpc_num(addr); |
5924 | 5924 | ||
5925 | if (pri_is_tpc_addr(gpc_addr)) { | 5925 | if (g->ops.gr.is_tpc_addr(gpc_addr)) { |
5926 | *addr_type = CTXSW_ADDR_TYPE_TPC; | 5926 | *addr_type = CTXSW_ADDR_TYPE_TPC; |
5927 | if (pri_is_tpc_addr_shared(gpc_addr)) { | 5927 | if (pri_is_tpc_addr_shared(gpc_addr)) { |
5928 | *broadcast_flags |= PRI_BROADCAST_FLAGS_TPC; | 5928 | *broadcast_flags |= PRI_BROADCAST_FLAGS_TPC; |
5929 | return 0; | 5929 | return 0; |
5930 | } | 5930 | } |
5931 | *tpc_num = pri_get_tpc_num(gpc_addr); | 5931 | *tpc_num = g->ops.gr.get_tpc_num(gpc_addr); |
5932 | } | 5932 | } |
5933 | return 0; | 5933 | return 0; |
5934 | } else if (pri_is_be_addr(addr)) { | 5934 | } else if (pri_is_be_addr(addr)) { |
@@ -6261,7 +6261,7 @@ static void gr_gk20a_access_smpc_reg(struct gk20a *g, u32 quad, u32 offset) | |||
6261 | 6261 | ||
6262 | gpc = pri_get_gpc_num(offset); | 6262 | gpc = pri_get_gpc_num(offset); |
6263 | gpc_tpc_addr = pri_gpccs_addr_mask(offset); | 6263 | gpc_tpc_addr = pri_gpccs_addr_mask(offset); |
6264 | tpc = pri_get_tpc_num(gpc_tpc_addr); | 6264 | tpc = g->ops.gr.get_tpc_num(gpc_tpc_addr); |
6265 | 6265 | ||
6266 | quad_ctrl = quad & 0x1; /* first bit tells us quad */ | 6266 | quad_ctrl = quad & 0x1; /* first bit tells us quad */ |
6267 | half_ctrl = (quad >> 1) & 0x1; /* second bit tells us half */ | 6267 | half_ctrl = (quad >> 1) & 0x1; /* second bit tells us half */ |
@@ -6364,8 +6364,8 @@ static int gr_gk20a_find_priv_offset_in_ext_buffer(struct gk20a *g, | |||
6364 | u32 gpc_addr = 0; | 6364 | u32 gpc_addr = 0; |
6365 | gpc_num = pri_get_gpc_num(addr); | 6365 | gpc_num = pri_get_gpc_num(addr); |
6366 | gpc_addr = pri_gpccs_addr_mask(addr); | 6366 | gpc_addr = pri_gpccs_addr_mask(addr); |
6367 | if (pri_is_tpc_addr(gpc_addr)) | 6367 | if (g->ops.gr.is_tpc_addr(gpc_addr)) |
6368 | tpc_num = pri_get_tpc_num(gpc_addr); | 6368 | tpc_num = g->ops.gr.get_tpc_num(gpc_addr); |
6369 | else | 6369 | else |
6370 | return -EINVAL; | 6370 | return -EINVAL; |
6371 | 6371 | ||
@@ -7174,6 +7174,30 @@ void gk20a_init_gr(struct gk20a *g) | |||
7174 | init_waitqueue_head(&g->gr.init_wq); | 7174 | init_waitqueue_head(&g->gr.init_wq); |
7175 | } | 7175 | } |
7176 | 7176 | ||
7177 | static bool gr_gk20a_is_tpc_addr(u32 addr) | ||
7178 | { | ||
7179 | return ((addr >= proj_tpc_in_gpc_base_v()) && | ||
7180 | (addr < proj_tpc_in_gpc_base_v() + | ||
7181 | (proj_scal_litter_num_tpc_per_gpc_v() * | ||
7182 | proj_tpc_in_gpc_stride_v()))) | ||
7183 | || pri_is_tpc_addr_shared(addr); | ||
7184 | } | ||
7185 | |||
7186 | static u32 gr_gk20a_get_tpc_num(u32 addr) | ||
7187 | { | ||
7188 | u32 i, start; | ||
7189 | u32 num_tpcs = proj_scal_litter_num_tpc_per_gpc_v(); | ||
7190 | |||
7191 | for (i = 0; i < num_tpcs; i++) { | ||
7192 | start = proj_tpc_in_gpc_base_v() + | ||
7193 | (i * proj_tpc_in_gpc_stride_v()); | ||
7194 | if ((addr >= start) && | ||
7195 | (addr < (start + proj_tpc_in_gpc_stride_v()))) | ||
7196 | return i; | ||
7197 | } | ||
7198 | return 0; | ||
7199 | } | ||
7200 | |||
7177 | void gk20a_init_gr_ops(struct gpu_ops *gops) | 7201 | void gk20a_init_gr_ops(struct gpu_ops *gops) |
7178 | { | 7202 | { |
7179 | gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg; | 7203 | gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg; |
@@ -7205,4 +7229,6 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) | |||
7205 | gops->gr.free_obj_ctx = gk20a_free_obj_ctx; | 7229 | gops->gr.free_obj_ctx = gk20a_free_obj_ctx; |
7206 | gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull; | 7230 | gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull; |
7207 | gops->gr.get_zcull_info = gr_gk20a_get_zcull_info; | 7231 | gops->gr.get_zcull_info = gr_gk20a_get_zcull_info; |
7232 | gops->gr.is_tpc_addr = gr_gk20a_is_tpc_addr; | ||
7233 | gops->gr.get_tpc_num = gr_gk20a_get_tpc_num; | ||
7208 | } | 7234 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h index 9e1a1cb8..0f70e8aa 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Graphics Context Pri Register Addressing | 2 | * GK20A Graphics Context Pri Register Addressing |
3 | * | 3 | * |
4 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -85,26 +85,6 @@ static inline bool pri_is_tpc_addr_shared(u32 addr) | |||
85 | (addr < (proj_tpc_in_gpc_shared_base_v() + | 85 | (addr < (proj_tpc_in_gpc_shared_base_v() + |
86 | proj_tpc_in_gpc_stride_v())); | 86 | proj_tpc_in_gpc_stride_v())); |
87 | } | 87 | } |
88 | static inline bool pri_is_tpc_addr(u32 addr) | ||
89 | { | ||
90 | return ((addr >= proj_tpc_in_gpc_base_v()) && | ||
91 | (addr < proj_tpc_in_gpc_base_v() + (proj_scal_litter_num_tpc_per_gpc_v() * | ||
92 | proj_tpc_in_gpc_stride_v()))) | ||
93 | || | ||
94 | pri_is_tpc_addr_shared(addr); | ||
95 | } | ||
96 | static inline u32 pri_get_tpc_num(u32 addr) | ||
97 | { | ||
98 | u32 i, start; | ||
99 | u32 num_tpcs = proj_scal_litter_num_tpc_per_gpc_v(); | ||
100 | |||
101 | for (i = 0; i < num_tpcs; i++) { | ||
102 | start = proj_tpc_in_gpc_base_v() + (i * proj_tpc_in_gpc_stride_v()); | ||
103 | if ((addr >= start) && (addr < (start + proj_tpc_in_gpc_stride_v()))) | ||
104 | return i; | ||
105 | } | ||
106 | return 0; | ||
107 | } | ||
108 | 88 | ||
109 | /* | 89 | /* |
110 | * BE pri addressing | 90 | * BE pri addressing |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 8a3de4e8..835ff6bf 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -614,6 +614,37 @@ static int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, | |||
614 | return 0; | 614 | return 0; |
615 | } | 615 | } |
616 | 616 | ||
617 | static bool gr_gm20b_is_tpc_addr_shared(u32 addr) | ||
618 | { | ||
619 | return (addr >= proj_tpc_in_gpc_shared_base_v()) && | ||
620 | (addr < (proj_tpc_in_gpc_shared_base_v() + | ||
621 | proj_tpc_in_gpc_stride_v())); | ||
622 | } | ||
623 | |||
624 | static bool gr_gm20b_is_tpc_addr(u32 addr) | ||
625 | { | ||
626 | return ((addr >= proj_tpc_in_gpc_base_v()) && | ||
627 | (addr < proj_tpc_in_gpc_base_v() + | ||
628 | (proj_scal_litter_num_tpc_per_gpc_v() * | ||
629 | proj_tpc_in_gpc_stride_v()))) | ||
630 | || gr_gm20b_is_tpc_addr_shared(addr); | ||
631 | } | ||
632 | |||
633 | static u32 gr_gm20b_get_tpc_num(u32 addr) | ||
634 | { | ||
635 | u32 i, start; | ||
636 | u32 num_tpcs = proj_scal_litter_num_tpc_per_gpc_v(); | ||
637 | |||
638 | for (i = 0; i < num_tpcs; i++) { | ||
639 | start = proj_tpc_in_gpc_base_v() + | ||
640 | (i * proj_tpc_in_gpc_stride_v()); | ||
641 | if ((addr >= start) && | ||
642 | (addr < (start + proj_tpc_in_gpc_stride_v()))) | ||
643 | return i; | ||
644 | } | ||
645 | return 0; | ||
646 | } | ||
647 | |||
617 | #ifdef CONFIG_TEGRA_ACR | 648 | #ifdef CONFIG_TEGRA_ACR |
618 | static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) | 649 | static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) |
619 | { | 650 | { |
@@ -748,4 +779,6 @@ void gm20b_init_gr(struct gpu_ops *gops) | |||
748 | gops->gr.free_obj_ctx = gk20a_free_obj_ctx; | 779 | gops->gr.free_obj_ctx = gk20a_free_obj_ctx; |
749 | gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull; | 780 | gops->gr.bind_ctxsw_zcull = gr_gk20a_bind_ctxsw_zcull; |
750 | gops->gr.get_zcull_info = gr_gk20a_get_zcull_info; | 781 | gops->gr.get_zcull_info = gr_gk20a_get_zcull_info; |
782 | gops->gr.is_tpc_addr = gr_gm20b_is_tpc_addr; | ||
783 | gops->gr.get_tpc_num = gr_gm20b_get_tpc_num; | ||
751 | } | 784 | } |