diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 1 |
4 files changed, 15 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 08066604..c32c47fb 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -2051,7 +2051,7 @@ static bool gk20a_fifo_check_ch_ctxsw_timeout(struct channel_gk20a *ch, | |||
2051 | return recover; | 2051 | return recover; |
2052 | } | 2052 | } |
2053 | 2053 | ||
2054 | static bool gk20a_fifo_check_tsg_ctxsw_timeout(struct tsg_gk20a *tsg, | 2054 | bool gk20a_fifo_check_tsg_ctxsw_timeout(struct tsg_gk20a *tsg, |
2055 | bool *verbose, u32 *ms) | 2055 | bool *verbose, u32 *ms) |
2056 | { | 2056 | { |
2057 | struct channel_gk20a *ch; | 2057 | struct channel_gk20a *ch; |
@@ -2121,7 +2121,7 @@ static bool gk20a_fifo_check_tsg_ctxsw_timeout(struct tsg_gk20a *tsg, | |||
2121 | return recover; | 2121 | return recover; |
2122 | } | 2122 | } |
2123 | 2123 | ||
2124 | static bool gk20a_fifo_handle_sched_error(struct gk20a *g) | 2124 | bool gk20a_fifo_handle_sched_error(struct gk20a *g) |
2125 | { | 2125 | { |
2126 | u32 sched_error; | 2126 | u32 sched_error; |
2127 | u32 engine_id; | 2127 | u32 engine_id; |
@@ -2205,7 +2205,7 @@ static u32 fifo_error_isr(struct gk20a *g, u32 fifo_intr) | |||
2205 | } | 2205 | } |
2206 | 2206 | ||
2207 | if (fifo_intr & fifo_intr_0_sched_error_pending_f()) { | 2207 | if (fifo_intr & fifo_intr_0_sched_error_pending_f()) { |
2208 | print_channel_reset_log = gk20a_fifo_handle_sched_error(g); | 2208 | print_channel_reset_log = g->ops.fifo.handle_sched_error(g); |
2209 | handled |= fifo_intr_0_sched_error_pending_f(); | 2209 | handled |= fifo_intr_0_sched_error_pending_f(); |
2210 | } | 2210 | } |
2211 | 2211 | ||
@@ -2463,6 +2463,9 @@ void gk20a_fifo_isr(struct gk20a *g) | |||
2463 | if (fifo_intr & fifo_intr_0_pbdma_intr_pending_f()) | 2463 | if (fifo_intr & fifo_intr_0_pbdma_intr_pending_f()) |
2464 | clear_intr |= fifo_pbdma_isr(g, fifo_intr); | 2464 | clear_intr |= fifo_pbdma_isr(g, fifo_intr); |
2465 | 2465 | ||
2466 | if (g->ops.fifo.handle_ctxsw_timeout) | ||
2467 | g->ops.fifo.handle_ctxsw_timeout(g, fifo_intr); | ||
2468 | |||
2466 | if (unlikely(fifo_intr & error_intr_mask)) | 2469 | if (unlikely(fifo_intr & error_intr_mask)) |
2467 | clear_intr = fifo_error_isr(g, fifo_intr); | 2470 | clear_intr = fifo_error_isr(g, fifo_intr); |
2468 | 2471 | ||
@@ -4273,4 +4276,5 @@ void gk20a_init_fifo(struct gpu_ops *gops) | |||
4273 | gops->fifo.userd_gp_put = gk20a_fifo_userd_gp_put; | 4276 | gops->fifo.userd_gp_put = gk20a_fifo_userd_gp_put; |
4274 | gops->fifo.pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val; | 4277 | gops->fifo.pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val; |
4275 | gops->fifo.teardown_ch_tsg = gk20a_fifo_teardown_ch_tsg; | 4278 | gops->fifo.teardown_ch_tsg = gk20a_fifo_teardown_ch_tsg; |
4279 | gops->fifo.handle_sched_error = gk20a_fifo_handle_sched_error; | ||
4276 | } | 4280 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index d5456ea1..dc43c532 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -386,4 +386,9 @@ bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, | |||
386 | void gk20a_fifo_teardown_ch_tsg(struct gk20a *g, u32 __engine_ids, | 386 | void gk20a_fifo_teardown_ch_tsg(struct gk20a *g, u32 __engine_ids, |
387 | u32 hw_id, unsigned int id_type, unsigned int rc_type, | 387 | u32 hw_id, unsigned int id_type, unsigned int rc_type, |
388 | struct mmu_fault_info *mmfault); | 388 | struct mmu_fault_info *mmfault); |
389 | |||
390 | bool gk20a_fifo_check_tsg_ctxsw_timeout(struct tsg_gk20a *tsg, | ||
391 | bool *verbose, u32 *ms); | ||
392 | bool gk20a_fifo_handle_sched_error(struct gk20a *g); | ||
393 | |||
389 | #endif /*__GR_GK20A_H__*/ | 394 | #endif /*__GR_GK20A_H__*/ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index aeef263e..e4450185 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -472,6 +472,8 @@ struct gpu_ops { | |||
472 | void (*teardown_ch_tsg)(struct gk20a *g, u32 act_eng_bitmask, | 472 | void (*teardown_ch_tsg)(struct gk20a *g, u32 act_eng_bitmask, |
473 | u32 id, unsigned int id_type, unsigned int rc_type, | 473 | u32 id, unsigned int id_type, unsigned int rc_type, |
474 | struct mmu_fault_info *mmfault); | 474 | struct mmu_fault_info *mmfault); |
475 | bool (*handle_sched_error)(struct gk20a *g); | ||
476 | bool (*handle_ctxsw_timeout)(struct gk20a *g, u32 fifo_intr); | ||
475 | } fifo; | 477 | } fifo; |
476 | struct pmu_v { | 478 | struct pmu_v { |
477 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 479 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 22ff3629..2f705004 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -228,4 +228,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) | |||
228 | gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; | 228 | gops->fifo.init_pbdma_intr_descs = gm20b_fifo_init_pbdma_intr_descs; |
229 | gops->fifo.reset_enable_hw = gk20a_init_fifo_reset_enable_hw; | 229 | gops->fifo.reset_enable_hw = gk20a_init_fifo_reset_enable_hw; |
230 | gops->fifo.teardown_ch_tsg = gk20a_fifo_teardown_ch_tsg; | 230 | gops->fifo.teardown_ch_tsg = gk20a_fifo_teardown_ch_tsg; |
231 | gops->fifo.handle_sched_error = gk20a_fifo_handle_sched_error; | ||
231 | } | 232 | } |