diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 59a04d2c..2f33301d 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -2516,7 +2516,7 @@ void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state) | |||
2516 | 2516 | ||
2517 | int gv11b_gr_update_sm_error_state(struct gk20a *g, | 2517 | int gv11b_gr_update_sm_error_state(struct gk20a *g, |
2518 | struct channel_gk20a *ch, u32 sm_id, | 2518 | struct channel_gk20a *ch, u32 sm_id, |
2519 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state) | 2519 | struct nvgpu_gr_sm_error_state *sm_error_state) |
2520 | { | 2520 | { |
2521 | u32 gpc, tpc, sm, offset; | 2521 | u32 gpc, tpc, sm, offset; |
2522 | struct gr_gk20a *gr = &g->gr; | 2522 | struct gr_gk20a *gr = &g->gr; |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 71975e24..feebef44 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -45,6 +45,7 @@ struct zbc_entry; | |||
45 | struct zbc_query_params; | 45 | struct zbc_query_params; |
46 | struct channel_ctx_gk20a; | 46 | struct channel_ctx_gk20a; |
47 | struct nvgpu_warpstate; | 47 | struct nvgpu_warpstate; |
48 | struct nvgpu_gr_sm_error_state; | ||
48 | 49 | ||
49 | enum { | 50 | enum { |
50 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, | 51 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, |
@@ -158,7 +159,7 @@ int gv11b_gr_sm_trigger_suspend(struct gk20a *g); | |||
158 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state); | 159 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state); |
159 | int gv11b_gr_update_sm_error_state(struct gk20a *g, | 160 | int gv11b_gr_update_sm_error_state(struct gk20a *g, |
160 | struct channel_gk20a *ch, u32 sm_id, | 161 | struct channel_gk20a *ch, u32 sm_id, |
161 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state); | 162 | struct nvgpu_gr_sm_error_state *sm_error_state); |
162 | int gv11b_gr_set_sm_debug_mode(struct gk20a *g, | 163 | int gv11b_gr_set_sm_debug_mode(struct gk20a *g, |
163 | struct channel_gk20a *ch, u64 sms, bool enable); | 164 | struct channel_gk20a *ch, u64 sms, bool enable); |
164 | int gv11b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc); | 165 | int gv11b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc); |