diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 42 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 2 |
4 files changed, 40 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 4cc7781d..3bd5a994 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -831,9 +831,6 @@ static void gk20a_fifo_handle_mmu_fault_thread(struct work_struct *work) | |||
831 | struct gk20a *g = f->g; | 831 | struct gk20a *g = f->g; |
832 | int i; | 832 | int i; |
833 | 833 | ||
834 | /* Reinitialise FECS and GR */ | ||
835 | gk20a_init_pmu_setup_hw2(g); | ||
836 | |||
837 | /* It is safe to enable ELPG again. */ | 834 | /* It is safe to enable ELPG again. */ |
838 | gk20a_pmu_enable_elpg(g); | 835 | gk20a_pmu_enable_elpg(g); |
839 | 836 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 50ca0601..867b7abd 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -4771,15 +4771,47 @@ static void gk20a_gr_set_alpha_circular_buffer_size(struct gk20a *g, u32 data) | |||
4771 | } | 4771 | } |
4772 | } | 4772 | } |
4773 | 4773 | ||
4774 | void gk20a_gr_reset(struct gk20a *g) | 4774 | int gk20a_gr_reset(struct gk20a *g) |
4775 | { | 4775 | { |
4776 | int err; | 4776 | int err; |
4777 | u32 size; | ||
4778 | |||
4777 | err = gk20a_init_gr_prepare(g); | 4779 | err = gk20a_init_gr_prepare(g); |
4778 | BUG_ON(err); | 4780 | if (err) |
4781 | return err; | ||
4782 | |||
4779 | err = gk20a_init_gr_reset_enable_hw(g); | 4783 | err = gk20a_init_gr_reset_enable_hw(g); |
4780 | BUG_ON(err); | 4784 | if (err) |
4785 | return err; | ||
4786 | |||
4781 | err = gk20a_init_gr_setup_hw(g); | 4787 | err = gk20a_init_gr_setup_hw(g); |
4782 | BUG_ON(err); | 4788 | if (err) |
4789 | return err; | ||
4790 | |||
4791 | size = 0; | ||
4792 | err = gr_gk20a_fecs_get_reglist_img_size(g, &size); | ||
4793 | if (err) { | ||
4794 | gk20a_err(dev_from_gk20a(g), | ||
4795 | "fail to query fecs pg buffer size"); | ||
4796 | return err; | ||
4797 | } | ||
4798 | |||
4799 | err = gr_gk20a_fecs_set_reglist_bind_inst(g, | ||
4800 | g->mm.pmu.inst_block.cpu_pa); | ||
4801 | if (err) { | ||
4802 | gk20a_err(dev_from_gk20a(g), | ||
4803 | "fail to bind pmu inst to gr"); | ||
4804 | return err; | ||
4805 | } | ||
4806 | |||
4807 | err = gr_gk20a_fecs_set_reglist_virtual_addr(g, g->pmu.pg_buf.pmu_va); | ||
4808 | if (err) { | ||
4809 | gk20a_err(dev_from_gk20a(g), | ||
4810 | "fail to set pg buffer pmu va"); | ||
4811 | return err; | ||
4812 | } | ||
4813 | |||
4814 | return 0; | ||
4783 | } | 4815 | } |
4784 | 4816 | ||
4785 | static int gr_gk20a_handle_sw_method(struct gk20a *g, u32 addr, | 4817 | static int gr_gk20a_handle_sw_method(struct gk20a *g, u32 addr, |
@@ -5511,7 +5543,7 @@ int gr_gk20a_fecs_set_reglist_bind_inst(struct gk20a *g, phys_addr_t addr) | |||
5511 | .mailbox.fail = 0}); | 5543 | .mailbox.fail = 0}); |
5512 | } | 5544 | } |
5513 | 5545 | ||
5514 | int gr_gk20a_fecs_set_reglist_virual_addr(struct gk20a *g, u64 pmu_va) | 5546 | int gr_gk20a_fecs_set_reglist_virtual_addr(struct gk20a *g, u64 pmu_va) |
5515 | { | 5547 | { |
5516 | return gr_gk20a_submit_fecs_method_op(g, | 5548 | return gr_gk20a_submit_fecs_method_op(g, |
5517 | (struct fecs_method_op_gk20a) { | 5549 | (struct fecs_method_op_gk20a) { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index b25782ca..a9ec606f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -314,7 +314,7 @@ struct gk20a_ctxsw_bootloader_desc { | |||
314 | struct gpu_ops; | 314 | struct gpu_ops; |
315 | void gk20a_init_gr(struct gpu_ops *gops); | 315 | void gk20a_init_gr(struct gpu_ops *gops); |
316 | int gk20a_init_gr_support(struct gk20a *g); | 316 | int gk20a_init_gr_support(struct gk20a *g); |
317 | void gk20a_gr_reset(struct gk20a *g); | 317 | int gk20a_gr_reset(struct gk20a *g); |
318 | 318 | ||
319 | int gk20a_init_gr_channel(struct channel_gk20a *ch_gk20a); | 319 | int gk20a_init_gr_channel(struct channel_gk20a *ch_gk20a); |
320 | 320 | ||
@@ -351,7 +351,7 @@ int gr_gk20a_load_zbc_default_table(struct gk20a *g, struct gr_gk20a *gr); | |||
351 | /* pmu */ | 351 | /* pmu */ |
352 | int gr_gk20a_fecs_get_reglist_img_size(struct gk20a *g, u32 *size); | 352 | int gr_gk20a_fecs_get_reglist_img_size(struct gk20a *g, u32 *size); |
353 | int gr_gk20a_fecs_set_reglist_bind_inst(struct gk20a *g, phys_addr_t addr); | 353 | int gr_gk20a_fecs_set_reglist_bind_inst(struct gk20a *g, phys_addr_t addr); |
354 | int gr_gk20a_fecs_set_reglist_virual_addr(struct gk20a *g, u64 pmu_va); | 354 | int gr_gk20a_fecs_set_reglist_virtual_addr(struct gk20a *g, u64 pmu_va); |
355 | 355 | ||
356 | void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine); | 356 | void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine); |
357 | void gr_gk20a_init_blcg_mode(struct gk20a *g, u32 mode, u32 engine); | 357 | void gr_gk20a_init_blcg_mode(struct gk20a *g, u32 mode, u32 engine); |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 482abbc8..4af23e3d 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -1882,7 +1882,7 @@ int gk20a_init_pmu_setup_hw2(struct gk20a *g) | |||
1882 | return err; | 1882 | return err; |
1883 | } | 1883 | } |
1884 | 1884 | ||
1885 | err = gr_gk20a_fecs_set_reglist_virual_addr(g, pmu->pg_buf.pmu_va); | 1885 | err = gr_gk20a_fecs_set_reglist_virtual_addr(g, pmu->pg_buf.pmu_va); |
1886 | if (err) { | 1886 | if (err) { |
1887 | gk20a_err(dev_from_gk20a(g), | 1887 | gk20a_err(dev_from_gk20a(g), |
1888 | "fail to set pg buffer pmu va"); | 1888 | "fail to set pg buffer pmu va"); |