diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 26 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/ce2_vgpu.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 2 |
8 files changed, 44 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c index 3a0f20a9..a3b02481 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | |||
@@ -87,7 +87,7 @@ void gk20a_ce2_nonstall_isr(struct gk20a *g) | |||
87 | ce2_nonblockpipe_isr(g, ce2_intr)); | 87 | ce2_nonblockpipe_isr(g, ce2_intr)); |
88 | 88 | ||
89 | /* wake threads waiting in this channel */ | 89 | /* wake threads waiting in this channel */ |
90 | gk20a_channel_semaphore_wakeup(g); | 90 | gk20a_channel_semaphore_wakeup(g, true); |
91 | } | 91 | } |
92 | 92 | ||
93 | return; | 93 | return; |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 468ee7f1..da73d95d 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -2831,7 +2831,7 @@ int gk20a_channel_resume(struct gk20a *g) | |||
2831 | return 0; | 2831 | return 0; |
2832 | } | 2832 | } |
2833 | 2833 | ||
2834 | void gk20a_channel_semaphore_wakeup(struct gk20a *g) | 2834 | void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events) |
2835 | { | 2835 | { |
2836 | struct fifo_gk20a *f = &g->fifo; | 2836 | struct fifo_gk20a *f = &g->fifo; |
2837 | u32 chid; | 2837 | u32 chid; |
@@ -2842,6 +2842,18 @@ void gk20a_channel_semaphore_wakeup(struct gk20a *g) | |||
2842 | struct channel_gk20a *c = g->fifo.channel+chid; | 2842 | struct channel_gk20a *c = g->fifo.channel+chid; |
2843 | if (gk20a_channel_get(c)) { | 2843 | if (gk20a_channel_get(c)) { |
2844 | wake_up_interruptible_all(&c->semaphore_wq); | 2844 | wake_up_interruptible_all(&c->semaphore_wq); |
2845 | if (post_events) { | ||
2846 | if (gk20a_is_channel_marked_as_tsg(c)) { | ||
2847 | struct tsg_gk20a *tsg = | ||
2848 | &g->fifo.tsg[c->tsgid]; | ||
2849 | |||
2850 | gk20a_tsg_event_id_post_event(tsg, | ||
2851 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC); | ||
2852 | } else { | ||
2853 | gk20a_channel_event_id_post_event(c, | ||
2854 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BLOCKING_SYNC); | ||
2855 | } | ||
2856 | } | ||
2845 | gk20a_channel_update(c, 0); | 2857 | gk20a_channel_update(c, 0); |
2846 | gk20a_channel_put(c); | 2858 | gk20a_channel_put(c); |
2847 | } | 2859 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index ca11739e..29c39160 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -215,7 +215,7 @@ void gk20a_disable_channel(struct channel_gk20a *ch); | |||
215 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt); | 215 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt); |
216 | int gk20a_channel_finish(struct channel_gk20a *ch, unsigned long timeout); | 216 | int gk20a_channel_finish(struct channel_gk20a *ch, unsigned long timeout); |
217 | void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error); | 217 | void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error); |
218 | void gk20a_channel_semaphore_wakeup(struct gk20a *g); | 218 | void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events); |
219 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, | 219 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, |
220 | struct priv_cmd_entry **entry); | 220 | struct priv_cmd_entry **entry); |
221 | 221 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 029a713f..9421c017 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1737,7 +1737,7 @@ static u32 gk20a_fifo_handle_pbdma_intr(struct device *dev, | |||
1737 | 1737 | ||
1738 | static u32 fifo_channel_isr(struct gk20a *g, u32 fifo_intr) | 1738 | static u32 fifo_channel_isr(struct gk20a *g, u32 fifo_intr) |
1739 | { | 1739 | { |
1740 | gk20a_channel_semaphore_wakeup(g); | 1740 | gk20a_channel_semaphore_wakeup(g, false); |
1741 | return fifo_intr_0_channel_intr_pending_f(); | 1741 | return fifo_intr_0_channel_intr_pending_f(); |
1742 | } | 1742 | } |
1743 | 1743 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 56d1d505..116fd88f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5313,6 +5313,30 @@ int gr_gk20a_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
5313 | return -EFAULT; | 5313 | return -EFAULT; |
5314 | } | 5314 | } |
5315 | 5315 | ||
5316 | if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_int_pending_f()) { | ||
5317 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) { | ||
5318 | struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid]; | ||
5319 | |||
5320 | gk20a_tsg_event_id_post_event(tsg, | ||
5321 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT); | ||
5322 | } else { | ||
5323 | gk20a_channel_event_id_post_event(fault_ch, | ||
5324 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_INT); | ||
5325 | } | ||
5326 | } | ||
5327 | |||
5328 | if (global_esr & gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f()) { | ||
5329 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) { | ||
5330 | struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid]; | ||
5331 | |||
5332 | gk20a_tsg_event_id_post_event(tsg, | ||
5333 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE); | ||
5334 | } else { | ||
5335 | gk20a_channel_event_id_post_event(fault_ch, | ||
5336 | NVGPU_IOCTL_CHANNEL_EVENT_ID_BPT_PAUSE); | ||
5337 | } | ||
5338 | } | ||
5339 | |||
5316 | gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, | 5340 | gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, |
5317 | "sm hww global %08x warp %08x", global_esr, warp_esr); | 5341 | "sm hww global %08x warp %08x", global_esr, warp_esr); |
5318 | 5342 | ||
@@ -5705,7 +5729,7 @@ int gk20a_gr_nonstall_isr(struct gk20a *g) | |||
5705 | gk20a_writel(g, gr_intr_nonstall_r(), | 5729 | gk20a_writel(g, gr_intr_nonstall_r(), |
5706 | gr_intr_nonstall_trap_pending_f()); | 5730 | gr_intr_nonstall_trap_pending_f()); |
5707 | /* Wakeup all the waiting channels */ | 5731 | /* Wakeup all the waiting channels */ |
5708 | gk20a_channel_semaphore_wakeup(g); | 5732 | gk20a_channel_semaphore_wakeup(g, true); |
5709 | } | 5733 | } |
5710 | 5734 | ||
5711 | return 0; | 5735 | return 0; |
diff --git a/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c b/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c index 631461f9..5291e0f5 100644 --- a/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c | |||
@@ -22,7 +22,7 @@ int vgpu_ce2_nonstall_isr(struct gk20a *g, | |||
22 | 22 | ||
23 | switch (info->type) { | 23 | switch (info->type) { |
24 | case TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE: | 24 | case TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE: |
25 | gk20a_channel_semaphore_wakeup(g); | 25 | gk20a_channel_semaphore_wakeup(g, true); |
26 | break; | 26 | break; |
27 | default: | 27 | default: |
28 | WARN_ON(1); | 28 | WARN_ON(1); |
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index d81e965c..afe3c24b 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -653,7 +653,7 @@ int vgpu_fifo_nonstall_isr(struct gk20a *g, | |||
653 | 653 | ||
654 | switch (info->type) { | 654 | switch (info->type) { |
655 | case TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL: | 655 | case TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL: |
656 | gk20a_channel_semaphore_wakeup(g); | 656 | gk20a_channel_semaphore_wakeup(g, false); |
657 | break; | 657 | break; |
658 | default: | 658 | default: |
659 | WARN_ON(1); | 659 | WARN_ON(1); |
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index 3baa420f..32e451ed 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -919,7 +919,7 @@ int vgpu_gr_nonstall_isr(struct gk20a *g, | |||
919 | 919 | ||
920 | switch (info->type) { | 920 | switch (info->type) { |
921 | case TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE: | 921 | case TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE: |
922 | gk20a_channel_semaphore_wakeup(g); | 922 | gk20a_channel_semaphore_wakeup(g, true); |
923 | break; | 923 | break; |
924 | default: | 924 | default: |
925 | WARN_ON(1); | 925 | WARN_ON(1); |