diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/platform_gp10b_tegra.c | 94 |
2 files changed, 95 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/Makefile b/drivers/gpu/nvgpu/gp10b/Makefile index f34d836d..0542fd67 100644 --- a/drivers/gpu/nvgpu/gp10b/Makefile +++ b/drivers/gpu/nvgpu/gp10b/Makefile | |||
@@ -2,6 +2,7 @@ GCOV_PROFILE := y | |||
2 | 2 | ||
3 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/drivers/gpu/nvgpu | 3 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/drivers/gpu/nvgpu |
4 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/include | 4 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/include |
5 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/drivers/devfreq | ||
5 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/drivers/gpu/nvgpu | 6 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/drivers/gpu/nvgpu |
6 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include | 7 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include |
7 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include/uapi | 8 | ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include/uapi |
diff --git a/drivers/gpu/nvgpu/gp10b/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/gp10b/platform_gp10b_tegra.c index 3476543d..48665ddb 100644 --- a/drivers/gpu/nvgpu/gp10b/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/gp10b/platform_gp10b_tegra.c | |||
@@ -30,6 +30,9 @@ | |||
30 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
31 | #include "platform_tegra.h" | 31 | #include "platform_tegra.h" |
32 | 32 | ||
33 | #define GP10B_MAX_SUPPORTED_FREQS 11 | ||
34 | unsigned long gp10b_freq_table[GP10B_MAX_SUPPORTED_FREQS]; | ||
35 | |||
33 | static struct { | 36 | static struct { |
34 | char *name; | 37 | char *name; |
35 | unsigned long default_rate; | 38 | unsigned long default_rate; |
@@ -130,7 +133,19 @@ static int gp10b_tegra_probe(struct platform_device *pdev) | |||
130 | 133 | ||
131 | static int gp10b_tegra_late_probe(struct platform_device *pdev) | 134 | static int gp10b_tegra_late_probe(struct platform_device *pdev) |
132 | { | 135 | { |
136 | /* Make gk20a power domain a subdomain of host1x */ | ||
137 | nvhost_register_client_domain(dev_to_genpd(&pdev->dev)); | ||
138 | |||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | static int gp10b_tegra_remove(struct platform_device *pdev) | ||
143 | { | ||
144 | /* remove gk20a power subdomain from host1x */ | ||
145 | nvhost_unregister_client_domain(dev_to_genpd(&pdev->dev)); | ||
146 | |||
133 | return 0; | 147 | return 0; |
148 | |||
134 | } | 149 | } |
135 | 150 | ||
136 | static bool gp10b_tegra_is_railgated(struct platform_device *pdev) | 151 | static bool gp10b_tegra_is_railgated(struct platform_device *pdev) |
@@ -206,6 +221,72 @@ static int gp10b_tegra_reset_deassert(struct platform_device *dev) | |||
206 | return ret; | 221 | return ret; |
207 | } | 222 | } |
208 | 223 | ||
224 | static void gp10b_tegra_prescale(struct platform_device *pdev) | ||
225 | { | ||
226 | struct gk20a *g = get_gk20a(pdev); | ||
227 | u32 avg = 0; | ||
228 | |||
229 | gk20a_dbg_fn(""); | ||
230 | |||
231 | gk20a_pmu_load_norm(g, &avg); | ||
232 | /* TBD - Notify EDP about changed constrains */ | ||
233 | |||
234 | gk20a_dbg_fn("done"); | ||
235 | } | ||
236 | |||
237 | static void gp10b_tegra_postscale(struct platform_device *pdev, | ||
238 | unsigned long freq) | ||
239 | { | ||
240 | /* TBD - notify EMC about frequency change */ | ||
241 | gk20a_dbg_fn(""); | ||
242 | } | ||
243 | |||
244 | static unsigned long gp10b_get_clk_rate(struct platform_device *dev) | ||
245 | { | ||
246 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
247 | |||
248 | return clk_get_rate(platform->clk[0]); | ||
249 | |||
250 | } | ||
251 | |||
252 | static long gp10b_round_clk_rate(struct platform_device *dev, | ||
253 | unsigned long rate) | ||
254 | { | ||
255 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
256 | |||
257 | return clk_round_rate(platform->clk[0], rate); | ||
258 | } | ||
259 | |||
260 | static int gp10b_set_clk_rate(struct platform_device *dev, unsigned long rate) | ||
261 | { | ||
262 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
263 | |||
264 | return clk_set_rate(platform->clk[0], rate); | ||
265 | } | ||
266 | |||
267 | static int gp10b_clk_get_freqs(struct platform_device *pdev, | ||
268 | unsigned long **freqs, int *num_freqs) | ||
269 | { | ||
270 | struct gk20a_platform *platform = gk20a_get_platform(pdev); | ||
271 | unsigned long min_rate, max_rate, freq_step, rate; | ||
272 | int i; | ||
273 | |||
274 | min_rate = clk_round_rate(platform->clk[0], 0); | ||
275 | max_rate = clk_round_rate(platform->clk[0], (UINT_MAX - 1)); | ||
276 | freq_step = (max_rate - min_rate)/(GP10B_MAX_SUPPORTED_FREQS - 1); | ||
277 | gk20a_dbg_info("min rate: %ld max rate: %ld freq step %ld\n", | ||
278 | min_rate, max_rate, freq_step); | ||
279 | |||
280 | for (i = 0; i < GP10B_MAX_SUPPORTED_FREQS; i++) { | ||
281 | rate = min_rate + i * freq_step; | ||
282 | gp10b_freq_table[i] = clk_round_rate(platform->clk[0], rate); | ||
283 | } | ||
284 | /* Fill freq table */ | ||
285 | *freqs = gp10b_freq_table; | ||
286 | *num_freqs = GP10B_MAX_SUPPORTED_FREQS; | ||
287 | return 0; | ||
288 | } | ||
289 | |||
209 | struct gk20a_platform t18x_gpu_tegra_platform = { | 290 | struct gk20a_platform t18x_gpu_tegra_platform = { |
210 | .has_syncpoints = true, | 291 | .has_syncpoints = true, |
211 | 292 | ||
@@ -227,6 +308,7 @@ struct gk20a_platform t18x_gpu_tegra_platform = { | |||
227 | 308 | ||
228 | .probe = gp10b_tegra_probe, | 309 | .probe = gp10b_tegra_probe, |
229 | .late_probe = gp10b_tegra_late_probe, | 310 | .late_probe = gp10b_tegra_late_probe, |
311 | .remove = gp10b_tegra_remove, | ||
230 | 312 | ||
231 | /* power management callbacks */ | 313 | /* power management callbacks */ |
232 | .suspend = gp10b_tegra_suspend, | 314 | .suspend = gp10b_tegra_suspend, |
@@ -243,6 +325,18 @@ struct gk20a_platform t18x_gpu_tegra_platform = { | |||
243 | 325 | ||
244 | .has_cde = true, | 326 | .has_cde = true, |
245 | 327 | ||
328 | .clk_get_rate = gp10b_get_clk_rate, | ||
329 | .clk_round_rate = gp10b_round_clk_rate, | ||
330 | .clk_set_rate = gp10b_set_clk_rate, | ||
331 | .get_clk_freqs = gp10b_clk_get_freqs, | ||
332 | |||
333 | /* frequency scaling configuration */ | ||
334 | .prescale = gp10b_tegra_prescale, | ||
335 | .postscale = gp10b_tegra_postscale, | ||
336 | |||
337 | .devfreq_governor = "nvhost_podgov", | ||
338 | .qos_id = PM_QOS_GPU_FREQ_MIN, | ||
339 | |||
246 | .secure_alloc = gk20a_tegra_secure_alloc, | 340 | .secure_alloc = gk20a_tegra_secure_alloc, |
247 | .secure_page_alloc = gk20a_tegra_secure_page_alloc, | 341 | .secure_page_alloc = gk20a_tegra_secure_page_alloc, |
248 | 342 | ||