diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 29 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.h | 2 |
6 files changed, 40 insertions, 30 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h index 2b384993..4b3f3ae6 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Graphics Context | 2 | * GK20A Graphics Context |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -18,6 +18,8 @@ | |||
18 | #ifndef __GR_CTX_GK20A_H__ | 18 | #ifndef __GR_CTX_GK20A_H__ |
19 | #define __GR_CTX_GK20A_H__ | 19 | #define __GR_CTX_GK20A_H__ |
20 | 20 | ||
21 | struct gr_gk20a; | ||
22 | |||
21 | /* production netlist, one and only one from below */ | 23 | /* production netlist, one and only one from below */ |
22 | /*#undef GK20A_NETLIST_IMAGE_FW_NAME*/ | 24 | /*#undef GK20A_NETLIST_IMAGE_FW_NAME*/ |
23 | #define GK20A_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_B | 25 | #define GK20A_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_B |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index e5d7e83b..f43e57fd 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -19,6 +19,7 @@ | |||
19 | #define GR_GK20A_H | 19 | #define GR_GK20A_H |
20 | 20 | ||
21 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
22 | #include <uapi/linux/nvgpu.h> | ||
22 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | 23 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC |
23 | #include "gr_t18x.h" | 24 | #include "gr_t18x.h" |
24 | #endif | 25 | #endif |
@@ -29,6 +30,7 @@ | |||
29 | 30 | ||
30 | #include "tsg_gk20a.h" | 31 | #include "tsg_gk20a.h" |
31 | #include "gr_ctx_gk20a.h" | 32 | #include "gr_ctx_gk20a.h" |
33 | #include "mm_gk20a.h" | ||
32 | 34 | ||
33 | #define GR_IDLE_CHECK_DEFAULT 10 /* usec */ | 35 | #define GR_IDLE_CHECK_DEFAULT 10 /* usec */ |
34 | #define GR_IDLE_CHECK_MAX 200 /* usec */ | 36 | #define GR_IDLE_CHECK_MAX 200 /* usec */ |
@@ -42,6 +44,8 @@ | |||
42 | 44 | ||
43 | #define GK20A_GR_MAX_PES_PER_GPC 3 | 45 | #define GK20A_GR_MAX_PES_PER_GPC 3 |
44 | 46 | ||
47 | struct channel_gk20a; | ||
48 | |||
45 | enum /* global_ctx_buffer */ { | 49 | enum /* global_ctx_buffer */ { |
46 | CIRCULAR = 0, | 50 | CIRCULAR = 0, |
47 | PAGEPOOL = 1, | 51 | PAGEPOOL = 1, |
@@ -201,6 +205,12 @@ struct gr_gk20a_isr_data { | |||
201 | u32 class_num; | 205 | u32 class_num; |
202 | }; | 206 | }; |
203 | 207 | ||
208 | struct gr_ctx_buffer_desc { | ||
209 | void (*destroy)(struct gk20a *, struct gr_ctx_buffer_desc *); | ||
210 | struct mem_desc mem; | ||
211 | void *priv; | ||
212 | }; | ||
213 | |||
204 | struct nvgpu_preemption_modes_rec { | 214 | struct nvgpu_preemption_modes_rec { |
205 | u32 graphics_preemption_mode_flags; /* supported preemption modes */ | 215 | u32 graphics_preemption_mode_flags; /* supported preemption modes */ |
206 | u32 compute_preemption_mode_flags; /* supported preemption modes */ | 216 | u32 compute_preemption_mode_flags; /* supported preemption modes */ |
@@ -376,6 +386,23 @@ struct gr_gk20a { | |||
376 | 386 | ||
377 | void gk20a_fecs_dump_falcon_stats(struct gk20a *g); | 387 | void gk20a_fecs_dump_falcon_stats(struct gk20a *g); |
378 | 388 | ||
389 | struct gr_ctx_desc { | ||
390 | struct mem_desc mem; | ||
391 | |||
392 | u32 graphics_preempt_mode; | ||
393 | u32 compute_preempt_mode; | ||
394 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
395 | struct gr_ctx_desc_t18x t18x; | ||
396 | #endif | ||
397 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
398 | u64 virt_ctx; | ||
399 | #endif | ||
400 | }; | ||
401 | |||
402 | struct ctx_header_desc { | ||
403 | struct mem_desc mem; | ||
404 | }; | ||
405 | |||
379 | struct gk20a_ctxsw_ucode_segment { | 406 | struct gk20a_ctxsw_ucode_segment { |
380 | u32 offset; | 407 | u32 offset; |
381 | u32 size; | 408 | u32 size; |
@@ -665,6 +692,8 @@ u32 gk20a_mask_hww_warp_esr(u32 hww_warp_esr); | |||
665 | int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms, | 692 | int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms, |
666 | u32 expect_delay); | 693 | u32 expect_delay); |
667 | 694 | ||
695 | struct dbg_session_gk20a; | ||
696 | |||
668 | bool gr_gk20a_suspend_context(struct channel_gk20a *ch); | 697 | bool gr_gk20a_suspend_context(struct channel_gk20a *ch); |
669 | bool gr_gk20a_resume_context(struct channel_gk20a *ch); | 698 | bool gr_gk20a_resume_context(struct channel_gk20a *ch); |
670 | int gr_gk20a_suspend_contexts(struct gk20a *g, | 699 | int gr_gk20a_suspend_contexts(struct gk20a *g, |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 2b741451..5ef8ae25 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A memory management | 2 | * GK20A memory management |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -112,32 +112,6 @@ struct pm_ctx_desc { | |||
112 | }; | 112 | }; |
113 | 113 | ||
114 | struct gk20a; | 114 | struct gk20a; |
115 | struct gr_ctx_buffer_desc { | ||
116 | void (*destroy)(struct gk20a *, struct gr_ctx_buffer_desc *); | ||
117 | struct mem_desc mem; | ||
118 | void *priv; | ||
119 | }; | ||
120 | |||
121 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
122 | #include "gr_t18x.h" | ||
123 | #endif | ||
124 | |||
125 | struct gr_ctx_desc { | ||
126 | struct mem_desc mem; | ||
127 | |||
128 | u32 graphics_preempt_mode; | ||
129 | u32 compute_preempt_mode; | ||
130 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | ||
131 | struct gr_ctx_desc_t18x t18x; | ||
132 | #endif | ||
133 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
134 | u64 virt_ctx; | ||
135 | #endif | ||
136 | }; | ||
137 | |||
138 | struct ctx_header_desc { | ||
139 | struct mem_desc mem; | ||
140 | }; | ||
141 | 115 | ||
142 | struct compbit_store_desc { | 116 | struct compbit_store_desc { |
143 | struct mem_desc mem; | 117 | struct mem_desc mem; |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 0a2d36fe..bd9d4f2b 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -26,7 +26,6 @@ | |||
26 | 26 | ||
27 | #include <nvgpu/timers.h> | 27 | #include <nvgpu/timers.h> |
28 | 28 | ||
29 | #include "gk20a.h" | ||
30 | #include "gr_gk20a.h" | 29 | #include "gr_gk20a.h" |
31 | #include "semaphore_gk20a.h" | 30 | #include "semaphore_gk20a.h" |
32 | #include "nvgpu_common.h" | 31 | #include "nvgpu_common.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index 8509398c..a6642682 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -18,6 +18,10 @@ | |||
18 | 18 | ||
19 | #define NVGPU_INVALID_TSG_ID (-1) | 19 | #define NVGPU_INVALID_TSG_ID (-1) |
20 | 20 | ||
21 | struct channel_gk20a; | ||
22 | struct gpu_ops; | ||
23 | struct file; | ||
24 | |||
21 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch); | 25 | bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch); |
22 | 26 | ||
23 | 27 | ||
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h index 0a70903f..ffb15d91 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.h | |||
@@ -18,6 +18,8 @@ | |||
18 | 18 | ||
19 | #include <linux/version.h> | 19 | #include <linux/version.h> |
20 | 20 | ||
21 | #include "gk20a/mm_gk20a.h" | ||
22 | |||
21 | struct gpu_ops; | 23 | struct gpu_ops; |
22 | 24 | ||
23 | enum { | 25 | enum { |