diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 18 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 18 |
2 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index e4024f66..1e33a970 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -6022,7 +6022,7 @@ static void init_ovr_perf_reg_info(void) | |||
6022 | _ovr_perf_regs[16] = gr_pri_gpc0_tpc0_sm_dsm_perf_counter7_r(); | 6022 | _ovr_perf_regs[16] = gr_pri_gpc0_tpc0_sm_dsm_perf_counter7_r(); |
6023 | } | 6023 | } |
6024 | 6024 | ||
6025 | void gr_gk20a_init_sm_dsm_reg_info(void) | 6025 | static void gr_gk20a_init_sm_dsm_reg_info(void) |
6026 | { | 6026 | { |
6027 | if (_sm_dsm_perf_regs[0] != 0) | 6027 | if (_sm_dsm_perf_regs[0] != 0) |
6028 | return; | 6028 | return; |
@@ -6168,20 +6168,20 @@ static inline int ctxsw_prog_ucode_header_size_in_bytes(void) | |||
6168 | return 256; | 6168 | return 256; |
6169 | } | 6169 | } |
6170 | 6170 | ||
6171 | void gr_gk20a_get_sm_dsm_perf_regs(struct gk20a *g, | 6171 | static void gr_gk20a_get_sm_dsm_perf_regs(struct gk20a *g, |
6172 | u32 *num_sm_dsm_perf_regs, | 6172 | u32 *num_sm_dsm_perf_regs, |
6173 | u32 **sm_dsm_perf_regs, | 6173 | u32 **sm_dsm_perf_regs, |
6174 | u32 *perf_register_stride) | 6174 | u32 *perf_register_stride) |
6175 | { | 6175 | { |
6176 | *num_sm_dsm_perf_regs = _num_sm_dsm_perf_regs; | 6176 | *num_sm_dsm_perf_regs = _num_sm_dsm_perf_regs; |
6177 | *sm_dsm_perf_regs = _sm_dsm_perf_regs; | 6177 | *sm_dsm_perf_regs = _sm_dsm_perf_regs; |
6178 | *perf_register_stride = ctxsw_prog_extended_sm_dsm_perf_counter_register_stride_v(); | 6178 | *perf_register_stride = ctxsw_prog_extended_sm_dsm_perf_counter_register_stride_v(); |
6179 | } | 6179 | } |
6180 | 6180 | ||
6181 | void gr_gk20a_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, | 6181 | static void gr_gk20a_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, |
6182 | u32 *num_sm_dsm_perf_ctrl_regs, | 6182 | u32 *num_sm_dsm_perf_ctrl_regs, |
6183 | u32 **sm_dsm_perf_ctrl_regs, | 6183 | u32 **sm_dsm_perf_ctrl_regs, |
6184 | u32 *ctrl_register_stride) | 6184 | u32 *ctrl_register_stride) |
6185 | { | 6185 | { |
6186 | *num_sm_dsm_perf_ctrl_regs = _num_sm_dsm_perf_ctrl_regs; | 6186 | *num_sm_dsm_perf_ctrl_regs = _num_sm_dsm_perf_ctrl_regs; |
6187 | *sm_dsm_perf_ctrl_regs = _sm_dsm_perf_ctrl_regs; | 6187 | *sm_dsm_perf_ctrl_regs = _sm_dsm_perf_ctrl_regs; |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 1384f1f7..c7479078 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -462,7 +462,7 @@ static const u32 _num_sm_dsm_perf_ctrl_regs = 2; | |||
462 | static u32 *_sm_dsm_perf_regs; | 462 | static u32 *_sm_dsm_perf_regs; |
463 | static u32 _sm_dsm_perf_ctrl_regs[2]; | 463 | static u32 _sm_dsm_perf_ctrl_regs[2]; |
464 | 464 | ||
465 | void gr_gm20b_init_sm_dsm_reg_info(void) | 465 | static void gr_gm20b_init_sm_dsm_reg_info(void) |
466 | { | 466 | { |
467 | if (_sm_dsm_perf_ctrl_regs[0] != 0) | 467 | if (_sm_dsm_perf_ctrl_regs[0] != 0) |
468 | return; | 468 | return; |
@@ -473,20 +473,20 @@ void gr_gm20b_init_sm_dsm_reg_info(void) | |||
473 | gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control5_r(); | 473 | gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control5_r(); |
474 | } | 474 | } |
475 | 475 | ||
476 | void gr_gm20b_get_sm_dsm_perf_regs(struct gk20a *g, | 476 | static void gr_gm20b_get_sm_dsm_perf_regs(struct gk20a *g, |
477 | u32 *num_sm_dsm_perf_regs, | 477 | u32 *num_sm_dsm_perf_regs, |
478 | u32 **sm_dsm_perf_regs, | 478 | u32 **sm_dsm_perf_regs, |
479 | u32 *perf_register_stride) | 479 | u32 *perf_register_stride) |
480 | { | 480 | { |
481 | *num_sm_dsm_perf_regs = _num_sm_dsm_perf_regs; | 481 | *num_sm_dsm_perf_regs = _num_sm_dsm_perf_regs; |
482 | *sm_dsm_perf_regs = _sm_dsm_perf_regs; | 482 | *sm_dsm_perf_regs = _sm_dsm_perf_regs; |
483 | *perf_register_stride = 0; | 483 | *perf_register_stride = 0; |
484 | } | 484 | } |
485 | 485 | ||
486 | void gr_gm20b_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, | 486 | static void gr_gm20b_get_sm_dsm_perf_ctrl_regs(struct gk20a *g, |
487 | u32 *num_sm_dsm_perf_ctrl_regs, | 487 | u32 *num_sm_dsm_perf_ctrl_regs, |
488 | u32 **sm_dsm_perf_ctrl_regs, | 488 | u32 **sm_dsm_perf_ctrl_regs, |
489 | u32 *ctrl_register_stride) | 489 | u32 *ctrl_register_stride) |
490 | { | 490 | { |
491 | *num_sm_dsm_perf_ctrl_regs = _num_sm_dsm_perf_ctrl_regs; | 491 | *num_sm_dsm_perf_ctrl_regs = _num_sm_dsm_perf_ctrl_regs; |
492 | *sm_dsm_perf_ctrl_regs = _sm_dsm_perf_ctrl_regs; | 492 | *sm_dsm_perf_ctrl_regs = _sm_dsm_perf_ctrl_regs; |