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-rw-r--r--drivers/gpu/nvgpu/gm20b/ltc_gm20b.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index 7a2bb5fd..b9c3b32d 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -103,7 +103,7 @@ static int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op,
103{ 103{
104 int err = 0; 104 int err = 0;
105 struct gr_gk20a *gr = &g->gr; 105 struct gr_gk20a *gr = &g->gr;
106 u32 fbp, slice, ctrl1, val, hw_op = 0; 106 u32 ltc, slice, ctrl1, val, hw_op = 0;
107 unsigned long end_jiffies = jiffies + 107 unsigned long end_jiffies = jiffies +
108 msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); 108 msecs_to_jiffies(gk20a_get_gr_idle_timeout(g));
109 u32 delay = GR_IDLE_CHECK_DEFAULT; 109 u32 delay = GR_IDLE_CHECK_DEFAULT;
@@ -133,13 +133,13 @@ static int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op,
133 gk20a_writel(g, ltc_ltcs_ltss_cbc_ctrl1_r(), 133 gk20a_writel(g, ltc_ltcs_ltss_cbc_ctrl1_r(),
134 gk20a_readl(g, ltc_ltcs_ltss_cbc_ctrl1_r()) || hw_op); 134 gk20a_readl(g, ltc_ltcs_ltss_cbc_ctrl1_r()) || hw_op);
135 135
136 for (fbp = 0; fbp < gr->num_fbps; fbp++) { 136 for (ltc = 0; ltc < g->ltc_count; ltc++) {
137 for (slice = 0; slice < slices_per_ltc; slice++) { 137 for (slice = 0; slice < slices_per_ltc; slice++) {
138 138
139 delay = GR_IDLE_CHECK_DEFAULT; 139 delay = GR_IDLE_CHECK_DEFAULT;
140 140
141 ctrl1 = ltc_ltc0_lts0_cbc_ctrl1_r() + 141 ctrl1 = ltc_ltc0_lts0_cbc_ctrl1_r() +
142 fbp * proj_ltc_stride_v() + 142 ltc * proj_ltc_stride_v() +
143 slice * proj_lts_stride_v(); 143 slice * proj_lts_stride_v();
144 144
145 do { 145 do {