diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.c | 41 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 58 |
3 files changed, 0 insertions, 108 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c index 40eb06b6..abb9e98a 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c | |||
@@ -42,19 +42,6 @@ struct pll_parms gpc_pll_params = { | |||
42 | 1, 32, /* PL */ | 42 | 1, 32, /* PL */ |
43 | }; | 43 | }; |
44 | 44 | ||
45 | static int num_gpu_cooling_freq; | ||
46 | static struct gpufreq_table_data *gpu_cooling_freq; | ||
47 | |||
48 | struct gpufreq_table_data *tegra_gpufreq_table_get(void) | ||
49 | { | ||
50 | return gpu_cooling_freq; | ||
51 | } | ||
52 | |||
53 | unsigned int tegra_gpufreq_table_size_get(void) | ||
54 | { | ||
55 | return num_gpu_cooling_freq; | ||
56 | } | ||
57 | |||
58 | static u8 pl_to_div[] = { | 45 | static u8 pl_to_div[] = { |
59 | /* PL: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 */ | 46 | /* PL: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 */ |
60 | /* p: */ 1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 12, 16, 20, 24, 32 }; | 47 | /* p: */ 1, 2, 3, 4, 5, 6, 8, 10, 12, 16, 12, 16, 20, 24, 32 }; |
@@ -441,8 +428,6 @@ static int gk20a_init_clk_setup_sw(struct gk20a *g) | |||
441 | { | 428 | { |
442 | struct clk_gk20a *clk = &g->clk; | 429 | struct clk_gk20a *clk = &g->clk; |
443 | static int initialized; | 430 | static int initialized; |
444 | unsigned long *freqs; | ||
445 | int err, num_freqs; | ||
446 | struct clk *ref; | 431 | struct clk *ref; |
447 | unsigned long ref_rate; | 432 | unsigned long ref_rate; |
448 | 433 | ||
@@ -480,32 +465,6 @@ static int gk20a_init_clk_setup_sw(struct gk20a *g) | |||
480 | clk->gpc_pll.freq /= pl_to_div[clk->gpc_pll.PL]; | 465 | clk->gpc_pll.freq /= pl_to_div[clk->gpc_pll.PL]; |
481 | } | 466 | } |
482 | 467 | ||
483 | err = tegra_dvfs_get_freqs(clk_get_parent(clk->tegra_clk), | ||
484 | &freqs, &num_freqs); | ||
485 | if (!err) { | ||
486 | int i, j; | ||
487 | |||
488 | /* init j for inverse traversal of frequencies */ | ||
489 | j = num_freqs - 1; | ||
490 | |||
491 | gpu_cooling_freq = kzalloc( | ||
492 | (1 + num_freqs) * sizeof(*gpu_cooling_freq), | ||
493 | GFP_KERNEL); | ||
494 | |||
495 | /* store frequencies in inverse order */ | ||
496 | for (i = 0; i < num_freqs; ++i, --j) { | ||
497 | gpu_cooling_freq[i].index = i; | ||
498 | gpu_cooling_freq[i].frequency = freqs[j]; | ||
499 | } | ||
500 | |||
501 | /* add 'end of table' marker */ | ||
502 | gpu_cooling_freq[i].index = i; | ||
503 | gpu_cooling_freq[i].frequency = GPUFREQ_TABLE_END; | ||
504 | |||
505 | /* store number of frequencies */ | ||
506 | num_gpu_cooling_freq = num_freqs + 1; | ||
507 | } | ||
508 | |||
509 | mutex_init(&clk->clk_mutex); | 468 | mutex_init(&clk->clk_mutex); |
510 | 469 | ||
511 | clk->sw_ready = true; | 470 | clk->sw_ready = true; |
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index 533e6d1e..f6cdd272 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h | |||
@@ -58,15 +58,6 @@ struct clk_gk20a { | |||
58 | bool clk_hw_on; | 58 | bool clk_hw_on; |
59 | }; | 59 | }; |
60 | 60 | ||
61 | struct gpufreq_table_data { | ||
62 | unsigned int index; | ||
63 | unsigned int frequency; /* Hz */ | ||
64 | }; | ||
65 | |||
66 | struct gpufreq_table_data *tegra_gpufreq_table_get(void); | ||
67 | |||
68 | unsigned int tegra_gpufreq_table_size_get(void); | ||
69 | |||
70 | int gk20a_init_clk_support(struct gk20a *g); | 61 | int gk20a_init_clk_support(struct gk20a *g); |
71 | 62 | ||
72 | unsigned long gk20a_clk_get_rate(struct gk20a *g); | 63 | unsigned long gk20a_clk_get_rate(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index e70cc0de..0eaf31fa 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -651,9 +651,6 @@ static void gk20a_remove_support(struct platform_device *dev) | |||
651 | if (g->pmu.remove_support) | 651 | if (g->pmu.remove_support) |
652 | g->pmu.remove_support(&g->pmu); | 652 | g->pmu.remove_support(&g->pmu); |
653 | 653 | ||
654 | if (g->gk20a_cdev.gk20a_cooling_dev) | ||
655 | thermal_cooling_device_unregister(g->gk20a_cdev.gk20a_cooling_dev); | ||
656 | |||
657 | if (g->gr.remove_support) | 654 | if (g->gr.remove_support) |
658 | g->gr.remove_support(&g->gr); | 655 | g->gr.remove_support(&g->gr); |
659 | 656 | ||
@@ -1009,53 +1006,6 @@ static struct of_device_id tegra_gk20a_of_match[] = { | |||
1009 | { }, | 1006 | { }, |
1010 | }; | 1007 | }; |
1011 | 1008 | ||
1012 | int tegra_gpu_get_max_state(struct thermal_cooling_device *cdev, | ||
1013 | unsigned long *max_state) | ||
1014 | { | ||
1015 | struct cooling_device_gk20a *gk20a_gpufreq_device = cdev->devdata; | ||
1016 | |||
1017 | *max_state = gk20a_gpufreq_device->gk20a_freq_table_size - 1; | ||
1018 | return 0; | ||
1019 | } | ||
1020 | |||
1021 | int tegra_gpu_get_cur_state(struct thermal_cooling_device *cdev, | ||
1022 | unsigned long *cur_state) | ||
1023 | { | ||
1024 | struct cooling_device_gk20a *gk20a_gpufreq_device = cdev->devdata; | ||
1025 | |||
1026 | *cur_state = gk20a_gpufreq_device->gk20a_freq_state; | ||
1027 | return 0; | ||
1028 | } | ||
1029 | |||
1030 | int tegra_gpu_set_cur_state(struct thermal_cooling_device *c_dev, | ||
1031 | unsigned long cur_state) | ||
1032 | { | ||
1033 | u32 target_freq; | ||
1034 | struct gk20a *g; | ||
1035 | struct gpufreq_table_data *gpu_cooling_table; | ||
1036 | struct cooling_device_gk20a *gk20a_gpufreq_device = c_dev->devdata; | ||
1037 | |||
1038 | BUG_ON(cur_state >= gk20a_gpufreq_device->gk20a_freq_table_size); | ||
1039 | |||
1040 | g = container_of(gk20a_gpufreq_device, struct gk20a, gk20a_cdev); | ||
1041 | |||
1042 | gpu_cooling_table = tegra_gpufreq_table_get(); | ||
1043 | target_freq = gpu_cooling_table[cur_state].frequency; | ||
1044 | |||
1045 | /* ensure a query for state will get the proper value */ | ||
1046 | gk20a_gpufreq_device->gk20a_freq_state = cur_state; | ||
1047 | |||
1048 | gk20a_clk_set_rate(g, target_freq); | ||
1049 | |||
1050 | return 0; | ||
1051 | } | ||
1052 | |||
1053 | static struct thermal_cooling_device_ops tegra_gpu_cooling_ops = { | ||
1054 | .get_max_state = tegra_gpu_get_max_state, | ||
1055 | .get_cur_state = tegra_gpu_get_cur_state, | ||
1056 | .set_cur_state = tegra_gpu_set_cur_state, | ||
1057 | }; | ||
1058 | |||
1059 | static int gk20a_create_device( | 1009 | static int gk20a_create_device( |
1060 | struct platform_device *pdev, int devno, const char *cdev_name, | 1010 | struct platform_device *pdev, int devno, const char *cdev_name, |
1061 | struct cdev *cdev, struct device **out, | 1011 | struct cdev *cdev, struct device **out, |
@@ -1421,7 +1371,6 @@ static int gk20a_probe(struct platform_device *dev) | |||
1421 | struct gk20a *gk20a; | 1371 | struct gk20a *gk20a; |
1422 | int err; | 1372 | int err; |
1423 | struct gk20a_platform *platform = NULL; | 1373 | struct gk20a_platform *platform = NULL; |
1424 | struct cooling_device_gk20a *gpu_cdev = NULL; | ||
1425 | 1374 | ||
1426 | if (dev->dev.of_node) { | 1375 | if (dev->dev.of_node) { |
1427 | const struct of_device_id *match; | 1376 | const struct of_device_id *match; |
@@ -1525,13 +1474,6 @@ static int gk20a_probe(struct platform_device *dev) | |||
1525 | dev->dev.dma_parms = &gk20a->dma_parms; | 1474 | dev->dev.dma_parms = &gk20a->dma_parms; |
1526 | dma_set_max_seg_size(&dev->dev, UINT_MAX); | 1475 | dma_set_max_seg_size(&dev->dev, UINT_MAX); |
1527 | 1476 | ||
1528 | gpu_cdev = &gk20a->gk20a_cdev; | ||
1529 | gpu_cdev->gk20a_freq_table_size = tegra_gpufreq_table_size_get(); | ||
1530 | gpu_cdev->gk20a_freq_state = 0; | ||
1531 | gpu_cdev->g = gk20a; | ||
1532 | gpu_cdev->gk20a_cooling_dev = thermal_cooling_device_register("gk20a_cdev", gpu_cdev, | ||
1533 | &tegra_gpu_cooling_ops); | ||
1534 | |||
1535 | gk20a->gr_idle_timeout_default = | 1477 | gk20a->gr_idle_timeout_default = |
1536 | CONFIG_GK20A_DEFAULT_TIMEOUT; | 1478 | CONFIG_GK20A_DEFAULT_TIMEOUT; |
1537 | if (tegra_platform_is_silicon()) | 1479 | if (tegra_platform_is_silicon()) |