diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/channel.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/tsg.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/types.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/os/linux/ioctl_dbg.c | 2 |
6 files changed, 13 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 2dd18370..e5ccfcb4 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -3528,7 +3528,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, | |||
3528 | return 0; | 3528 | return 0; |
3529 | } | 3529 | } |
3530 | if (tsg && ++tsg->num_active_channels) { | 3530 | if (tsg && ++tsg->num_active_channels) { |
3531 | set_bit(f->channel[chid].tsgid, | 3531 | set_bit((int)f->channel[chid].tsgid, |
3532 | runlist->active_tsgs); | 3532 | runlist->active_tsgs); |
3533 | } | 3533 | } |
3534 | } else { | 3534 | } else { |
@@ -3537,7 +3537,7 @@ int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, | |||
3537 | return 0; | 3537 | return 0; |
3538 | } | 3538 | } |
3539 | if (tsg && --tsg->num_active_channels == 0) { | 3539 | if (tsg && --tsg->num_active_channels == 0) { |
3540 | clear_bit(f->channel[chid].tsgid, | 3540 | clear_bit((int)f->channel[chid].tsgid, |
3541 | runlist->active_tsgs); | 3541 | runlist->active_tsgs); |
3542 | } | 3542 | } |
3543 | } | 3543 | } |
@@ -3642,7 +3642,7 @@ static int __locked_fifo_reschedule_preempt_next(struct channel_gk20a *ch, | |||
3642 | int ret = 0; | 3642 | int ret = 0; |
3643 | u32 gr_eng_id = 0; | 3643 | u32 gr_eng_id = 0; |
3644 | u32 engstat = 0, ctxstat = 0, fecsstat0 = 0, fecsstat1 = 0; | 3644 | u32 engstat = 0, ctxstat = 0, fecsstat0 = 0, fecsstat1 = 0; |
3645 | s32 preempt_id = -1; | 3645 | u32 preempt_id; |
3646 | u32 preempt_type = 0; | 3646 | u32 preempt_type = 0; |
3647 | 3647 | ||
3648 | if (1 != gk20a_fifo_get_engine_ids( | 3648 | if (1 != gk20a_fifo_get_engine_ids( |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 4541134f..20c13097 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5559,12 +5559,12 @@ int gk20a_gr_handle_notify_pending(struct gk20a *g, | |||
5559 | * | 5559 | * |
5560 | * Returned channel must be freed with gk20a_channel_put() */ | 5560 | * Returned channel must be freed with gk20a_channel_put() */ |
5561 | static struct channel_gk20a *gk20a_gr_get_channel_from_ctx( | 5561 | static struct channel_gk20a *gk20a_gr_get_channel_from_ctx( |
5562 | struct gk20a *g, u32 curr_ctx, int *curr_tsgid) | 5562 | struct gk20a *g, u32 curr_ctx, u32 *curr_tsgid) |
5563 | { | 5563 | { |
5564 | struct fifo_gk20a *f = &g->fifo; | 5564 | struct fifo_gk20a *f = &g->fifo; |
5565 | struct gr_gk20a *gr = &g->gr; | 5565 | struct gr_gk20a *gr = &g->gr; |
5566 | u32 chid = -1; | 5566 | u32 chid = -1; |
5567 | int tsgid = NVGPU_INVALID_TSG_ID; | 5567 | u32 tsgid = NVGPU_INVALID_TSG_ID; |
5568 | u32 i; | 5568 | u32 i; |
5569 | struct channel_gk20a *ret = NULL; | 5569 | struct channel_gk20a *ret = NULL; |
5570 | 5570 | ||
@@ -5960,7 +5960,7 @@ int gk20a_gr_isr(struct gk20a *g) | |||
5960 | u32 gr_intr = gk20a_readl(g, gr_intr_r()); | 5960 | u32 gr_intr = gk20a_readl(g, gr_intr_r()); |
5961 | struct channel_gk20a *ch = NULL; | 5961 | struct channel_gk20a *ch = NULL; |
5962 | struct channel_gk20a *fault_ch = NULL; | 5962 | struct channel_gk20a *fault_ch = NULL; |
5963 | int tsgid = NVGPU_INVALID_TSG_ID; | 5963 | u32 tsgid = NVGPU_INVALID_TSG_ID; |
5964 | struct tsg_gk20a *tsg = NULL; | 5964 | struct tsg_gk20a *tsg = NULL; |
5965 | u32 gr_engine_id; | 5965 | u32 gr_engine_id; |
5966 | u32 global_esr = 0; | 5966 | u32 global_esr = 0; |
@@ -8044,7 +8044,8 @@ static int gr_gk20a_find_priv_offset_in_pm_buffer(struct gk20a *g, | |||
8044 | 8044 | ||
8045 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch) | 8045 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch) |
8046 | { | 8046 | { |
8047 | int curr_gr_ctx, curr_gr_tsgid; | 8047 | int curr_gr_ctx; |
8048 | u32 curr_gr_tsgid; | ||
8048 | struct gk20a *g = ch->g; | 8049 | struct gk20a *g = ch->g; |
8049 | struct channel_gk20a *curr_ch; | 8050 | struct channel_gk20a *curr_ch; |
8050 | bool ret = false; | 8051 | bool ret = false; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel.h b/drivers/gpu/nvgpu/include/nvgpu/channel.h index cd4fadf8..8d2d9b44 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/channel.h +++ b/drivers/gpu/nvgpu/include/nvgpu/channel.h | |||
@@ -243,7 +243,7 @@ struct channel_gk20a { | |||
243 | nvgpu_atomic_t bound; | 243 | nvgpu_atomic_t bound; |
244 | 244 | ||
245 | int chid; | 245 | int chid; |
246 | int tsgid; | 246 | u32 tsgid; |
247 | pid_t pid; | 247 | pid_t pid; |
248 | pid_t tgid; | 248 | pid_t tgid; |
249 | struct nvgpu_mutex ioctl_lock; | 249 | struct nvgpu_mutex ioctl_lock; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/tsg.h b/drivers/gpu/nvgpu/include/nvgpu/tsg.h index bed84986..e87be90d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/tsg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/tsg.h | |||
@@ -28,7 +28,7 @@ | |||
28 | 28 | ||
29 | #include "gk20a/gr_gk20a.h" | 29 | #include "gk20a/gr_gk20a.h" |
30 | 30 | ||
31 | #define NVGPU_INVALID_TSG_ID (-1) | 31 | #define NVGPU_INVALID_TSG_ID (U32_MAX) |
32 | 32 | ||
33 | struct channel_gk20a; | 33 | struct channel_gk20a; |
34 | 34 | ||
@@ -68,7 +68,7 @@ struct tsg_gk20a { | |||
68 | unsigned int timeslice_scale; | 68 | unsigned int timeslice_scale; |
69 | 69 | ||
70 | u32 interleave_level; | 70 | u32 interleave_level; |
71 | int tsgid; | 71 | u32 tsgid; |
72 | 72 | ||
73 | u32 runlist_id; | 73 | u32 runlist_id; |
74 | pid_t tgid; | 74 | pid_t tgid; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/types.h b/drivers/gpu/nvgpu/include/nvgpu/types.h index 3295af26..0cb847b6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/types.h +++ b/drivers/gpu/nvgpu/include/nvgpu/types.h | |||
@@ -65,6 +65,7 @@ | |||
65 | */ | 65 | */ |
66 | #if !defined(__KERNEL__) && !defined(U8_MAX) | 66 | #if !defined(__KERNEL__) && !defined(U8_MAX) |
67 | #define U8_MAX ((u8)255) | 67 | #define U8_MAX ((u8)255) |
68 | #define U32_MAX ((u32)~0U) | ||
68 | #endif | 69 | #endif |
69 | 70 | ||
70 | #endif /* NVGPU_TYPES_H */ | 71 | #endif /* NVGPU_TYPES_H */ |
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c index 7bb170da..63d33c6b 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c | |||
@@ -1713,7 +1713,7 @@ static int nvgpu_profiler_reserve_acquire(struct dbg_session_gk20a *dbg_s, | |||
1713 | /* TSG: check that another channel in the TSG | 1713 | /* TSG: check that another channel in the TSG |
1714 | * doesn't already have the reservation | 1714 | * doesn't already have the reservation |
1715 | */ | 1715 | */ |
1716 | int my_tsgid = my_prof_obj->ch->tsgid; | 1716 | u32 my_tsgid = my_prof_obj->ch->tsgid; |
1717 | 1717 | ||
1718 | nvgpu_list_for_each_entry(prof_obj, &g->profiler_objects, | 1718 | nvgpu_list_for_each_entry(prof_obj, &g->profiler_objects, |
1719 | dbg_profiler_object_data, prof_obj_entry) { | 1719 | dbg_profiler_object_data, prof_obj_entry) { |