diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
23 files changed, 182 insertions, 172 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 7a21d294..9da20802 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -185,7 +185,10 @@ nvgpu-y += \ | |||
185 | common/pmu/pmu_pg.o \ | 185 | common/pmu/pmu_pg.o \ |
186 | common/pmu/pmu_perfmon.o \ | 186 | common/pmu/pmu_perfmon.o \ |
187 | common/pmu/pmu_debug.o \ | 187 | common/pmu/pmu_debug.o \ |
188 | common/ltc.o \ | 188 | common/ltc/ltc.o \ |
189 | common/ltc/ltc_gm20b.o \ | ||
190 | common/ltc/ltc_gp10b.o \ | ||
191 | common/ltc/ltc_gv11b.o \ | ||
189 | common/io_common.o \ | 192 | common/io_common.o \ |
190 | common/clock_gating/gm20b_gating_reglist.o \ | 193 | common/clock_gating/gm20b_gating_reglist.o \ |
191 | common/clock_gating/gp106_gating_reglist.o \ | 194 | common/clock_gating/gp106_gating_reglist.o \ |
@@ -216,7 +219,6 @@ nvgpu-y += \ | |||
216 | gk20a/fecs_trace_gk20a.o \ | 219 | gk20a/fecs_trace_gk20a.o \ |
217 | gk20a/mc_gk20a.o \ | 220 | gk20a/mc_gk20a.o \ |
218 | gm20b/hal_gm20b.o \ | 221 | gm20b/hal_gm20b.o \ |
219 | gm20b/ltc_gm20b.o \ | ||
220 | gm20b/gr_gm20b.o \ | 222 | gm20b/gr_gm20b.o \ |
221 | gm20b/clk_gm20b.o \ | 223 | gm20b/clk_gm20b.o \ |
222 | gm20b/fifo_gm20b.o \ | 224 | gm20b/fifo_gm20b.o \ |
@@ -267,7 +269,6 @@ nvgpu-y += \ | |||
267 | gp10b/ce_gp10b.o \ | 269 | gp10b/ce_gp10b.o \ |
268 | gp10b/mc_gp10b.o \ | 270 | gp10b/mc_gp10b.o \ |
269 | gp10b/fifo_gp10b.o \ | 271 | gp10b/fifo_gp10b.o \ |
270 | gp10b/ltc_gp10b.o \ | ||
271 | gp10b/mm_gp10b.o \ | 272 | gp10b/mm_gp10b.o \ |
272 | gp10b/pmu_gp10b.o \ | 273 | gp10b/pmu_gp10b.o \ |
273 | gp10b/hal_gp10b.o \ | 274 | gp10b/hal_gp10b.o \ |
@@ -293,7 +294,6 @@ nvgpu-y += \ | |||
293 | gv11b/css_gr_gv11b.o \ | 294 | gv11b/css_gr_gv11b.o \ |
294 | gv11b/dbg_gpu_gv11b.o \ | 295 | gv11b/dbg_gpu_gv11b.o \ |
295 | gv11b/mc_gv11b.o \ | 296 | gv11b/mc_gv11b.o \ |
296 | gv11b/ltc_gv11b.o \ | ||
297 | gv11b/hal_gv11b.o \ | 297 | gv11b/hal_gv11b.o \ |
298 | gv11b/gr_gv11b.o \ | 298 | gv11b/gr_gv11b.o \ |
299 | gv11b/fifo_gv11b.o \ | 299 | gv11b/fifo_gv11b.o \ |
diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index e4080013..2d7efd98 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources | |||
@@ -55,7 +55,10 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
55 | common/semaphore.c \ | 55 | common/semaphore.c \ |
56 | common/as.c \ | 56 | common/as.c \ |
57 | common/rbtree.c \ | 57 | common/rbtree.c \ |
58 | common/ltc.c \ | 58 | common/ltc/ltc.c \ |
59 | common/ltc/ltc_gm20b.c \ | ||
60 | common/ltc/ltc_gp10b.c \ | ||
61 | common/ltc/ltc_gv11b.c \ | ||
59 | common/io_common.c \ | 62 | common/io_common.c \ |
60 | common/ecc.c \ | 63 | common/ecc.c \ |
61 | common/ce2.c \ | 64 | common/ce2.c \ |
@@ -149,7 +152,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
149 | gk20a/tsg_gk20a.c \ | 152 | gk20a/tsg_gk20a.c \ |
150 | gk20a/mc_gk20a.c \ | 153 | gk20a/mc_gk20a.c \ |
151 | gm20b/hal_gm20b.c \ | 154 | gm20b/hal_gm20b.c \ |
152 | gm20b/ltc_gm20b.c \ | ||
153 | gm20b/gr_gm20b.c \ | 155 | gm20b/gr_gm20b.c \ |
154 | gm20b/clk_gm20b.c \ | 156 | gm20b/clk_gm20b.c \ |
155 | gm20b/fifo_gm20b.c \ | 157 | gm20b/fifo_gm20b.c \ |
@@ -164,7 +166,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
164 | gp10b/ce_gp10b.c \ | 166 | gp10b/ce_gp10b.c \ |
165 | gp10b/mc_gp10b.c \ | 167 | gp10b/mc_gp10b.c \ |
166 | gp10b/fifo_gp10b.c \ | 168 | gp10b/fifo_gp10b.c \ |
167 | gp10b/ltc_gp10b.c \ | ||
168 | gp10b/mm_gp10b.c \ | 169 | gp10b/mm_gp10b.c \ |
169 | gp10b/pmu_gp10b.c \ | 170 | gp10b/pmu_gp10b.c \ |
170 | gp10b/hal_gp10b.c \ | 171 | gp10b/hal_gp10b.c \ |
@@ -176,7 +177,6 @@ srcs := common/mm/nvgpu_allocator.c \ | |||
176 | gv11b/gv11b.c \ | 177 | gv11b/gv11b.c \ |
177 | gv11b/dbg_gpu_gv11b.c \ | 178 | gv11b/dbg_gpu_gv11b.c \ |
178 | gv11b/mc_gv11b.c \ | 179 | gv11b/mc_gv11b.c \ |
179 | gv11b/ltc_gv11b.c \ | ||
180 | gv11b/hal_gv11b.c \ | 180 | gv11b/hal_gv11b.c \ |
181 | gv11b/gr_gv11b.c \ | 181 | gv11b/gr_gv11b.c \ |
182 | gv11b/fifo_gv11b.c \ | 182 | gv11b/fifo_gv11b.c \ |
diff --git a/drivers/gpu/nvgpu/common/ltc.c b/drivers/gpu/nvgpu/common/ltc/ltc.c index 1beb1974..1beb1974 100644 --- a/drivers/gpu/nvgpu/common/ltc.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc.c | |||
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c index 65945fad..28d63e82 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.c | |||
@@ -487,3 +487,86 @@ void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled) | |||
487 | 487 | ||
488 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); | 488 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); |
489 | } | 489 | } |
490 | |||
491 | /* | ||
492 | * LTC pri addressing | ||
493 | */ | ||
494 | bool gm20b_ltc_pri_is_ltc_addr(struct gk20a *g, u32 addr) | ||
495 | { | ||
496 | return ((addr >= ltc_pltcg_base_v()) && (addr < ltc_pltcg_extent_v())); | ||
497 | } | ||
498 | |||
499 | bool gm20b_ltc_is_ltcs_ltss_addr(struct gk20a *g, u32 addr) | ||
500 | { | ||
501 | u32 ltc_shared_base = ltc_ltcs_ltss_v(); | ||
502 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
503 | |||
504 | return (addr >= ltc_shared_base) && | ||
505 | (addr < (ltc_shared_base + lts_stride)); | ||
506 | } | ||
507 | |||
508 | bool gm20b_ltc_is_ltcn_ltss_addr(struct gk20a *g, u32 addr) | ||
509 | { | ||
510 | u32 lts_shared_base = ltc_ltc0_ltss_v(); | ||
511 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
512 | u32 addr_mask = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE) - 1; | ||
513 | u32 base_offset = lts_shared_base & addr_mask; | ||
514 | u32 end_offset = base_offset + lts_stride; | ||
515 | |||
516 | return (!gm20b_ltc_is_ltcs_ltss_addr(g, addr)) && | ||
517 | ((addr & addr_mask) >= base_offset) && | ||
518 | ((addr & addr_mask) < end_offset); | ||
519 | } | ||
520 | |||
521 | static void gm20b_ltc_update_ltc_lts_addr(struct gk20a *g, u32 addr, u32 ltc_num, | ||
522 | u32 *priv_addr_table, | ||
523 | u32 *priv_addr_table_index) | ||
524 | { | ||
525 | u32 num_ltc_slices = g->ops.gr.get_max_lts_per_ltc(g); | ||
526 | u32 index = *priv_addr_table_index; | ||
527 | u32 lts_num; | ||
528 | u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); | ||
529 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
530 | |||
531 | for (lts_num = 0; lts_num < num_ltc_slices; lts_num++) { | ||
532 | priv_addr_table[index++] = ltc_ltc0_lts0_v() + | ||
533 | ltc_num * ltc_stride + | ||
534 | lts_num * lts_stride + | ||
535 | (addr & (lts_stride - 1)); | ||
536 | } | ||
537 | |||
538 | *priv_addr_table_index = index; | ||
539 | } | ||
540 | |||
541 | void gm20b_ltc_split_lts_broadcast_addr(struct gk20a *g, u32 addr, | ||
542 | u32 *priv_addr_table, | ||
543 | u32 *priv_addr_table_index) | ||
544 | { | ||
545 | u32 num_ltc = g->ltc_count; | ||
546 | u32 i, start, ltc_num = 0; | ||
547 | u32 pltcg_base = ltc_pltcg_base_v(); | ||
548 | u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); | ||
549 | |||
550 | for (i = 0; i < num_ltc; i++) { | ||
551 | start = pltcg_base + i * ltc_stride; | ||
552 | if ((addr >= start) && (addr < (start + ltc_stride))) { | ||
553 | ltc_num = i; | ||
554 | break; | ||
555 | } | ||
556 | } | ||
557 | gm20b_ltc_update_ltc_lts_addr(g, addr, ltc_num, priv_addr_table, | ||
558 | priv_addr_table_index); | ||
559 | } | ||
560 | |||
561 | void gm20b_ltc_split_ltc_broadcast_addr(struct gk20a *g, u32 addr, | ||
562 | u32 *priv_addr_table, | ||
563 | u32 *priv_addr_table_index) | ||
564 | { | ||
565 | u32 num_ltc = g->ltc_count; | ||
566 | u32 ltc_num; | ||
567 | |||
568 | for (ltc_num = 0; ltc_num < num_ltc; ltc_num++) { | ||
569 | gm20b_ltc_update_ltc_lts_addr(g, addr, ltc_num, | ||
570 | priv_addr_table, priv_addr_table_index); | ||
571 | } | ||
572 | } | ||
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.h index 0f9145be..cc92c70a 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gm20b.h | |||
@@ -22,9 +22,16 @@ | |||
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #ifndef _NVHOST_GM20B_LTC | 25 | #ifndef NVGPU_LTC_GM20B |
26 | #define _NVHOST_GM20B_LTC | 26 | #define NVGPU_LTC_GM20B |
27 | |||
28 | #include <nvgpu/types.h> | ||
29 | |||
30 | struct gk20a; | ||
31 | struct gr_gk20a; | ||
27 | struct gpu_ops; | 32 | struct gpu_ops; |
33 | struct zbc_entry; | ||
34 | enum gk20a_cbc_op; | ||
28 | 35 | ||
29 | int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr); | 36 | int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr); |
30 | int gm20b_determine_L2_size_bytes(struct gk20a *g); | 37 | int gm20b_determine_L2_size_bytes(struct gk20a *g); |
@@ -46,4 +53,14 @@ int gm20b_ltc_alloc_phys_cbc(struct gk20a *g, | |||
46 | size_t compbit_backing_size); | 53 | size_t compbit_backing_size); |
47 | int gm20b_ltc_alloc_virt_cbc(struct gk20a *g, | 54 | int gm20b_ltc_alloc_virt_cbc(struct gk20a *g, |
48 | size_t compbit_backing_size); | 55 | size_t compbit_backing_size); |
56 | bool gm20b_ltc_pri_is_ltc_addr(struct gk20a *g, u32 addr); | ||
57 | bool gm20b_ltc_is_ltcs_ltss_addr(struct gk20a *g, u32 addr); | ||
58 | bool gm20b_ltc_is_ltcn_ltss_addr(struct gk20a *g, u32 addr); | ||
59 | void gm20b_ltc_split_lts_broadcast_addr(struct gk20a *g, u32 addr, | ||
60 | u32 *priv_addr_table, | ||
61 | u32 *priv_addr_table_index); | ||
62 | void gm20b_ltc_split_ltc_broadcast_addr(struct gk20a *g, u32 addr, | ||
63 | u32 *priv_addr_table, | ||
64 | u32 *priv_addr_table_index); | ||
65 | |||
49 | #endif | 66 | #endif |
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c index 79ebe86d..eb262add 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.c | |||
@@ -33,8 +33,8 @@ | |||
33 | #include <nvgpu/hw/gp10b/hw_ltc_gp10b.h> | 33 | #include <nvgpu/hw/gp10b/hw_ltc_gp10b.h> |
34 | 34 | ||
35 | #include "gk20a/gk20a.h" | 35 | #include "gk20a/gk20a.h" |
36 | #include "gm20b/ltc_gm20b.h" | ||
37 | 36 | ||
37 | #include "ltc_gm20b.h" | ||
38 | #include "ltc_gp10b.h" | 38 | #include "ltc_gp10b.h" |
39 | 39 | ||
40 | int gp10b_determine_L2_size_bytes(struct gk20a *g) | 40 | int gp10b_determine_L2_size_bytes(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.h index c1a2bf64..c1a2bf64 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gp10b.h | |||
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/common/ltc/ltc_gv11b.c index d7c385a9..98306079 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gv11b.c | |||
@@ -24,8 +24,8 @@ | |||
24 | 24 | ||
25 | #include <nvgpu/io.h> | 25 | #include <nvgpu/io.h> |
26 | #include "gk20a/gk20a.h" | 26 | #include "gk20a/gk20a.h" |
27 | #include "gp10b/ltc_gp10b.h" | ||
28 | 27 | ||
28 | #include "ltc_gp10b.h" | ||
29 | #include "ltc_gv11b.h" | 29 | #include "ltc_gv11b.h" |
30 | 30 | ||
31 | #include <nvgpu/hw/gv11b/hw_ltc_gv11b.h> | 31 | #include <nvgpu/hw/gv11b/hw_ltc_gv11b.h> |
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h b/drivers/gpu/nvgpu/common/ltc/ltc_gv11b.h index 9d33b9fb..9d33b9fb 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h +++ b/drivers/gpu/nvgpu/common/ltc/ltc_gv11b.h | |||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5bb91f62..f802cd56 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -194,6 +194,15 @@ struct gpu_ops { | |||
194 | u32 (*cbc_fix_config)(struct gk20a *g, int base); | 194 | u32 (*cbc_fix_config)(struct gk20a *g, int base); |
195 | void (*flush)(struct gk20a *g); | 195 | void (*flush)(struct gk20a *g); |
196 | void (*intr_en_illegal_compstat)(struct gk20a *g, bool enable); | 196 | void (*intr_en_illegal_compstat)(struct gk20a *g, bool enable); |
197 | bool (*pri_is_ltc_addr)(struct gk20a *g, u32 addr); | ||
198 | bool (*is_ltcs_ltss_addr)(struct gk20a *g, u32 addr); | ||
199 | bool (*is_ltcn_ltss_addr)(struct gk20a *g, u32 addr); | ||
200 | void (*split_lts_broadcast_addr)(struct gk20a *g, u32 addr, | ||
201 | u32 *priv_addr_table, | ||
202 | u32 *priv_addr_table_index); | ||
203 | void (*split_ltc_broadcast_addr)(struct gk20a *g, u32 addr, | ||
204 | u32 *priv_addr_table, | ||
205 | u32 *priv_addr_table_index); | ||
197 | } ltc; | 206 | } ltc; |
198 | struct { | 207 | struct { |
199 | void (*isr_stall)(struct gk20a *g, u32 inst_id, u32 pri_base); | 208 | void (*isr_stall)(struct gk20a *g, u32 inst_id, u32 pri_base); |
@@ -274,15 +283,6 @@ struct gpu_ops { | |||
274 | u32 *gpc_num, u32 *tpc_num); | 283 | u32 *gpc_num, u32 *tpc_num); |
275 | u32 (*get_tpc_num)(struct gk20a *g, u32 addr); | 284 | u32 (*get_tpc_num)(struct gk20a *g, u32 addr); |
276 | u32 (*get_egpc_base)(struct gk20a *g); | 285 | u32 (*get_egpc_base)(struct gk20a *g); |
277 | bool (*is_ltcs_ltss_addr)(struct gk20a *g, u32 addr); | ||
278 | bool (*is_ltcn_ltss_addr)(struct gk20a *g, u32 addr); | ||
279 | bool (*get_lts_in_ltc_shared_base)(void); | ||
280 | void (*split_lts_broadcast_addr)(struct gk20a *g, u32 addr, | ||
281 | u32 *priv_addr_table, | ||
282 | u32 *priv_addr_table_index); | ||
283 | void (*split_ltc_broadcast_addr)(struct gk20a *g, u32 addr, | ||
284 | u32 *priv_addr_table, | ||
285 | u32 *priv_addr_table_index); | ||
286 | void (*detect_sm_arch)(struct gk20a *g); | 286 | void (*detect_sm_arch)(struct gk20a *g); |
287 | int (*add_zbc_color)(struct gk20a *g, struct gr_gk20a *gr, | 287 | int (*add_zbc_color)(struct gk20a *g, struct gr_gk20a *gr, |
288 | struct zbc_entry *color_val, u32 index); | 288 | struct zbc_entry *color_val, u32 index); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index bb54e00e..fbba02ca 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -59,7 +59,6 @@ | |||
59 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> | 59 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> |
60 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> | 60 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> |
61 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> | 61 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> |
62 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | ||
63 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> | 62 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> |
64 | #include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h> | 63 | #include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h> |
65 | 64 | ||
@@ -6256,11 +6255,11 @@ int gr_gk20a_decode_priv_addr(struct gk20a *g, u32 addr, | |||
6256 | } | 6255 | } |
6257 | *be_num = pri_get_be_num(g, addr); | 6256 | *be_num = pri_get_be_num(g, addr); |
6258 | return 0; | 6257 | return 0; |
6259 | } else if (pri_is_ltc_addr(addr)) { | 6258 | } else if (g->ops.ltc.pri_is_ltc_addr(g, addr)) { |
6260 | *addr_type = CTXSW_ADDR_TYPE_LTCS; | 6259 | *addr_type = CTXSW_ADDR_TYPE_LTCS; |
6261 | if (g->ops.gr.is_ltcs_ltss_addr(g, addr)) | 6260 | if (g->ops.ltc.is_ltcs_ltss_addr(g, addr)) |
6262 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTCS; | 6261 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTCS; |
6263 | else if (g->ops.gr.is_ltcn_ltss_addr(g, addr)) | 6262 | else if (g->ops.ltc.is_ltcn_ltss_addr(g, addr)) |
6264 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTSS; | 6263 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTSS; |
6265 | return 0; | 6264 | return 0; |
6266 | } else if (pri_is_fbpa_addr(g, addr)) { | 6265 | } else if (pri_is_fbpa_addr(g, addr)) { |
@@ -6398,10 +6397,10 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, | |||
6398 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, | 6397 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, |
6399 | broadcast_flags, priv_addr_table, &t); | 6398 | broadcast_flags, priv_addr_table, &t); |
6400 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { | 6399 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { |
6401 | g->ops.gr.split_lts_broadcast_addr(g, addr, | 6400 | g->ops.ltc.split_lts_broadcast_addr(g, addr, |
6402 | priv_addr_table, &t); | 6401 | priv_addr_table, &t); |
6403 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTCS) { | 6402 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTCS) { |
6404 | g->ops.gr.split_ltc_broadcast_addr(g, addr, | 6403 | g->ops.ltc.split_ltc_broadcast_addr(g, addr, |
6405 | priv_addr_table, &t); | 6404 | priv_addr_table, &t); |
6406 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { | 6405 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { |
6407 | g->ops.gr.split_fbpa_broadcast_addr(g, addr, | 6406 | g->ops.gr.split_fbpa_broadcast_addr(g, addr, |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h index af390833..32a30d78 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_pri_gk20a.h | |||
@@ -29,8 +29,6 @@ | |||
29 | * of the context state store for gr/compute contexts. | 29 | * of the context state store for gr/compute contexts. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | ||
33 | |||
34 | /* | 32 | /* |
35 | * GPC pri addressing | 33 | * GPC pri addressing |
36 | */ | 34 | */ |
@@ -227,14 +225,6 @@ static inline u32 pri_ppc_addr(struct gk20a *g, u32 addr, u32 gpc, u32 ppc) | |||
227 | ppc_in_gpc_base + (ppc * ppc_in_gpc_stride) + addr; | 225 | ppc_in_gpc_base + (ppc * ppc_in_gpc_stride) + addr; |
228 | } | 226 | } |
229 | 227 | ||
230 | /* | ||
231 | * LTC pri addressing | ||
232 | */ | ||
233 | static inline bool pri_is_ltc_addr(u32 addr) | ||
234 | { | ||
235 | return ((addr >= ltc_pltcg_base_v()) && (addr < ltc_pltcg_extent_v())); | ||
236 | } | ||
237 | |||
238 | enum ctxsw_addr_type { | 228 | enum ctxsw_addr_type { |
239 | CTXSW_ADDR_TYPE_SYS = 0, | 229 | CTXSW_ADDR_TYPE_SYS = 0, |
240 | CTXSW_ADDR_TYPE_GPC = 1, | 230 | CTXSW_ADDR_TYPE_GPC = 1, |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 5bba5d9c..ee63489e 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -52,7 +52,6 @@ | |||
52 | #include <nvgpu/hw/gk20a/hw_pram_gk20a.h> | 52 | #include <nvgpu/hw/gk20a/hw_pram_gk20a.h> |
53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
54 | #include <nvgpu/hw/gk20a/hw_flush_gk20a.h> | 54 | #include <nvgpu/hw/gk20a/hw_flush_gk20a.h> |
55 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | ||
56 | 55 | ||
57 | /* | 56 | /* |
58 | * GPU mapping life cycle | 57 | * GPU mapping life cycle |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 49b81783..abc39362 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <nvgpu/hw/gm20b/hw_gr_gm20b.h> | 39 | #include <nvgpu/hw/gm20b/hw_gr_gm20b.h> |
40 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> | 40 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> |
41 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> | 41 | #include <nvgpu/hw/gm20b/hw_top_gm20b.h> |
42 | #include <nvgpu/hw/gm20b/hw_ltc_gm20b.h> | ||
43 | #include <nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h> | 42 | #include <nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h> |
44 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> | 43 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> |
45 | #include <nvgpu/hw/gm20b/hw_perf_gm20b.h> | 44 | #include <nvgpu/hw/gm20b/hw_perf_gm20b.h> |
@@ -1438,81 +1437,6 @@ int gr_gm20b_get_preemption_mode_flags(struct gk20a *g, | |||
1438 | return 0; | 1437 | return 0; |
1439 | } | 1438 | } |
1440 | 1439 | ||
1441 | bool gr_gm20b_is_ltcs_ltss_addr(struct gk20a *g, u32 addr) | ||
1442 | { | ||
1443 | u32 ltc_shared_base = ltc_ltcs_ltss_v(); | ||
1444 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
1445 | |||
1446 | return (addr >= ltc_shared_base) && | ||
1447 | (addr < (ltc_shared_base + lts_stride)); | ||
1448 | } | ||
1449 | |||
1450 | bool gr_gm20b_is_ltcn_ltss_addr(struct gk20a *g, u32 addr) | ||
1451 | { | ||
1452 | u32 lts_shared_base = ltc_ltc0_ltss_v(); | ||
1453 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
1454 | u32 addr_mask = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE) - 1; | ||
1455 | u32 base_offset = lts_shared_base & addr_mask; | ||
1456 | u32 end_offset = base_offset + lts_stride; | ||
1457 | |||
1458 | return (!gr_gm20b_is_ltcs_ltss_addr(g, addr)) && | ||
1459 | ((addr & addr_mask) >= base_offset) && | ||
1460 | ((addr & addr_mask) < end_offset); | ||
1461 | } | ||
1462 | |||
1463 | static void gr_gm20b_update_ltc_lts_addr(struct gk20a *g, u32 addr, u32 ltc_num, | ||
1464 | u32 *priv_addr_table, | ||
1465 | u32 *priv_addr_table_index) | ||
1466 | { | ||
1467 | u32 num_ltc_slices = g->ops.gr.get_max_lts_per_ltc(g); | ||
1468 | u32 index = *priv_addr_table_index; | ||
1469 | u32 lts_num; | ||
1470 | u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); | ||
1471 | u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE); | ||
1472 | |||
1473 | for (lts_num = 0; lts_num < num_ltc_slices; lts_num++) { | ||
1474 | priv_addr_table[index++] = ltc_ltc0_lts0_v() + | ||
1475 | ltc_num * ltc_stride + | ||
1476 | lts_num * lts_stride + | ||
1477 | (addr & (lts_stride - 1)); | ||
1478 | } | ||
1479 | |||
1480 | *priv_addr_table_index = index; | ||
1481 | } | ||
1482 | |||
1483 | void gr_gm20b_split_lts_broadcast_addr(struct gk20a *g, u32 addr, | ||
1484 | u32 *priv_addr_table, | ||
1485 | u32 *priv_addr_table_index) | ||
1486 | { | ||
1487 | u32 num_ltc = g->ltc_count; | ||
1488 | u32 i, start, ltc_num = 0; | ||
1489 | u32 pltcg_base = ltc_pltcg_base_v(); | ||
1490 | u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE); | ||
1491 | |||
1492 | for (i = 0; i < num_ltc; i++) { | ||
1493 | start = pltcg_base + i * ltc_stride; | ||
1494 | if ((addr >= start) && (addr < (start + ltc_stride))) { | ||
1495 | ltc_num = i; | ||
1496 | break; | ||
1497 | } | ||
1498 | } | ||
1499 | gr_gm20b_update_ltc_lts_addr(g, addr, ltc_num, priv_addr_table, | ||
1500 | priv_addr_table_index); | ||
1501 | } | ||
1502 | |||
1503 | void gr_gm20b_split_ltc_broadcast_addr(struct gk20a *g, u32 addr, | ||
1504 | u32 *priv_addr_table, | ||
1505 | u32 *priv_addr_table_index) | ||
1506 | { | ||
1507 | u32 num_ltc = g->ltc_count; | ||
1508 | u32 ltc_num; | ||
1509 | |||
1510 | for (ltc_num = 0; ltc_num < num_ltc; ltc_num++) { | ||
1511 | gr_gm20b_update_ltc_lts_addr(g, addr, ltc_num, | ||
1512 | priv_addr_table, priv_addr_table_index); | ||
1513 | } | ||
1514 | } | ||
1515 | |||
1516 | void gm20b_gr_clear_sm_hww(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, | 1440 | void gm20b_gr_clear_sm_hww(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, |
1517 | u32 global_esr) | 1441 | u32 global_esr) |
1518 | { | 1442 | { |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h index 5c82fd65..9d8e5cdf 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h | |||
@@ -124,14 +124,6 @@ int gm20b_gr_clear_sm_error_state(struct gk20a *g, | |||
124 | struct channel_gk20a *ch, u32 sm_id); | 124 | struct channel_gk20a *ch, u32 sm_id); |
125 | int gr_gm20b_get_preemption_mode_flags(struct gk20a *g, | 125 | int gr_gm20b_get_preemption_mode_flags(struct gk20a *g, |
126 | struct nvgpu_preemption_modes_rec *preemption_modes_rec); | 126 | struct nvgpu_preemption_modes_rec *preemption_modes_rec); |
127 | bool gr_gm20b_is_ltcs_ltss_addr(struct gk20a *g, u32 addr); | ||
128 | bool gr_gm20b_is_ltcn_ltss_addr(struct gk20a *g, u32 addr); | ||
129 | void gr_gm20b_split_lts_broadcast_addr(struct gk20a *g, u32 addr, | ||
130 | u32 *priv_addr_table, | ||
131 | u32 *priv_addr_table_index); | ||
132 | void gr_gm20b_split_ltc_broadcast_addr(struct gk20a *g, u32 addr, | ||
133 | u32 *priv_addr_table, | ||
134 | u32 *priv_addr_table_index); | ||
135 | void gm20b_gr_clear_sm_hww(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, | 127 | void gm20b_gr_clear_sm_hww(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, |
136 | u32 global_esr); | 128 | u32 global_esr); |
137 | u32 gr_gm20b_get_pmm_per_chiplet_offset(void); | 129 | u32 gr_gm20b_get_pmm_per_chiplet_offset(void); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 05acc0cf..3b164f9c 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "common/fb/fb_gm20b.h" | 31 | #include "common/fb/fb_gm20b.h" |
32 | #include "common/therm/therm_gm20b.h" | 32 | #include "common/therm/therm_gm20b.h" |
33 | #include "common/therm/therm_gm20b.h" | 33 | #include "common/therm/therm_gm20b.h" |
34 | #include "common/ltc/ltc_gm20b.h" | ||
34 | 35 | ||
35 | #include "gk20a/gk20a.h" | 36 | #include "gk20a/gk20a.h" |
36 | #include "gk20a/ce2_gk20a.h" | 37 | #include "gk20a/ce2_gk20a.h" |
@@ -45,9 +46,7 @@ | |||
45 | #include "gk20a/gr_gk20a.h" | 46 | #include "gk20a/gr_gk20a.h" |
46 | #include "gk20a/tsg_gk20a.h" | 47 | #include "gk20a/tsg_gk20a.h" |
47 | 48 | ||
48 | #include "ltc_gm20b.h" | ||
49 | #include "gr_gm20b.h" | 49 | #include "gr_gm20b.h" |
50 | #include "ltc_gm20b.h" | ||
51 | #include "fifo_gm20b.h" | 50 | #include "fifo_gm20b.h" |
52 | #include "gr_ctx_gm20b.h" | 51 | #include "gr_ctx_gm20b.h" |
53 | #include "mm_gm20b.h" | 52 | #include "mm_gm20b.h" |
@@ -200,6 +199,11 @@ static const struct gpu_ops gm20b_ops = { | |||
200 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | 199 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, |
201 | .flush = gm20b_flush_ltc, | 200 | .flush = gm20b_flush_ltc, |
202 | .set_enabled = gm20b_ltc_set_enabled, | 201 | .set_enabled = gm20b_ltc_set_enabled, |
202 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
203 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
204 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
205 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
206 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
203 | }, | 207 | }, |
204 | .ce2 = { | 208 | .ce2 = { |
205 | .isr_stall = gk20a_ce2_isr, | 209 | .isr_stall = gk20a_ce2_isr, |
@@ -281,10 +285,6 @@ static const struct gpu_ops gm20b_ops = { | |||
281 | .init_sm_id_table = gr_gk20a_init_sm_id_table, | 285 | .init_sm_id_table = gr_gk20a_init_sm_id_table, |
282 | .load_smid_config = gr_gm20b_load_smid_config, | 286 | .load_smid_config = gr_gm20b_load_smid_config, |
283 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, | 287 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, |
284 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
285 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
286 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
287 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
288 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, | 288 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, |
289 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, | 289 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, |
290 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, | 290 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 02a2f0a6..1c5e1800 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -36,6 +36,8 @@ | |||
36 | #include "common/xve/xve_gp106.h" | 36 | #include "common/xve/xve_gp106.h" |
37 | #include "common/therm/therm_gm20b.h" | 37 | #include "common/therm/therm_gm20b.h" |
38 | #include "common/therm/therm_gp106.h" | 38 | #include "common/therm/therm_gp106.h" |
39 | #include "common/ltc/ltc_gm20b.h" | ||
40 | #include "common/ltc/ltc_gp10b.h" | ||
39 | 41 | ||
40 | #include "gk20a/gk20a.h" | 42 | #include "gk20a/gk20a.h" |
41 | #include "gk20a/fifo_gk20a.h" | 43 | #include "gk20a/fifo_gk20a.h" |
@@ -49,7 +51,6 @@ | |||
49 | #include "gk20a/pmu_gk20a.h" | 51 | #include "gk20a/pmu_gk20a.h" |
50 | #include "gk20a/gr_gk20a.h" | 52 | #include "gk20a/gr_gk20a.h" |
51 | 53 | ||
52 | #include "gp10b/ltc_gp10b.h" | ||
53 | #include "gp10b/gr_gp10b.h" | 54 | #include "gp10b/gr_gp10b.h" |
54 | #include "gp10b/fecs_trace_gp10b.h" | 55 | #include "gp10b/fecs_trace_gp10b.h" |
55 | #include "gp10b/mc_gp10b.h" | 56 | #include "gp10b/mc_gp10b.h" |
@@ -64,7 +65,6 @@ | |||
64 | #include "gp106/fifo_gp106.h" | 65 | #include "gp106/fifo_gp106.h" |
65 | #include "gp106/regops_gp106.h" | 66 | #include "gp106/regops_gp106.h" |
66 | 67 | ||
67 | #include "gm20b/ltc_gm20b.h" | ||
68 | #include "gm20b/gr_gm20b.h" | 68 | #include "gm20b/gr_gm20b.h" |
69 | #include "gm20b/fifo_gm20b.h" | 69 | #include "gm20b/fifo_gm20b.h" |
70 | #include "gm20b/mm_gm20b.h" | 70 | #include "gm20b/mm_gm20b.h" |
@@ -256,6 +256,11 @@ static const struct gpu_ops gp106_ops = { | |||
256 | .cbc_fix_config = NULL, | 256 | .cbc_fix_config = NULL, |
257 | .flush = gm20b_flush_ltc, | 257 | .flush = gm20b_flush_ltc, |
258 | .set_enabled = gp10b_ltc_set_enabled, | 258 | .set_enabled = gp10b_ltc_set_enabled, |
259 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
260 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
261 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
262 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
263 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
259 | }, | 264 | }, |
260 | .ce2 = { | 265 | .ce2 = { |
261 | .isr_stall = gp10b_ce_isr, | 266 | .isr_stall = gp10b_ce_isr, |
@@ -340,10 +345,6 @@ static const struct gpu_ops gp106_ops = { | |||
340 | .init_sm_id_table = gr_gk20a_init_sm_id_table, | 345 | .init_sm_id_table = gr_gk20a_init_sm_id_table, |
341 | .load_smid_config = gr_gp10b_load_smid_config, | 346 | .load_smid_config = gr_gp10b_load_smid_config, |
342 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, | 347 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, |
343 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
344 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
345 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
346 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
347 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, | 348 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, |
348 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, | 349 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, |
349 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, | 350 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index cfbdc6ce..b9d8c81a 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -34,6 +34,8 @@ | |||
34 | #include "common/fb/fb_gp10b.h" | 34 | #include "common/fb/fb_gp10b.h" |
35 | #include "common/therm/therm_gm20b.h" | 35 | #include "common/therm/therm_gm20b.h" |
36 | #include "common/therm/therm_gp10b.h" | 36 | #include "common/therm/therm_gp10b.h" |
37 | #include "common/ltc/ltc_gm20b.h" | ||
38 | #include "common/ltc/ltc_gp10b.h" | ||
37 | 39 | ||
38 | #include "gk20a/gk20a.h" | 40 | #include "gk20a/gk20a.h" |
39 | #include "gk20a/fifo_gk20a.h" | 41 | #include "gk20a/fifo_gk20a.h" |
@@ -51,7 +53,6 @@ | |||
51 | #include "gp10b/gr_gp10b.h" | 53 | #include "gp10b/gr_gp10b.h" |
52 | #include "gp10b/fecs_trace_gp10b.h" | 54 | #include "gp10b/fecs_trace_gp10b.h" |
53 | #include "gp10b/mc_gp10b.h" | 55 | #include "gp10b/mc_gp10b.h" |
54 | #include "gp10b/ltc_gp10b.h" | ||
55 | #include "gp10b/mm_gp10b.h" | 56 | #include "gp10b/mm_gp10b.h" |
56 | #include "gp10b/ce_gp10b.h" | 57 | #include "gp10b/ce_gp10b.h" |
57 | #include "gp10b/pmu_gp10b.h" | 58 | #include "gp10b/pmu_gp10b.h" |
@@ -60,7 +61,6 @@ | |||
60 | #include "gp10b/regops_gp10b.h" | 61 | #include "gp10b/regops_gp10b.h" |
61 | #include "gp10b/ecc_gp10b.h" | 62 | #include "gp10b/ecc_gp10b.h" |
62 | 63 | ||
63 | #include "gm20b/ltc_gm20b.h" | ||
64 | #include "gm20b/gr_gm20b.h" | 64 | #include "gm20b/gr_gm20b.h" |
65 | #include "gm20b/fifo_gm20b.h" | 65 | #include "gm20b/fifo_gm20b.h" |
66 | #include "gm20b/acr_gm20b.h" | 66 | #include "gm20b/acr_gm20b.h" |
@@ -214,6 +214,11 @@ static const struct gpu_ops gp10b_ops = { | |||
214 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | 214 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, |
215 | .flush = gm20b_flush_ltc, | 215 | .flush = gm20b_flush_ltc, |
216 | .set_enabled = gp10b_ltc_set_enabled, | 216 | .set_enabled = gp10b_ltc_set_enabled, |
217 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
218 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
219 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
220 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
221 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
217 | }, | 222 | }, |
218 | .ce2 = { | 223 | .ce2 = { |
219 | .isr_stall = gp10b_ce_isr, | 224 | .isr_stall = gp10b_ce_isr, |
@@ -299,10 +304,6 @@ static const struct gpu_ops gp10b_ops = { | |||
299 | .init_sm_id_table = gr_gk20a_init_sm_id_table, | 304 | .init_sm_id_table = gr_gk20a_init_sm_id_table, |
300 | .load_smid_config = gr_gp10b_load_smid_config, | 305 | .load_smid_config = gr_gp10b_load_smid_config, |
301 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, | 306 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, |
302 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
303 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
304 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
305 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
306 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, | 307 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, |
307 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, | 308 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, |
308 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, | 309 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 7926c35c..6904313b 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -39,6 +39,9 @@ | |||
39 | #include "common/therm/therm_gp106.h" | 39 | #include "common/therm/therm_gp106.h" |
40 | #include "common/therm/therm_gp10b.h" | 40 | #include "common/therm/therm_gp10b.h" |
41 | #include "common/therm/therm_gv11b.h" | 41 | #include "common/therm/therm_gv11b.h" |
42 | #include "common/ltc/ltc_gm20b.h" | ||
43 | #include "common/ltc/ltc_gp10b.h" | ||
44 | #include "common/ltc/ltc_gv11b.h" | ||
42 | 45 | ||
43 | #include "gk20a/gk20a.h" | 46 | #include "gk20a/gk20a.h" |
44 | #include "gk20a/fifo_gk20a.h" | 47 | #include "gk20a/fifo_gk20a.h" |
@@ -52,7 +55,6 @@ | |||
52 | #include "gk20a/pmu_gk20a.h" | 55 | #include "gk20a/pmu_gk20a.h" |
53 | #include "gk20a/gr_gk20a.h" | 56 | #include "gk20a/gr_gk20a.h" |
54 | 57 | ||
55 | #include "gm20b/ltc_gm20b.h" | ||
56 | #include "gm20b/gr_gm20b.h" | 58 | #include "gm20b/gr_gm20b.h" |
57 | #include "gm20b/fifo_gm20b.h" | 59 | #include "gm20b/fifo_gm20b.h" |
58 | #include "gm20b/mm_gm20b.h" | 60 | #include "gm20b/mm_gm20b.h" |
@@ -69,7 +71,6 @@ | |||
69 | #include "gp106/flcn_gp106.h" | 71 | #include "gp106/flcn_gp106.h" |
70 | 72 | ||
71 | #include "gp10b/gr_gp10b.h" | 73 | #include "gp10b/gr_gp10b.h" |
72 | #include "gp10b/ltc_gp10b.h" | ||
73 | #include "gp10b/mc_gp10b.h" | 74 | #include "gp10b/mc_gp10b.h" |
74 | #include "gp10b/ce_gp10b.h" | 75 | #include "gp10b/ce_gp10b.h" |
75 | #include "gp10b/fifo_gp10b.h" | 76 | #include "gp10b/fifo_gp10b.h" |
@@ -83,7 +84,6 @@ | |||
83 | #include "gv11b/hal_gv11b.h" | 84 | #include "gv11b/hal_gv11b.h" |
84 | #include "gv11b/gr_gv11b.h" | 85 | #include "gv11b/gr_gv11b.h" |
85 | #include "gv11b/mc_gv11b.h" | 86 | #include "gv11b/mc_gv11b.h" |
86 | #include "gv11b/ltc_gv11b.h" | ||
87 | #include "gv11b/gv11b.h" | 87 | #include "gv11b/gv11b.h" |
88 | #include "gv11b/ce_gv11b.h" | 88 | #include "gv11b/ce_gv11b.h" |
89 | #include "gv11b/mm_gv11b.h" | 89 | #include "gv11b/mm_gv11b.h" |
@@ -288,6 +288,11 @@ static const struct gpu_ops gv100_ops = { | |||
288 | .flush = gm20b_flush_ltc, | 288 | .flush = gm20b_flush_ltc, |
289 | .set_enabled = gp10b_ltc_set_enabled, | 289 | .set_enabled = gp10b_ltc_set_enabled, |
290 | .intr_en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat, | 290 | .intr_en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat, |
291 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
292 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
293 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
294 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
295 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
291 | }, | 296 | }, |
292 | .ce2 = { | 297 | .ce2 = { |
293 | .isr_stall = gv11b_ce_isr, | 298 | .isr_stall = gv11b_ce_isr, |
@@ -377,10 +382,6 @@ static const struct gpu_ops gv100_ops = { | |||
377 | .init_sm_id_table = gr_gv100_init_sm_id_table, | 382 | .init_sm_id_table = gr_gv100_init_sm_id_table, |
378 | .load_smid_config = gr_gv11b_load_smid_config, | 383 | .load_smid_config = gr_gv11b_load_smid_config, |
379 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, | 384 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, |
380 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
381 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
382 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
383 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
384 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, | 385 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, |
385 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, | 386 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, |
386 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, | 387 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index c2cf909a..41d2f695 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -4716,11 +4716,11 @@ int gr_gv11b_decode_priv_addr(struct gk20a *g, u32 addr, | |||
4716 | } | 4716 | } |
4717 | *be_num = pri_get_be_num(g, addr); | 4717 | *be_num = pri_get_be_num(g, addr); |
4718 | return 0; | 4718 | return 0; |
4719 | } else if (pri_is_ltc_addr(addr)) { | 4719 | } else if (g->ops.ltc.pri_is_ltc_addr(g, addr)) { |
4720 | *addr_type = CTXSW_ADDR_TYPE_LTCS; | 4720 | *addr_type = CTXSW_ADDR_TYPE_LTCS; |
4721 | if (g->ops.gr.is_ltcs_ltss_addr(g, addr)) | 4721 | if (g->ops.ltc.is_ltcs_ltss_addr(g, addr)) |
4722 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTCS; | 4722 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTCS; |
4723 | else if (g->ops.gr.is_ltcn_ltss_addr(g, addr)) | 4723 | else if (g->ops.ltc.is_ltcn_ltss_addr(g, addr)) |
4724 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTSS; | 4724 | *broadcast_flags |= PRI_BROADCAST_FLAGS_LTSS; |
4725 | return 0; | 4725 | return 0; |
4726 | } else if (pri_is_fbpa_addr(g, addr)) { | 4726 | } else if (pri_is_fbpa_addr(g, addr)) { |
@@ -4928,10 +4928,10 @@ int gr_gv11b_create_priv_addr_table(struct gk20a *g, | |||
4928 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, | 4928 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, |
4929 | broadcast_flags, priv_addr_table, &t); | 4929 | broadcast_flags, priv_addr_table, &t); |
4930 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { | 4930 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { |
4931 | g->ops.gr.split_lts_broadcast_addr(g, addr, | 4931 | g->ops.ltc.split_lts_broadcast_addr(g, addr, |
4932 | priv_addr_table, &t); | 4932 | priv_addr_table, &t); |
4933 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTCS) { | 4933 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTCS) { |
4934 | g->ops.gr.split_ltc_broadcast_addr(g, addr, | 4934 | g->ops.ltc.split_ltc_broadcast_addr(g, addr, |
4935 | priv_addr_table, &t); | 4935 | priv_addr_table, &t); |
4936 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { | 4936 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_FBPA) { |
4937 | g->ops.gr.split_fbpa_broadcast_addr(g, addr, | 4937 | g->ops.gr.split_fbpa_broadcast_addr(g, addr, |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 111a1ea2..3772649e 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -36,6 +36,9 @@ | |||
36 | #include "common/therm/therm_gm20b.h" | 36 | #include "common/therm/therm_gm20b.h" |
37 | #include "common/therm/therm_gp10b.h" | 37 | #include "common/therm/therm_gp10b.h" |
38 | #include "common/therm/therm_gv11b.h" | 38 | #include "common/therm/therm_gv11b.h" |
39 | #include "common/ltc/ltc_gm20b.h" | ||
40 | #include "common/ltc/ltc_gp10b.h" | ||
41 | #include "common/ltc/ltc_gv11b.h" | ||
39 | 42 | ||
40 | #include "gk20a/gk20a.h" | 43 | #include "gk20a/gk20a.h" |
41 | #include "gk20a/fifo_gk20a.h" | 44 | #include "gk20a/fifo_gk20a.h" |
@@ -49,14 +52,12 @@ | |||
49 | #include "gk20a/pmu_gk20a.h" | 52 | #include "gk20a/pmu_gk20a.h" |
50 | #include "gk20a/gr_gk20a.h" | 53 | #include "gk20a/gr_gk20a.h" |
51 | 54 | ||
52 | #include "gm20b/ltc_gm20b.h" | ||
53 | #include "gm20b/gr_gm20b.h" | 55 | #include "gm20b/gr_gm20b.h" |
54 | #include "gm20b/fifo_gm20b.h" | 56 | #include "gm20b/fifo_gm20b.h" |
55 | #include "gm20b/mm_gm20b.h" | 57 | #include "gm20b/mm_gm20b.h" |
56 | #include "gm20b/acr_gm20b.h" | 58 | #include "gm20b/acr_gm20b.h" |
57 | #include "gm20b/pmu_gm20b.h" | 59 | #include "gm20b/pmu_gm20b.h" |
58 | 60 | ||
59 | #include "gp10b/ltc_gp10b.h" | ||
60 | #include "gp10b/mc_gp10b.h" | 61 | #include "gp10b/mc_gp10b.h" |
61 | #include "gp10b/ce_gp10b.h" | 62 | #include "gp10b/ce_gp10b.h" |
62 | #include "gp10b/fifo_gp10b.h" | 63 | #include "gp10b/fifo_gp10b.h" |
@@ -76,7 +77,6 @@ | |||
76 | #include "css_gr_gv11b.h" | 77 | #include "css_gr_gv11b.h" |
77 | #include "gr_gv11b.h" | 78 | #include "gr_gv11b.h" |
78 | #include "mc_gv11b.h" | 79 | #include "mc_gv11b.h" |
79 | #include "ltc_gv11b.h" | ||
80 | #include "gv11b.h" | 80 | #include "gv11b.h" |
81 | #include "ce_gv11b.h" | 81 | #include "ce_gv11b.h" |
82 | #include "gr_ctx_gv11b.h" | 82 | #include "gr_ctx_gv11b.h" |
@@ -245,6 +245,11 @@ static const struct gpu_ops gv11b_ops = { | |||
245 | .flush = gm20b_flush_ltc, | 245 | .flush = gm20b_flush_ltc, |
246 | .set_enabled = gp10b_ltc_set_enabled, | 246 | .set_enabled = gp10b_ltc_set_enabled, |
247 | .intr_en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat, | 247 | .intr_en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat, |
248 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
249 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
250 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
251 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
252 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
248 | }, | 253 | }, |
249 | .ce2 = { | 254 | .ce2 = { |
250 | .isr_stall = gv11b_ce_isr, | 255 | .isr_stall = gv11b_ce_isr, |
@@ -332,10 +337,6 @@ static const struct gpu_ops gv11b_ops = { | |||
332 | .init_sm_id_table = gr_gv100_init_sm_id_table, | 337 | .init_sm_id_table = gr_gv100_init_sm_id_table, |
333 | .load_smid_config = gr_gv11b_load_smid_config, | 338 | .load_smid_config = gr_gv11b_load_smid_config, |
334 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, | 339 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, |
335 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
336 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
337 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
338 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
339 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, | 340 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, |
340 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, | 341 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, |
341 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, | 342 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index aadd17d6..a4ad64a8 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -30,6 +30,8 @@ | |||
30 | #include "common/fb/fb_gp10b.h" | 30 | #include "common/fb/fb_gp10b.h" |
31 | #include "common/therm/therm_gm20b.h" | 31 | #include "common/therm/therm_gm20b.h" |
32 | #include "common/therm/therm_gp10b.h" | 32 | #include "common/therm/therm_gp10b.h" |
33 | #include "common/ltc/ltc_gm20b.h" | ||
34 | #include "common/ltc/ltc_gp10b.h" | ||
33 | 35 | ||
34 | #include "vgpu/fifo_vgpu.h" | 36 | #include "vgpu/fifo_vgpu.h" |
35 | #include "vgpu/gr_vgpu.h" | 37 | #include "vgpu/gr_vgpu.h" |
@@ -50,7 +52,6 @@ | |||
50 | #include "gk20a/dbg_gpu_gk20a.h" | 52 | #include "gk20a/dbg_gpu_gk20a.h" |
51 | 53 | ||
52 | #include "gp10b/mc_gp10b.h" | 54 | #include "gp10b/mc_gp10b.h" |
53 | #include "gp10b/ltc_gp10b.h" | ||
54 | #include "gp10b/mm_gp10b.h" | 55 | #include "gp10b/mm_gp10b.h" |
55 | #include "gp10b/ce_gp10b.h" | 56 | #include "gp10b/ce_gp10b.h" |
56 | #include "gp10b/pmu_gp10b.h" | 57 | #include "gp10b/pmu_gp10b.h" |
@@ -60,7 +61,6 @@ | |||
60 | #include "gp10b/regops_gp10b.h" | 61 | #include "gp10b/regops_gp10b.h" |
61 | #include "gp10b/fuse_gp10b.h" | 62 | #include "gp10b/fuse_gp10b.h" |
62 | 63 | ||
63 | #include "gm20b/ltc_gm20b.h" | ||
64 | #include "gm20b/gr_gm20b.h" | 64 | #include "gm20b/gr_gm20b.h" |
65 | #include "gm20b/fifo_gm20b.h" | 65 | #include "gm20b/fifo_gm20b.h" |
66 | #include "gm20b/acr_gm20b.h" | 66 | #include "gm20b/acr_gm20b.h" |
@@ -91,6 +91,11 @@ static const struct gpu_ops vgpu_gp10b_ops = { | |||
91 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | 91 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, |
92 | .flush = gm20b_flush_ltc, | 92 | .flush = gm20b_flush_ltc, |
93 | .set_enabled = NULL, | 93 | .set_enabled = NULL, |
94 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
95 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
96 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
97 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
98 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
94 | }, | 99 | }, |
95 | .ce2 = { | 100 | .ce2 = { |
96 | .isr_stall = gp10b_ce_isr, | 101 | .isr_stall = gp10b_ce_isr, |
@@ -173,10 +178,6 @@ static const struct gpu_ops vgpu_gp10b_ops = { | |||
173 | .init_sm_id_table = vgpu_gr_init_sm_id_table, | 178 | .init_sm_id_table = vgpu_gr_init_sm_id_table, |
174 | .load_smid_config = gr_gp10b_load_smid_config, | 179 | .load_smid_config = gr_gp10b_load_smid_config, |
175 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, | 180 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, |
176 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
177 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
178 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
179 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
180 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, | 181 | .setup_rop_mapping = gr_gk20a_setup_rop_mapping, |
181 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, | 182 | .program_zcull_mapping = gr_gk20a_program_zcull_mapping, |
182 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, | 183 | .commit_global_timeslice = gr_gk20a_commit_global_timeslice, |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index e2410e4e..a02c47f2 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -32,6 +32,9 @@ | |||
32 | #include "common/therm/therm_gm20b.h" | 32 | #include "common/therm/therm_gm20b.h" |
33 | #include "common/therm/therm_gp10b.h" | 33 | #include "common/therm/therm_gp10b.h" |
34 | #include "common/therm/therm_gv11b.h" | 34 | #include "common/therm/therm_gv11b.h" |
35 | #include "common/ltc/ltc_gm20b.h" | ||
36 | #include "common/ltc/ltc_gp10b.h" | ||
37 | #include "common/ltc/ltc_gv11b.h" | ||
35 | 38 | ||
36 | #include <gk20a/gk20a.h> | 39 | #include <gk20a/gk20a.h> |
37 | #include <gv11b/hal_gv11b.h> | 40 | #include <gv11b/hal_gv11b.h> |
@@ -58,7 +61,6 @@ | |||
58 | #include <gm20b/pmu_gm20b.h> | 61 | #include <gm20b/pmu_gm20b.h> |
59 | #include <gm20b/mm_gm20b.h> | 62 | #include <gm20b/mm_gm20b.h> |
60 | #include <gm20b/acr_gm20b.h> | 63 | #include <gm20b/acr_gm20b.h> |
61 | #include <gm20b/ltc_gm20b.h> | ||
62 | 64 | ||
63 | #include <gp10b/pmu_gp10b.h> | 65 | #include <gp10b/pmu_gp10b.h> |
64 | #include <gp10b/mm_gp10b.h> | 66 | #include <gp10b/mm_gp10b.h> |
@@ -66,7 +68,6 @@ | |||
66 | #include <gp10b/ce_gp10b.h> | 68 | #include <gp10b/ce_gp10b.h> |
67 | #include "gp10b/gr_gp10b.h" | 69 | #include "gp10b/gr_gp10b.h" |
68 | #include <gp10b/fifo_gp10b.h> | 70 | #include <gp10b/fifo_gp10b.h> |
69 | #include <gp10b/ltc_gp10b.h> | ||
70 | #include <gp10b/fuse_gp10b.h> | 71 | #include <gp10b/fuse_gp10b.h> |
71 | 72 | ||
72 | #include <gp106/pmu_gp106.h> | 73 | #include <gp106/pmu_gp106.h> |
@@ -80,7 +81,6 @@ | |||
80 | #include <gv11b/fifo_gv11b.h> | 81 | #include <gv11b/fifo_gv11b.h> |
81 | #include <gv11b/regops_gv11b.h> | 82 | #include <gv11b/regops_gv11b.h> |
82 | #include <gv11b/gr_ctx_gv11b.h> | 83 | #include <gv11b/gr_ctx_gv11b.h> |
83 | #include <gv11b/ltc_gv11b.h> | ||
84 | #include <gv11b/gr_gv11b.h> | 84 | #include <gv11b/gr_gv11b.h> |
85 | 85 | ||
86 | #include <nvgpu/enabled.h> | 86 | #include <nvgpu/enabled.h> |
@@ -110,6 +110,11 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
110 | .isr = gv11b_ltc_isr, | 110 | .isr = gv11b_ltc_isr, |
111 | .flush = gm20b_flush_ltc, | 111 | .flush = gm20b_flush_ltc, |
112 | .set_enabled = NULL, | 112 | .set_enabled = NULL, |
113 | .pri_is_ltc_addr = gm20b_ltc_pri_is_ltc_addr, | ||
114 | .is_ltcs_ltss_addr = gm20b_ltc_is_ltcs_ltss_addr, | ||
115 | .is_ltcn_ltss_addr = gm20b_ltc_is_ltcn_ltss_addr, | ||
116 | .split_lts_broadcast_addr = gm20b_ltc_split_lts_broadcast_addr, | ||
117 | .split_ltc_broadcast_addr = gm20b_ltc_split_ltc_broadcast_addr, | ||
113 | }, | 118 | }, |
114 | .ce2 = { | 119 | .ce2 = { |
115 | .isr_stall = gv11b_ce_isr, | 120 | .isr_stall = gv11b_ce_isr, |
@@ -191,10 +196,6 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
191 | .init_sm_id_table = vgpu_gr_init_sm_id_table, | 196 | .init_sm_id_table = vgpu_gr_init_sm_id_table, |
192 | .load_smid_config = gr_gv11b_load_smid_config, | 197 | .load_smid_config = gr_gv11b_load_smid_config, |
193 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, | 198 | .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, |
194 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | ||
195 | .is_ltcn_ltss_addr = gr_gm20b_is_ltcn_ltss_addr, | ||
196 | .split_lts_broadcast_addr = gr_gm20b_split_lts_broadcast_addr, | ||
197 | .split_ltc_broadcast_addr = gr_gm20b_split_ltc_broadcast_addr, | ||
198 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, | 199 | .setup_rop_mapping = gr_gv11b_setup_rop_mapping, |
199 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, | 200 | .program_zcull_mapping = gr_gv11b_program_zcull_mapping, |
200 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, | 201 | .commit_global_timeslice = gr_gv11b_commit_global_timeslice, |