diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.c | 148 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | 24 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/gr_gp106.c | 18 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 48 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | 34 |
9 files changed, 223 insertions, 86 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index f5947828..6feb6fb7 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c | |||
@@ -45,7 +45,7 @@ | |||
45 | static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) | 45 | static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) |
46 | { | 46 | { |
47 | switch (graphics_preempt_mode) { | 47 | switch (graphics_preempt_mode) { |
48 | case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: | 48 | case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: |
49 | return "WFI"; | 49 | return "WFI"; |
50 | default: | 50 | default: |
51 | return "?"; | 51 | return "?"; |
@@ -55,9 +55,9 @@ static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode | |||
55 | static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode) | 55 | static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode) |
56 | { | 56 | { |
57 | switch (compute_preempt_mode) { | 57 | switch (compute_preempt_mode) { |
58 | case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: | 58 | case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: |
59 | return "WFI"; | 59 | return "WFI"; |
60 | case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: | 60 | case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: |
61 | return "CTA"; | 61 | return "CTA"; |
62 | default: | 62 | default: |
63 | return "?"; | 63 | return "?"; |
@@ -991,6 +991,130 @@ static int nvgpu_ioctl_channel_alloc_obj_ctx(struct channel_gk20a *ch, | |||
991 | nvgpu_obj_ctx_user_flags_to_common_flags(user_flags)); | 991 | nvgpu_obj_ctx_user_flags_to_common_flags(user_flags)); |
992 | } | 992 | } |
993 | 993 | ||
994 | /* | ||
995 | * Convert common preemption mode flags of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* | ||
996 | * into linux preemption mode flags of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* | ||
997 | */ | ||
998 | u32 nvgpu_get_ioctl_graphics_preempt_mode_flags(u32 graphics_preempt_mode_flags) | ||
999 | { | ||
1000 | u32 flags = 0; | ||
1001 | |||
1002 | if (graphics_preempt_mode_flags & NVGPU_PREEMPTION_MODE_GRAPHICS_WFI) | ||
1003 | flags |= NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; | ||
1004 | if (graphics_preempt_mode_flags & NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) | ||
1005 | flags |= NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | ||
1006 | |||
1007 | return flags; | ||
1008 | } | ||
1009 | |||
1010 | /* | ||
1011 | * Convert common preemption mode flags of the form NVGPU_PREEMPTION_MODE_COMPUTE_* | ||
1012 | * into linux preemption mode flags of the form NVGPU_COMPUTE_PREEMPTION_MODE_* | ||
1013 | */ | ||
1014 | u32 nvgpu_get_ioctl_compute_preempt_mode_flags(u32 compute_preempt_mode_flags) | ||
1015 | { | ||
1016 | u32 flags = 0; | ||
1017 | |||
1018 | if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_WFI) | ||
1019 | flags |= NVGPU_COMPUTE_PREEMPTION_MODE_WFI; | ||
1020 | if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_CTA) | ||
1021 | flags |= NVGPU_COMPUTE_PREEMPTION_MODE_CTA; | ||
1022 | if (compute_preempt_mode_flags & NVGPU_PREEMPTION_MODE_COMPUTE_CILP) | ||
1023 | flags |= NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | ||
1024 | |||
1025 | return flags; | ||
1026 | } | ||
1027 | |||
1028 | /* | ||
1029 | * Convert common preemption modes of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* | ||
1030 | * into linux preemption modes of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* | ||
1031 | */ | ||
1032 | u32 nvgpu_get_ioctl_graphics_preempt_mode(u32 graphics_preempt_mode) | ||
1033 | { | ||
1034 | switch (graphics_preempt_mode) { | ||
1035 | case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: | ||
1036 | return NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; | ||
1037 | case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: | ||
1038 | return NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | ||
1039 | } | ||
1040 | |||
1041 | return graphics_preempt_mode; | ||
1042 | } | ||
1043 | |||
1044 | /* | ||
1045 | * Convert common preemption modes of the form NVGPU_PREEMPTION_MODE_COMPUTE_* | ||
1046 | * into linux preemption modes of the form NVGPU_COMPUTE_PREEMPTION_MODE_* | ||
1047 | */ | ||
1048 | u32 nvgpu_get_ioctl_compute_preempt_mode(u32 compute_preempt_mode) | ||
1049 | { | ||
1050 | switch (compute_preempt_mode) { | ||
1051 | case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: | ||
1052 | return NVGPU_COMPUTE_PREEMPTION_MODE_WFI; | ||
1053 | case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: | ||
1054 | return NVGPU_COMPUTE_PREEMPTION_MODE_CTA; | ||
1055 | case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: | ||
1056 | return NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | ||
1057 | } | ||
1058 | |||
1059 | return compute_preempt_mode; | ||
1060 | } | ||
1061 | |||
1062 | /* | ||
1063 | * Convert linux preemption modes of the form NVGPU_GRAPHICS_PREEMPTION_MODE_* | ||
1064 | * into common preemption modes of the form NVGPU_PREEMPTION_MODE_GRAPHICS_* | ||
1065 | */ | ||
1066 | static u32 nvgpu_get_common_graphics_preempt_mode(u32 graphics_preempt_mode) | ||
1067 | { | ||
1068 | switch (graphics_preempt_mode) { | ||
1069 | case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: | ||
1070 | return NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; | ||
1071 | case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: | ||
1072 | return NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; | ||
1073 | } | ||
1074 | |||
1075 | return graphics_preempt_mode; | ||
1076 | } | ||
1077 | |||
1078 | /* | ||
1079 | * Convert linux preemption modes of the form NVGPU_COMPUTE_PREEMPTION_MODE_* | ||
1080 | * into common preemption modes of the form NVGPU_PREEMPTION_MODE_COMPUTE_* | ||
1081 | */ | ||
1082 | static u32 nvgpu_get_common_compute_preempt_mode(u32 compute_preempt_mode) | ||
1083 | { | ||
1084 | switch (compute_preempt_mode) { | ||
1085 | case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: | ||
1086 | return NVGPU_PREEMPTION_MODE_COMPUTE_WFI; | ||
1087 | case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: | ||
1088 | return NVGPU_PREEMPTION_MODE_COMPUTE_CTA; | ||
1089 | case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: | ||
1090 | return NVGPU_PREEMPTION_MODE_COMPUTE_CILP; | ||
1091 | } | ||
1092 | |||
1093 | return compute_preempt_mode; | ||
1094 | } | ||
1095 | |||
1096 | static int nvgpu_ioctl_channel_set_preemption_mode(struct channel_gk20a *ch, | ||
1097 | u32 graphics_preempt_mode, u32 compute_preempt_mode) | ||
1098 | { | ||
1099 | int err; | ||
1100 | |||
1101 | if (ch->g->ops.gr.set_preemption_mode) { | ||
1102 | err = gk20a_busy(ch->g); | ||
1103 | if (err) { | ||
1104 | nvgpu_err(ch->g, "failed to power on, %d", err); | ||
1105 | return err; | ||
1106 | } | ||
1107 | err = ch->g->ops.gr.set_preemption_mode(ch, | ||
1108 | nvgpu_get_common_graphics_preempt_mode(graphics_preempt_mode), | ||
1109 | nvgpu_get_common_compute_preempt_mode(compute_preempt_mode)); | ||
1110 | gk20a_idle(ch->g); | ||
1111 | } else { | ||
1112 | err = -EINVAL; | ||
1113 | } | ||
1114 | |||
1115 | return err; | ||
1116 | } | ||
1117 | |||
994 | long gk20a_channel_ioctl(struct file *filp, | 1118 | long gk20a_channel_ioctl(struct file *filp, |
995 | unsigned int cmd, unsigned long arg) | 1119 | unsigned int cmd, unsigned long arg) |
996 | { | 1120 | { |
@@ -1302,21 +1426,9 @@ long gk20a_channel_ioctl(struct file *filp, | |||
1302 | gk20a_channel_get_timeslice(ch); | 1426 | gk20a_channel_get_timeslice(ch); |
1303 | break; | 1427 | break; |
1304 | case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: | 1428 | case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE: |
1305 | if (ch->g->ops.gr.set_preemption_mode) { | 1429 | err = nvgpu_ioctl_channel_set_preemption_mode(ch, |
1306 | err = gk20a_busy(ch->g); | 1430 | ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode, |
1307 | if (err) { | 1431 | ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode); |
1308 | dev_err(dev, | ||
1309 | "%s: failed to host gk20a for ioctl cmd: 0x%x", | ||
1310 | __func__, cmd); | ||
1311 | break; | ||
1312 | } | ||
1313 | err = ch->g->ops.gr.set_preemption_mode(ch, | ||
1314 | ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode, | ||
1315 | ((struct nvgpu_preemption_mode_args *)buf)->compute_preempt_mode); | ||
1316 | gk20a_idle(ch->g); | ||
1317 | } else { | ||
1318 | err = -EINVAL; | ||
1319 | } | ||
1320 | break; | 1432 | break; |
1321 | case NVGPU_IOCTL_CHANNEL_SET_BOOSTED_CTX: | 1433 | case NVGPU_IOCTL_CHANNEL_SET_BOOSTED_CTX: |
1322 | if (ch->g->ops.gr.set_boosted_ctx) { | 1434 | if (ch->g->ops.gr.set_boosted_ctx) { |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h index 48caf9df..235d84ef 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.h +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.h | |||
@@ -32,4 +32,9 @@ extern const struct file_operations gk20a_channel_ops; | |||
32 | 32 | ||
33 | u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id); | 33 | u32 nvgpu_event_id_to_ioctl_channel_event_id(u32 event_id); |
34 | u32 nvgpu_get_common_runlist_level(u32 level); | 34 | u32 nvgpu_get_common_runlist_level(u32 level); |
35 | |||
36 | u32 nvgpu_get_ioctl_graphics_preempt_mode_flags(u32 graphics_preempt_mode_flags); | ||
37 | u32 nvgpu_get_ioctl_compute_preempt_mode_flags(u32 compute_preempt_mode_flags); | ||
38 | u32 nvgpu_get_ioctl_graphics_preempt_mode(u32 graphics_preempt_mode); | ||
39 | u32 nvgpu_get_ioctl_compute_preempt_mode(u32 compute_preempt_mode); | ||
35 | #endif | 40 | #endif |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index b77855f4..58178ac3 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | |||
@@ -194,6 +194,28 @@ static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g) | |||
194 | return ioctl_flags; | 194 | return ioctl_flags; |
195 | } | 195 | } |
196 | 196 | ||
197 | static void nvgpu_set_preemption_mode_flags(struct gk20a *g, | ||
198 | struct nvgpu_gpu_characteristics *gpu) | ||
199 | { | ||
200 | struct nvgpu_preemption_modes_rec preemption_mode_rec; | ||
201 | |||
202 | g->ops.gr.get_preemption_mode_flags(g, &preemption_mode_rec); | ||
203 | |||
204 | gpu->graphics_preemption_mode_flags = | ||
205 | nvgpu_get_ioctl_graphics_preempt_mode_flags( | ||
206 | preemption_mode_rec.graphics_preemption_mode_flags); | ||
207 | gpu->compute_preemption_mode_flags = | ||
208 | nvgpu_get_ioctl_compute_preempt_mode_flags( | ||
209 | preemption_mode_rec.compute_preemption_mode_flags); | ||
210 | |||
211 | gpu->default_graphics_preempt_mode = | ||
212 | nvgpu_get_ioctl_graphics_preempt_mode( | ||
213 | preemption_mode_rec.default_graphics_preempt_mode); | ||
214 | gpu->default_compute_preempt_mode = | ||
215 | nvgpu_get_ioctl_compute_preempt_mode( | ||
216 | preemption_mode_rec.default_compute_preempt_mode); | ||
217 | } | ||
218 | |||
197 | static long | 219 | static long |
198 | gk20a_ctrl_ioctl_gpu_characteristics( | 220 | gk20a_ctrl_ioctl_gpu_characteristics( |
199 | struct gk20a *g, | 221 | struct gk20a *g, |
@@ -235,6 +257,8 @@ gk20a_ctrl_ioctl_gpu_characteristics( | |||
235 | 257 | ||
236 | pgpu->max_css_buffer_size = g->gr.max_css_buffer_size; | 258 | pgpu->max_css_buffer_size = g->gr.max_css_buffer_size; |
237 | 259 | ||
260 | nvgpu_set_preemption_mode_flags(g, pgpu); | ||
261 | |||
238 | if (request->gpu_characteristics_buf_size > 0) { | 262 | if (request->gpu_characteristics_buf_size > 0) { |
239 | size_t write_size = sizeof(*pgpu); | 263 | size_t write_size = sizeof(*pgpu); |
240 | 264 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 1d594d29..ab3d86be 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -468,16 +468,6 @@ int gk20a_init_gpu_characteristics(struct gk20a *g) | |||
468 | if (g->ops.clk.get_maxrate) | 468 | if (g->ops.clk.get_maxrate) |
469 | gpu->max_freq = g->ops.clk.get_maxrate(&g->clk); | 469 | gpu->max_freq = g->ops.clk.get_maxrate(&g->clk); |
470 | 470 | ||
471 | g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec); | ||
472 | gpu->graphics_preemption_mode_flags = | ||
473 | g->gr.preemption_mode_rec.graphics_preemption_mode_flags; | ||
474 | gpu->compute_preemption_mode_flags = | ||
475 | g->gr.preemption_mode_rec.compute_preemption_mode_flags; | ||
476 | gpu->default_graphics_preempt_mode = | ||
477 | g->gr.preemption_mode_rec.default_graphics_preempt_mode; | ||
478 | gpu->default_compute_preempt_mode = | ||
479 | g->gr.preemption_mode_rec.default_compute_preempt_mode; | ||
480 | |||
481 | gpu->local_video_memory_size = g->mm.vidmem.size; | 471 | gpu->local_video_memory_size = g->mm.vidmem.size; |
482 | 472 | ||
483 | gpu->pci_vendor_id = g->pci_vendor_id; | 473 | gpu->pci_vendor_id = g->pci_vendor_id; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index b437838f..3377df5d 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -61,6 +61,13 @@ | |||
61 | (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32))) | 61 | (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32))) |
62 | #define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32)) | 62 | #define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32)) |
63 | 63 | ||
64 | #define NVGPU_PREEMPTION_MODE_GRAPHICS_WFI (1 << 0) | ||
65 | #define NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP (1 << 1) | ||
66 | |||
67 | #define NVGPU_PREEMPTION_MODE_COMPUTE_WFI (1 << 0) | ||
68 | #define NVGPU_PREEMPTION_MODE_COMPUTE_CTA (1 << 1) | ||
69 | #define NVGPU_PREEMPTION_MODE_COMPUTE_CILP (1 << 2) | ||
70 | |||
64 | struct channel_gk20a; | 71 | struct channel_gk20a; |
65 | struct nvgpu_warpstate; | 72 | struct nvgpu_warpstate; |
66 | 73 | ||
@@ -403,7 +410,6 @@ struct gr_gk20a { | |||
403 | bool sw_ready; | 410 | bool sw_ready; |
404 | bool skip_ucode_init; | 411 | bool skip_ucode_init; |
405 | 412 | ||
406 | struct nvgpu_preemption_modes_rec preemption_mode_rec; | ||
407 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC | 413 | #ifdef CONFIG_ARCH_TEGRA_18x_SOC |
408 | struct gr_t18x t18x; | 414 | struct gr_t18x t18x; |
409 | #endif | 415 | #endif |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 20f8e062..ef46c1ee 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -870,7 +870,7 @@ int gr_gm20b_alloc_gr_ctx(struct gk20a *g, | |||
870 | return err; | 870 | return err; |
871 | 871 | ||
872 | if (class == MAXWELL_COMPUTE_B) | 872 | if (class == MAXWELL_COMPUTE_B) |
873 | (*gr_ctx)->compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CTA; | 873 | (*gr_ctx)->compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA; |
874 | 874 | ||
875 | gk20a_dbg_fn("done"); | 875 | gk20a_dbg_fn("done"); |
876 | 876 | ||
@@ -887,7 +887,7 @@ void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
887 | 887 | ||
888 | gk20a_dbg_fn(""); | 888 | gk20a_dbg_fn(""); |
889 | 889 | ||
890 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { | 890 | if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CTA) { |
891 | gk20a_dbg_info("CTA: %x", cta_preempt_option); | 891 | gk20a_dbg_info("CTA: %x", cta_preempt_option); |
892 | nvgpu_mem_wr(g, mem, | 892 | nvgpu_mem_wr(g, mem, |
893 | ctxsw_prog_main_image_preemption_options_o(), | 893 | ctxsw_prog_main_image_preemption_options_o(), |
@@ -1410,15 +1410,15 @@ int gr_gm20b_get_preemption_mode_flags(struct gk20a *g, | |||
1410 | struct nvgpu_preemption_modes_rec *preemption_modes_rec) | 1410 | struct nvgpu_preemption_modes_rec *preemption_modes_rec) |
1411 | { | 1411 | { |
1412 | preemption_modes_rec->graphics_preemption_mode_flags = | 1412 | preemption_modes_rec->graphics_preemption_mode_flags = |
1413 | NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; | 1413 | NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; |
1414 | preemption_modes_rec->compute_preemption_mode_flags = ( | 1414 | preemption_modes_rec->compute_preemption_mode_flags = ( |
1415 | NVGPU_COMPUTE_PREEMPTION_MODE_WFI | | 1415 | NVGPU_PREEMPTION_MODE_COMPUTE_WFI | |
1416 | NVGPU_COMPUTE_PREEMPTION_MODE_CTA); | 1416 | NVGPU_PREEMPTION_MODE_COMPUTE_CTA); |
1417 | 1417 | ||
1418 | preemption_modes_rec->default_graphics_preempt_mode = | 1418 | preemption_modes_rec->default_graphics_preempt_mode = |
1419 | NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; | 1419 | NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; |
1420 | preemption_modes_rec->default_compute_preempt_mode = | 1420 | preemption_modes_rec->default_compute_preempt_mode = |
1421 | NVGPU_COMPUTE_PREEMPTION_MODE_CTA; | 1421 | NVGPU_PREEMPTION_MODE_COMPUTE_CTA; |
1422 | 1422 | ||
1423 | return 0; | 1423 | return 0; |
1424 | } | 1424 | } |
diff --git a/drivers/gpu/nvgpu/gp106/gr_gp106.c b/drivers/gpu/nvgpu/gp106/gr_gp106.c index 1fb527d1..fea337e7 100644 --- a/drivers/gpu/nvgpu/gp106/gr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/gr_gp106.c | |||
@@ -141,23 +141,23 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, | |||
141 | int err = 0; | 141 | int err = 0; |
142 | 142 | ||
143 | if (class == PASCAL_B && g->gr.t18x.ctx_vars.force_preemption_gfxp) | 143 | if (class == PASCAL_B && g->gr.t18x.ctx_vars.force_preemption_gfxp) |
144 | graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 144 | graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
145 | 145 | ||
146 | if (class == PASCAL_COMPUTE_B && | 146 | if (class == PASCAL_COMPUTE_B && |
147 | g->gr.t18x.ctx_vars.force_preemption_cilp) | 147 | g->gr.t18x.ctx_vars.force_preemption_cilp) |
148 | compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 148 | compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
149 | 149 | ||
150 | /* check for invalid combinations */ | 150 | /* check for invalid combinations */ |
151 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) | 151 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) |
152 | return -EINVAL; | 152 | return -EINVAL; |
153 | 153 | ||
154 | if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && | 154 | if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && |
155 | (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) | 155 | (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) |
156 | return -EINVAL; | 156 | return -EINVAL; |
157 | 157 | ||
158 | /* set preemption modes */ | 158 | /* set preemption modes */ |
159 | switch (graphics_preempt_mode) { | 159 | switch (graphics_preempt_mode) { |
160 | case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: | 160 | case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: |
161 | { | 161 | { |
162 | u32 spill_size = | 162 | u32 spill_size = |
163 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * | 163 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * |
@@ -213,7 +213,7 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, | |||
213 | break; | 213 | break; |
214 | } | 214 | } |
215 | 215 | ||
216 | case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: | 216 | case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: |
217 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; | 217 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; |
218 | break; | 218 | break; |
219 | 219 | ||
@@ -223,9 +223,9 @@ int gr_gp106_set_ctxsw_preemption_mode(struct gk20a *g, | |||
223 | 223 | ||
224 | if (class == PASCAL_COMPUTE_B) { | 224 | if (class == PASCAL_COMPUTE_B) { |
225 | switch (compute_preempt_mode) { | 225 | switch (compute_preempt_mode) { |
226 | case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: | 226 | case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: |
227 | case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: | 227 | case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: |
228 | case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: | 228 | case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: |
229 | gr_ctx->compute_preempt_mode = compute_preempt_mode; | 229 | gr_ctx->compute_preempt_mode = compute_preempt_mode; |
230 | break; | 230 | break; |
231 | default: | 231 | default: |
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 559ea159..08988ac8 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -408,7 +408,7 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g, | |||
408 | 408 | ||
409 | gk20a_dbg_fn(""); | 409 | gk20a_dbg_fn(""); |
410 | 410 | ||
411 | if (gr_ctx->graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) { | 411 | if (gr_ctx->graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) { |
412 | attrib_size_in_chunk = gr->attrib_cb_default_size + | 412 | attrib_size_in_chunk = gr->attrib_cb_default_size + |
413 | (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - | 413 | (gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v() - |
414 | gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); | 414 | gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v()); |
@@ -941,18 +941,18 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
941 | 941 | ||
942 | if (g->ops.gr.is_valid_gfx_class(g, class) && | 942 | if (g->ops.gr.is_valid_gfx_class(g, class) && |
943 | g->gr.t18x.ctx_vars.force_preemption_gfxp) | 943 | g->gr.t18x.ctx_vars.force_preemption_gfxp) |
944 | graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 944 | graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
945 | 945 | ||
946 | if (g->ops.gr.is_valid_compute_class(g, class) && | 946 | if (g->ops.gr.is_valid_compute_class(g, class) && |
947 | g->gr.t18x.ctx_vars.force_preemption_cilp) | 947 | g->gr.t18x.ctx_vars.force_preemption_cilp) |
948 | compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 948 | compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
949 | 949 | ||
950 | /* check for invalid combinations */ | 950 | /* check for invalid combinations */ |
951 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) | 951 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) |
952 | return -EINVAL; | 952 | return -EINVAL; |
953 | 953 | ||
954 | if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && | 954 | if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && |
955 | (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) | 955 | (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) |
956 | return -EINVAL; | 956 | return -EINVAL; |
957 | 957 | ||
958 | /* Do not allow lower preemption modes than current ones */ | 958 | /* Do not allow lower preemption modes than current ones */ |
@@ -966,7 +966,7 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
966 | 966 | ||
967 | /* set preemption modes */ | 967 | /* set preemption modes */ |
968 | switch (graphics_preempt_mode) { | 968 | switch (graphics_preempt_mode) { |
969 | case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: | 969 | case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: |
970 | { | 970 | { |
971 | u32 spill_size = | 971 | u32 spill_size = |
972 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * | 972 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * |
@@ -1022,7 +1022,7 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
1022 | break; | 1022 | break; |
1023 | } | 1023 | } |
1024 | 1024 | ||
1025 | case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: | 1025 | case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: |
1026 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; | 1026 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; |
1027 | break; | 1027 | break; |
1028 | 1028 | ||
@@ -1033,9 +1033,9 @@ int gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
1033 | if (g->ops.gr.is_valid_compute_class(g, class) || | 1033 | if (g->ops.gr.is_valid_compute_class(g, class) || |
1034 | g->ops.gr.is_valid_gfx_class(g, class)) { | 1034 | g->ops.gr.is_valid_gfx_class(g, class)) { |
1035 | switch (compute_preempt_mode) { | 1035 | switch (compute_preempt_mode) { |
1036 | case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: | 1036 | case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: |
1037 | case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: | 1037 | case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: |
1038 | case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: | 1038 | case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: |
1039 | gr_ctx->compute_preempt_mode = compute_preempt_mode; | 1039 | gr_ctx->compute_preempt_mode = compute_preempt_mode; |
1040 | break; | 1040 | break; |
1041 | default: | 1041 | default: |
@@ -1073,9 +1073,9 @@ int gr_gp10b_alloc_gr_ctx(struct gk20a *g, | |||
1073 | (*gr_ctx)->t18x.ctx_id_valid = false; | 1073 | (*gr_ctx)->t18x.ctx_id_valid = false; |
1074 | 1074 | ||
1075 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) | 1075 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) |
1076 | graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 1076 | graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
1077 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) | 1077 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) |
1078 | compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 1078 | compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
1079 | 1079 | ||
1080 | if (graphics_preempt_mode || compute_preempt_mode) { | 1080 | if (graphics_preempt_mode || compute_preempt_mode) { |
1081 | if (g->ops.gr.set_ctxsw_preemption_mode) { | 1081 | if (g->ops.gr.set_ctxsw_preemption_mode) { |
@@ -1190,21 +1190,21 @@ void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
1190 | 1190 | ||
1191 | gk20a_dbg_fn(""); | 1191 | gk20a_dbg_fn(""); |
1192 | 1192 | ||
1193 | if (gr_ctx->graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) { | 1193 | if (gr_ctx->graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) { |
1194 | gk20a_dbg_info("GfxP: %x", gfxp_preempt_option); | 1194 | gk20a_dbg_info("GfxP: %x", gfxp_preempt_option); |
1195 | nvgpu_mem_wr(g, mem, | 1195 | nvgpu_mem_wr(g, mem, |
1196 | ctxsw_prog_main_image_graphics_preemption_options_o(), | 1196 | ctxsw_prog_main_image_graphics_preemption_options_o(), |
1197 | gfxp_preempt_option); | 1197 | gfxp_preempt_option); |
1198 | } | 1198 | } |
1199 | 1199 | ||
1200 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP) { | 1200 | if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP) { |
1201 | gk20a_dbg_info("CILP: %x", cilp_preempt_option); | 1201 | gk20a_dbg_info("CILP: %x", cilp_preempt_option); |
1202 | nvgpu_mem_wr(g, mem, | 1202 | nvgpu_mem_wr(g, mem, |
1203 | ctxsw_prog_main_image_compute_preemption_options_o(), | 1203 | ctxsw_prog_main_image_compute_preemption_options_o(), |
1204 | cilp_preempt_option); | 1204 | cilp_preempt_option); |
1205 | } | 1205 | } |
1206 | 1206 | ||
1207 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { | 1207 | if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CTA) { |
1208 | gk20a_dbg_info("CTA: %x", cta_preempt_option); | 1208 | gk20a_dbg_info("CTA: %x", cta_preempt_option); |
1209 | nvgpu_mem_wr(g, mem, | 1209 | nvgpu_mem_wr(g, mem, |
1210 | ctxsw_prog_main_image_compute_preemption_options_o(), | 1210 | ctxsw_prog_main_image_compute_preemption_options_o(), |
@@ -1835,7 +1835,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g, | |||
1835 | 1835 | ||
1836 | if (fault_ch) | 1836 | if (fault_ch) |
1837 | cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode == | 1837 | cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode == |
1838 | NVGPU_COMPUTE_PREEMPTION_MODE_CILP); | 1838 | NVGPU_PREEMPTION_MODE_COMPUTE_CILP); |
1839 | 1839 | ||
1840 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u\n", | 1840 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d = %u\n", |
1841 | gpc, tpc, global_esr); | 1841 | gpc, tpc, global_esr); |
@@ -2045,7 +2045,7 @@ static bool gr_gp10b_suspend_context(struct channel_gk20a *ch, | |||
2045 | if (gk20a_is_channel_ctx_resident(ch)) { | 2045 | if (gk20a_is_channel_ctx_resident(ch)) { |
2046 | g->ops.gr.suspend_all_sms(g, 0, false); | 2046 | g->ops.gr.suspend_all_sms(g, 0, false); |
2047 | 2047 | ||
2048 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP) { | 2048 | if (gr_ctx->compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP) { |
2049 | err = gr_gp10b_set_cilp_preempt_pending(g, ch); | 2049 | err = gr_gp10b_set_cilp_preempt_pending(g, ch); |
2050 | if (err) | 2050 | if (err) |
2051 | nvgpu_err(g, "unable to set CILP preempt pending"); | 2051 | nvgpu_err(g, "unable to set CILP preempt pending"); |
@@ -2278,17 +2278,17 @@ int gr_gp10b_get_preemption_mode_flags(struct gk20a *g, | |||
2278 | struct nvgpu_preemption_modes_rec *preemption_modes_rec) | 2278 | struct nvgpu_preemption_modes_rec *preemption_modes_rec) |
2279 | { | 2279 | { |
2280 | preemption_modes_rec->graphics_preemption_mode_flags = ( | 2280 | preemption_modes_rec->graphics_preemption_mode_flags = ( |
2281 | NVGPU_GRAPHICS_PREEMPTION_MODE_WFI | | 2281 | NVGPU_PREEMPTION_MODE_GRAPHICS_WFI | |
2282 | NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP); | 2282 | NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP); |
2283 | preemption_modes_rec->compute_preemption_mode_flags = ( | 2283 | preemption_modes_rec->compute_preemption_mode_flags = ( |
2284 | NVGPU_COMPUTE_PREEMPTION_MODE_WFI | | 2284 | NVGPU_PREEMPTION_MODE_COMPUTE_WFI | |
2285 | NVGPU_COMPUTE_PREEMPTION_MODE_CTA | | 2285 | NVGPU_PREEMPTION_MODE_COMPUTE_CTA | |
2286 | NVGPU_COMPUTE_PREEMPTION_MODE_CILP); | 2286 | NVGPU_PREEMPTION_MODE_COMPUTE_CILP); |
2287 | 2287 | ||
2288 | preemption_modes_rec->default_graphics_preempt_mode = | 2288 | preemption_modes_rec->default_graphics_preempt_mode = |
2289 | NVGPU_GRAPHICS_PREEMPTION_MODE_WFI; | 2289 | NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; |
2290 | preemption_modes_rec->default_compute_preempt_mode = | 2290 | preemption_modes_rec->default_compute_preempt_mode = |
2291 | NVGPU_COMPUTE_PREEMPTION_MODE_WFI; | 2291 | NVGPU_PREEMPTION_MODE_COMPUTE_WFI; |
2292 | 2292 | ||
2293 | return 0; | 2293 | return 0; |
2294 | } | 2294 | } |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c index fc8b16cb..d3ad6280 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | |||
@@ -80,16 +80,16 @@ int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g, | |||
80 | gr_ctx = *__gr_ctx; | 80 | gr_ctx = *__gr_ctx; |
81 | 81 | ||
82 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) | 82 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP) |
83 | graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 83 | graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
84 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) | 84 | if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP) |
85 | compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 85 | compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
86 | 86 | ||
87 | if (priv->constants.force_preempt_mode && !graphics_preempt_mode && | 87 | if (priv->constants.force_preempt_mode && !graphics_preempt_mode && |
88 | !compute_preempt_mode) { | 88 | !compute_preempt_mode) { |
89 | graphics_preempt_mode = PASCAL_A == class ? | 89 | graphics_preempt_mode = PASCAL_A == class ? |
90 | NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP : 0; | 90 | NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP : 0; |
91 | compute_preempt_mode = PASCAL_COMPUTE_A == class ? | 91 | compute_preempt_mode = PASCAL_COMPUTE_A == class ? |
92 | NVGPU_COMPUTE_PREEMPTION_MODE_CTA : 0; | 92 | NVGPU_PREEMPTION_MODE_COMPUTE_CTA : 0; |
93 | } | 93 | } |
94 | 94 | ||
95 | if (graphics_preempt_mode || compute_preempt_mode) { | 95 | if (graphics_preempt_mode || compute_preempt_mode) { |
@@ -127,23 +127,23 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
127 | int err = 0; | 127 | int err = 0; |
128 | 128 | ||
129 | if (class == PASCAL_A && g->gr.t18x.ctx_vars.force_preemption_gfxp) | 129 | if (class == PASCAL_A && g->gr.t18x.ctx_vars.force_preemption_gfxp) |
130 | graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 130 | graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
131 | 131 | ||
132 | if (class == PASCAL_COMPUTE_A && | 132 | if (class == PASCAL_COMPUTE_A && |
133 | g->gr.t18x.ctx_vars.force_preemption_cilp) | 133 | g->gr.t18x.ctx_vars.force_preemption_cilp) |
134 | compute_preempt_mode = NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 134 | compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
135 | 135 | ||
136 | /* check for invalid combinations */ | 136 | /* check for invalid combinations */ |
137 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) | 137 | if ((graphics_preempt_mode == 0) && (compute_preempt_mode == 0)) |
138 | return -EINVAL; | 138 | return -EINVAL; |
139 | 139 | ||
140 | if ((graphics_preempt_mode == NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP) && | 140 | if ((graphics_preempt_mode == NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP) && |
141 | (compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CILP)) | 141 | (compute_preempt_mode == NVGPU_PREEMPTION_MODE_COMPUTE_CILP)) |
142 | return -EINVAL; | 142 | return -EINVAL; |
143 | 143 | ||
144 | /* set preemption modes */ | 144 | /* set preemption modes */ |
145 | switch (graphics_preempt_mode) { | 145 | switch (graphics_preempt_mode) { |
146 | case NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP: | 146 | case NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP: |
147 | { | 147 | { |
148 | u32 spill_size = | 148 | u32 spill_size = |
149 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * | 149 | gr_gpc0_swdx_rm_spill_buffer_size_256b_default_v() * |
@@ -213,11 +213,11 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
213 | desc->gpu_va; | 213 | desc->gpu_va; |
214 | p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = desc->size; | 214 | p->size[TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB] = desc->size; |
215 | 215 | ||
216 | gr_ctx->graphics_preempt_mode = NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP; | 216 | gr_ctx->graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP; |
217 | p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_GFX_GFXP; | 217 | p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_GFX_GFXP; |
218 | break; | 218 | break; |
219 | } | 219 | } |
220 | case NVGPU_GRAPHICS_PREEMPTION_MODE_WFI: | 220 | case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI: |
221 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; | 221 | gr_ctx->graphics_preempt_mode = graphics_preempt_mode; |
222 | break; | 222 | break; |
223 | 223 | ||
@@ -227,20 +227,20 @@ int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g, | |||
227 | 227 | ||
228 | if (class == PASCAL_COMPUTE_A) { | 228 | if (class == PASCAL_COMPUTE_A) { |
229 | switch (compute_preempt_mode) { | 229 | switch (compute_preempt_mode) { |
230 | case NVGPU_COMPUTE_PREEMPTION_MODE_WFI: | 230 | case NVGPU_PREEMPTION_MODE_COMPUTE_WFI: |
231 | gr_ctx->compute_preempt_mode = | 231 | gr_ctx->compute_preempt_mode = |
232 | NVGPU_COMPUTE_PREEMPTION_MODE_WFI; | 232 | NVGPU_PREEMPTION_MODE_COMPUTE_WFI; |
233 | p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_WFI; | 233 | p->mode = TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_WFI; |
234 | break; | 234 | break; |
235 | case NVGPU_COMPUTE_PREEMPTION_MODE_CTA: | 235 | case NVGPU_PREEMPTION_MODE_COMPUTE_CTA: |
236 | gr_ctx->compute_preempt_mode = | 236 | gr_ctx->compute_preempt_mode = |
237 | NVGPU_COMPUTE_PREEMPTION_MODE_CTA; | 237 | NVGPU_PREEMPTION_MODE_COMPUTE_CTA; |
238 | p->mode = | 238 | p->mode = |
239 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CTA; | 239 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CTA; |
240 | break; | 240 | break; |
241 | case NVGPU_COMPUTE_PREEMPTION_MODE_CILP: | 241 | case NVGPU_PREEMPTION_MODE_COMPUTE_CILP: |
242 | gr_ctx->compute_preempt_mode = | 242 | gr_ctx->compute_preempt_mode = |
243 | NVGPU_COMPUTE_PREEMPTION_MODE_CILP; | 243 | NVGPU_PREEMPTION_MODE_COMPUTE_CILP; |
244 | p->mode = | 244 | p->mode = |
245 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CILP; | 245 | TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CILP; |
246 | break; | 246 | break; |