diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c index ccf51363..5ba9d25b 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c | |||
@@ -237,8 +237,8 @@ static void gk20a_tegra_postscale(struct device *dev, | |||
237 | emc_target = gk20a_tegra_get_emc_rate(g, emc_params); | 237 | emc_target = gk20a_tegra_get_emc_rate(g, emc_params); |
238 | 238 | ||
239 | switch (chip_id) { | 239 | switch (chip_id) { |
240 | case TEGRA_CHIPID_TEGRA12: | 240 | case TEGRA124: |
241 | case TEGRA_CHIPID_TEGRA13: | 241 | case TEGRA132: |
242 | /* T124 and T132 don't apply any rounding. The resulting | 242 | /* T124 and T132 don't apply any rounding. The resulting |
243 | * emc frequency gets implicitly rounded up after issuing | 243 | * emc frequency gets implicitly rounded up after issuing |
244 | * the clock_set_request. | 244 | * the clock_set_request. |
@@ -248,7 +248,7 @@ static void gk20a_tegra_postscale(struct device *dev, | |||
248 | tegra_emc_round_rate_updown(emc_target, true); | 248 | tegra_emc_round_rate_updown(emc_target, true); |
249 | break; | 249 | break; |
250 | 250 | ||
251 | case TEGRA_CHIPID_TEGRA21: | 251 | case TEGRA210: |
252 | emc_freq_lower = (unsigned long) | 252 | emc_freq_lower = (unsigned long) |
253 | tegra_emc_round_rate_updown(emc_target, false); | 253 | tegra_emc_round_rate_updown(emc_target, false); |
254 | emc_freq_upper = (unsigned long) | 254 | emc_freq_upper = (unsigned long) |
@@ -261,7 +261,6 @@ static void gk20a_tegra_postscale(struct device *dev, | |||
261 | emc_freq_rounded = emc_freq_upper; | 261 | emc_freq_rounded = emc_freq_upper; |
262 | break; | 262 | break; |
263 | 263 | ||
264 | case TEGRA_CHIPID_UNKNOWN: | ||
265 | default: | 264 | default: |
266 | /* a proper rounding function needs to be implemented | 265 | /* a proper rounding function needs to be implemented |
267 | * for emc in t18x */ | 266 | * for emc in t18x */ |
@@ -300,19 +299,18 @@ static void gk20a_tegra_prescale(struct device *dev) | |||
300 | static void gk20a_tegra_calibrate_emc(struct device *dev, | 299 | static void gk20a_tegra_calibrate_emc(struct device *dev, |
301 | struct gk20a_emc_params *emc_params) | 300 | struct gk20a_emc_params *emc_params) |
302 | { | 301 | { |
303 | enum tegra_chipid cid = tegra_get_chipid(); | 302 | enum tegra_chipid cid = tegra_get_chip_id(); |
304 | long gpu_bw, emc_bw; | 303 | long gpu_bw, emc_bw; |
305 | 304 | ||
306 | /* store gpu bw based on soc */ | 305 | /* store gpu bw based on soc */ |
307 | switch (cid) { | 306 | switch (cid) { |
308 | case TEGRA_CHIPID_TEGRA21: | 307 | case TEGRA210: |
309 | gpu_bw = TEGRA_GM20B_BW_PER_FREQ; | 308 | gpu_bw = TEGRA_GM20B_BW_PER_FREQ; |
310 | break; | 309 | break; |
311 | case TEGRA_CHIPID_TEGRA12: | 310 | case TEGRA124: |
312 | case TEGRA_CHIPID_TEGRA13: | 311 | case TEGRA132: |
313 | gpu_bw = TEGRA_GK20A_BW_PER_FREQ; | 312 | gpu_bw = TEGRA_GK20A_BW_PER_FREQ; |
314 | break; | 313 | break; |
315 | case TEGRA_CHIPID_UNKNOWN: | ||
316 | default: | 314 | default: |
317 | gpu_bw = 0; | 315 | gpu_bw = 0; |
318 | break; | 316 | break; |
@@ -926,7 +924,7 @@ static int gk20a_tegra_probe(struct device *dev) | |||
926 | /* WAR for bug 1547668: Disable railgating and scaling irrespective of | 924 | /* WAR for bug 1547668: Disable railgating and scaling irrespective of |
927 | * platform data if the rework has not been made. */ | 925 | * platform data if the rework has not been made. */ |
928 | 926 | ||
929 | if (tegra_get_chipid() == TEGRA_CHIPID_TEGRA21) { | 927 | if (tegra_get_chip_id() == TEGRA210) { |
930 | np = of_find_node_by_path("/gpu-dvfs-rework"); | 928 | np = of_find_node_by_path("/gpu-dvfs-rework"); |
931 | if (!(np && of_device_is_available(np))) { | 929 | if (!(np && of_device_is_available(np))) { |
932 | platform->devfreq_governor = ""; | 930 | platform->devfreq_governor = ""; |
@@ -934,7 +932,7 @@ static int gk20a_tegra_probe(struct device *dev) | |||
934 | } | 932 | } |
935 | } | 933 | } |
936 | 934 | ||
937 | if (tegra_get_chipid() == TEGRA_CHIPID_TEGRA13) | 935 | if (tegra_get_chip_id() == TEGRA132) |
938 | platform->soc_name = "tegra13x"; | 936 | platform->soc_name = "tegra13x"; |
939 | 937 | ||
940 | platform->g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem; | 938 | platform->g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem; |