diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
50 files changed, 480 insertions, 475 deletions
diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.c b/drivers/gpu/nvgpu/boardobj/boardobj.c index 5f726935..b7892c78 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobj.c +++ b/drivers/gpu/nvgpu/boardobj/boardobj.c | |||
@@ -26,7 +26,7 @@ | |||
26 | #include "boardobj.h" | 26 | #include "boardobj.h" |
27 | #include "ctrl/ctrlboardobj.h" | 27 | #include "ctrl/ctrlboardobj.h" |
28 | 28 | ||
29 | u32 boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, | 29 | int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, |
30 | u16 size, void *args) | 30 | u16 size, void *args) |
31 | { | 31 | { |
32 | struct boardobj *pboardobj = NULL; | 32 | struct boardobj *pboardobj = NULL; |
@@ -61,7 +61,7 @@ u32 boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj, | |||
61 | return 0; | 61 | return 0; |
62 | } | 62 | } |
63 | 63 | ||
64 | u32 boardobj_destruct_super(struct boardobj *pboardobj) | 64 | int boardobj_destruct_super(struct boardobj *pboardobj) |
65 | { | 65 | { |
66 | struct gk20a *g = pboardobj->g; | 66 | struct gk20a *g = pboardobj->g; |
67 | 67 | ||
@@ -86,7 +86,7 @@ bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj, | |||
86 | return (0 != (pboardobj->type_mask & BIT(type))); | 86 | return (0 != (pboardobj->type_mask & BIT(type))); |
87 | } | 87 | } |
88 | 88 | ||
89 | u32 boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, | 89 | int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj, |
90 | struct nv_pmu_boardobj *pmudata) | 90 | struct nv_pmu_boardobj *pmudata) |
91 | { | 91 | { |
92 | nvgpu_log_info(g, " "); | 92 | nvgpu_log_info(g, " "); |
diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.h b/drivers/gpu/nvgpu/boardobj/boardobj.h index 8fc8d1cc..4df14aaa 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobj.h +++ b/drivers/gpu/nvgpu/boardobj/boardobj.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -42,14 +42,14 @@ typedef bool boardobj_implements(struct gk20a *g, struct boardobj *pboardobj, | |||
42 | * description structure, describing this BOARDOBJ board device to the PMU. | 42 | * description structure, describing this BOARDOBJ board device to the PMU. |
43 | * | 43 | * |
44 | */ | 44 | */ |
45 | typedef u32 boardobj_pmudatainit(struct gk20a *g, struct boardobj *pboardobj, | 45 | typedef int boardobj_pmudatainit(struct gk20a *g, struct boardobj *pboardobj, |
46 | struct nv_pmu_boardobj *pmudata); | 46 | struct nv_pmu_boardobj *pmudata); |
47 | 47 | ||
48 | /* | 48 | /* |
49 | * Constructor for the base Board Object. Called by each device-specific | 49 | * Constructor for the base Board Object. Called by each device-specific |
50 | * implementation of the BOARDOBJ interface to initialize the board object. | 50 | * implementation of the BOARDOBJ interface to initialize the board object. |
51 | */ | 51 | */ |
52 | typedef u32 boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, | 52 | typedef int boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, |
53 | u16 size, void *args); | 53 | u16 size, void *args); |
54 | 54 | ||
55 | /* | 55 | /* |
@@ -58,7 +58,7 @@ typedef u32 boardobj_construct(struct gk20a *g, struct boardobj **pboardobj, | |||
58 | * This has to be explicitly set by each device that extends from the | 58 | * This has to be explicitly set by each device that extends from the |
59 | * board object. | 59 | * board object. |
60 | */ | 60 | */ |
61 | typedef u32 boardobj_destruct(struct boardobj *pboardobj); | 61 | typedef int boardobj_destruct(struct boardobj *pboardobj); |
62 | 62 | ||
63 | /* | 63 | /* |
64 | * Base Class for all physical or logical device on the PCB. | 64 | * Base Class for all physical or logical device on the PCB. |
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c index e0ab67be..e3b69d4b 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c | |||
@@ -32,10 +32,10 @@ static boardobjgrp_objgetnext boardobjgrp_objgetnext_final; | |||
32 | static boardobjgrp_objremoveanddestroy boardobjgrp_objremoveanddestroy_final; | 32 | static boardobjgrp_objremoveanddestroy boardobjgrp_objremoveanddestroy_final; |
33 | static boardobjgrp_pmudatainstget boardobjgrp_pmudatainstget_stub; | 33 | static boardobjgrp_pmudatainstget boardobjgrp_pmudatainstget_stub; |
34 | static boardobjgrp_pmustatusinstget boardobjgrp_pmustatusinstget_stub; | 34 | static boardobjgrp_pmustatusinstget boardobjgrp_pmustatusinstget_stub; |
35 | static u32 boardobjgrp_pmucmdsend(struct gk20a *g, | 35 | static int boardobjgrp_pmucmdsend(struct gk20a *g, |
36 | struct boardobjgrp *pboardobjgrp, | 36 | struct boardobjgrp *pboardobjgrp, |
37 | struct boardobjgrp_pmu_cmd *pcmd); | 37 | struct boardobjgrp_pmu_cmd *pcmd); |
38 | static u32 boardobjgrp_pmucmdsend_rpc(struct gk20a *g, | 38 | static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, |
39 | struct boardobjgrp *pboardobjgrp, | 39 | struct boardobjgrp *pboardobjgrp, |
40 | struct boardobjgrp_pmu_cmd *pcmd, | 40 | struct boardobjgrp_pmu_cmd *pcmd, |
41 | bool copy_out); | 41 | bool copy_out); |
@@ -48,7 +48,8 @@ struct boardobjgrp_pmucmdhandler_params { | |||
48 | u32 success; | 48 | u32 success; |
49 | }; | 49 | }; |
50 | 50 | ||
51 | u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp) | 51 | int boardobjgrp_construct_super(struct gk20a *g, |
52 | struct boardobjgrp *pboardobjgrp) | ||
52 | { | 53 | { |
53 | nvgpu_log_info(g, " "); | 54 | nvgpu_log_info(g, " "); |
54 | 55 | ||
@@ -102,7 +103,7 @@ u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgr | |||
102 | return 0; | 103 | return 0; |
103 | } | 104 | } |
104 | 105 | ||
105 | u32 boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) | 106 | int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) |
106 | { | 107 | { |
107 | struct gk20a *g = pboardobjgrp->g; | 108 | struct gk20a *g = pboardobjgrp->g; |
108 | 109 | ||
@@ -119,12 +120,12 @@ u32 boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp) | |||
119 | return pboardobjgrp->destruct(pboardobjgrp); | 120 | return pboardobjgrp->destruct(pboardobjgrp); |
120 | } | 121 | } |
121 | 122 | ||
122 | u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) | 123 | int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) |
123 | { | 124 | { |
124 | struct boardobj *pboardobj; | 125 | struct boardobj *pboardobj; |
125 | struct gk20a *g = pboardobjgrp->g; | 126 | struct gk20a *g = pboardobjgrp->g; |
126 | u32 status = 0; | 127 | int status = 0; |
127 | u32 stat; | 128 | int stat; |
128 | u8 index; | 129 | u8 index; |
129 | 130 | ||
130 | nvgpu_log_info(g, " "); | 131 | nvgpu_log_info(g, " "); |
@@ -174,7 +175,7 @@ u32 boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) | |||
174 | return status; | 175 | return status; |
175 | } | 176 | } |
176 | 177 | ||
177 | u32 boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp | 178 | int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp |
178 | *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, | 179 | *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, |
179 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) | 180 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) |
180 | { | 181 | { |
@@ -190,7 +191,7 @@ u32 boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp | |||
190 | return 0; | 191 | return 0; |
191 | } | 192 | } |
192 | 193 | ||
193 | u32 boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp | 194 | int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp |
194 | *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, | 195 | *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, |
195 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) | 196 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) |
196 | { | 197 | { |
@@ -206,7 +207,7 @@ u32 boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp | |||
206 | return 0; | 207 | return 0; |
207 | } | 208 | } |
208 | 209 | ||
209 | u32 boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, | 210 | int boardobjgrp_pmucmd_destroy_impl(struct gk20a *g, |
210 | struct boardobjgrp_pmu_cmd *cmd) | 211 | struct boardobjgrp_pmu_cmd *cmd) |
211 | { | 212 | { |
212 | struct nvgpu_mem *mem = &cmd->surf.sysmem_desc; | 213 | struct nvgpu_mem *mem = &cmd->surf.sysmem_desc; |
@@ -242,11 +243,11 @@ int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g, | |||
242 | return err; | 243 | return err; |
243 | } | 244 | } |
244 | 245 | ||
245 | u32 boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, | 246 | int boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g, |
246 | struct boardobjgrp *pboardobjgrp, | 247 | struct boardobjgrp *pboardobjgrp, |
247 | struct boardobjgrp_pmu_cmd *pcmd) | 248 | struct boardobjgrp_pmu_cmd *pcmd) |
248 | { | 249 | { |
249 | u32 status = 0; | 250 | int status = 0; |
250 | struct nvgpu_mem *sysmem_desc = &pcmd->surf.sysmem_desc; | 251 | struct nvgpu_mem *sysmem_desc = &pcmd->surf.sysmem_desc; |
251 | 252 | ||
252 | nvgpu_log_info(g, " "); | 253 | nvgpu_log_info(g, " "); |
@@ -271,10 +272,10 @@ boardobjgrp_pmucmd_pmuinithandle_exit: | |||
271 | return status; | 272 | return status; |
272 | } | 273 | } |
273 | 274 | ||
274 | u32 boardobjgrp_pmuinithandle_impl(struct gk20a *g, | 275 | int boardobjgrp_pmuinithandle_impl(struct gk20a *g, |
275 | struct boardobjgrp *pboardobjgrp) | 276 | struct boardobjgrp *pboardobjgrp) |
276 | { | 277 | { |
277 | u32 status = 0; | 278 | int status = 0; |
278 | 279 | ||
279 | nvgpu_log_info(g, " "); | 280 | nvgpu_log_info(g, " "); |
280 | 281 | ||
@@ -310,7 +311,7 @@ boardobjgrp_pmuinithandle_exit: | |||
310 | } | 311 | } |
311 | 312 | ||
312 | 313 | ||
313 | u32 boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp | 314 | int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp |
314 | *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, | 315 | *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, |
315 | struct boardobjgrpmask *mask) | 316 | struct boardobjgrpmask *mask) |
316 | { | 317 | { |
@@ -331,7 +332,7 @@ u32 boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp | |||
331 | return 0; | 332 | return 0; |
332 | } | 333 | } |
333 | 334 | ||
334 | static u32 boardobjgrp_pmudatainstget_stub(struct gk20a *g, | 335 | static int boardobjgrp_pmudatainstget_stub(struct gk20a *g, |
335 | struct nv_pmu_boardobjgrp *boardobjgrppmu, | 336 | struct nv_pmu_boardobjgrp *boardobjgrppmu, |
336 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) | 337 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) |
337 | { | 338 | { |
@@ -340,7 +341,7 @@ static u32 boardobjgrp_pmudatainstget_stub(struct gk20a *g, | |||
340 | } | 341 | } |
341 | 342 | ||
342 | 343 | ||
343 | static u32 boardobjgrp_pmustatusinstget_stub(struct gk20a *g, | 344 | static int boardobjgrp_pmustatusinstget_stub(struct gk20a *g, |
344 | void *pboardobjgrppmu, | 345 | void *pboardobjgrppmu, |
345 | struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx) | 346 | struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx) |
346 | { | 347 | { |
@@ -348,11 +349,11 @@ static u32 boardobjgrp_pmustatusinstget_stub(struct gk20a *g, | |||
348 | return -EINVAL; | 349 | return -EINVAL; |
349 | } | 350 | } |
350 | 351 | ||
351 | u32 boardobjgrp_pmudatainit_legacy(struct gk20a *g, | 352 | int boardobjgrp_pmudatainit_legacy(struct gk20a *g, |
352 | struct boardobjgrp *pboardobjgrp, | 353 | struct boardobjgrp *pboardobjgrp, |
353 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 354 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
354 | { | 355 | { |
355 | u32 status = 0; | 356 | int status = 0; |
356 | struct boardobj *pboardobj = NULL; | 357 | struct boardobj *pboardobj = NULL; |
357 | struct nv_pmu_boardobj *ppmudata = NULL; | 358 | struct nv_pmu_boardobj *ppmudata = NULL; |
358 | u8 index; | 359 | u8 index; |
@@ -401,10 +402,10 @@ boardobjgrppmudatainit_legacy_done: | |||
401 | return status; | 402 | return status; |
402 | } | 403 | } |
403 | 404 | ||
404 | u32 boardobjgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp | 405 | int boardobjgrp_pmudatainit_super(struct gk20a *g, struct boardobjgrp |
405 | *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 406 | *pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
406 | { | 407 | { |
407 | u32 status = 0; | 408 | int status = 0; |
408 | struct boardobj *pboardobj = NULL; | 409 | struct boardobj *pboardobj = NULL; |
409 | struct nv_pmu_boardobj *ppmudata = NULL; | 410 | struct nv_pmu_boardobj *ppmudata = NULL; |
410 | u8 index; | 411 | u8 index; |
@@ -476,9 +477,9 @@ static int check_boardobjgrp_param(struct gk20a *g, | |||
476 | return 0; | 477 | return 0; |
477 | } | 478 | } |
478 | 479 | ||
479 | u32 boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) | 480 | int boardobjgrp_pmuset_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp) |
480 | { | 481 | { |
481 | u32 status = 0; | 482 | int status = 0; |
482 | struct boardobjgrp_pmu_cmd *pcmd = | 483 | struct boardobjgrp_pmu_cmd *pcmd = |
483 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); | 484 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); |
484 | 485 | ||
@@ -537,10 +538,11 @@ boardobjgrp_pmuset_exit: | |||
537 | return status; | 538 | return status; |
538 | } | 539 | } |
539 | 540 | ||
540 | u32 boardobjgrp_pmuset_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp) | 541 | int boardobjgrp_pmuset_impl_v1(struct gk20a *g, |
542 | struct boardobjgrp *pboardobjgrp) | ||
541 | { | 543 | { |
542 | struct nvgpu_pmu *pmu = &g->pmu; | 544 | struct nvgpu_pmu *pmu = &g->pmu; |
543 | u32 status = 0; | 545 | int status = 0; |
544 | struct boardobjgrp_pmu_cmd *pcmd = | 546 | struct boardobjgrp_pmu_cmd *pcmd = |
545 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); | 547 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.set); |
546 | 548 | ||
@@ -593,11 +595,11 @@ boardobjgrp_pmuset_exit: | |||
593 | return status; | 595 | return status; |
594 | } | 596 | } |
595 | 597 | ||
596 | u32 | 598 | int |
597 | boardobjgrp_pmugetstatus_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, | 599 | boardobjgrp_pmugetstatus_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, |
598 | struct boardobjgrpmask *mask) | 600 | struct boardobjgrpmask *mask) |
599 | { | 601 | { |
600 | u32 status = 0; | 602 | int status = 0; |
601 | struct boardobjgrp_pmu_cmd *pcmd = | 603 | struct boardobjgrp_pmu_cmd *pcmd = |
602 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); | 604 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); |
603 | struct boardobjgrp_pmu_cmd *pset = | 605 | struct boardobjgrp_pmu_cmd *pset = |
@@ -665,12 +667,12 @@ boardobjgrp_pmugetstatus_exit: | |||
665 | return status; | 667 | return status; |
666 | } | 668 | } |
667 | 669 | ||
668 | u32 | 670 | int |
669 | boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, | 671 | boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, |
670 | struct boardobjgrpmask *mask) | 672 | struct boardobjgrpmask *mask) |
671 | { | 673 | { |
672 | struct nvgpu_pmu *pmu = &g->pmu; | 674 | struct nvgpu_pmu *pmu = &g->pmu; |
673 | u32 status = 0; | 675 | int status = 0; |
674 | struct boardobjgrp_pmu_cmd *pcmd = | 676 | struct boardobjgrp_pmu_cmd *pcmd = |
675 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); | 677 | (struct boardobjgrp_pmu_cmd *)(&pboardobjgrp->pmu.getstatus); |
676 | 678 | ||
@@ -728,7 +730,7 @@ boardobjgrp_pmugetstatus_exit: | |||
728 | return status; | 730 | return status; |
729 | } | 731 | } |
730 | 732 | ||
731 | static u32 | 733 | static int |
732 | boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, | 734 | boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, |
733 | struct boardobj *pboardobj, u8 index) | 735 | struct boardobj *pboardobj, u8 index) |
734 | { | 736 | { |
@@ -761,8 +763,8 @@ boardobjgrp_objinsert_final(struct boardobjgrp *pboardobjgrp, | |||
761 | } | 763 | } |
762 | 764 | ||
763 | pboardobjgrp->ppobjects[index] = pboardobj; | 765 | pboardobjgrp->ppobjects[index] = pboardobj; |
764 | pboardobjgrp->objmaxidx = BOARDOBJGRP_IS_EMPTY(pboardobjgrp) ? | 766 | pboardobjgrp->objmaxidx = (u8)(BOARDOBJGRP_IS_EMPTY(pboardobjgrp) ? |
765 | index : max(pboardobjgrp->objmaxidx, index); | 767 | index : max(pboardobjgrp->objmaxidx, index)); |
766 | pboardobj->idx = index; | 768 | pboardobj->idx = index; |
767 | 769 | ||
768 | pboardobjgrp->objmask |= BIT(index); | 770 | pboardobjgrp->objmask |= BIT(index); |
@@ -835,12 +837,12 @@ static struct boardobj *boardobjgrp_objgetnext_final( | |||
835 | return pboardobjnext; | 837 | return pboardobjnext; |
836 | } | 838 | } |
837 | 839 | ||
838 | static u32 boardobjgrp_objremoveanddestroy_final( | 840 | static int boardobjgrp_objremoveanddestroy_final( |
839 | struct boardobjgrp *pboardobjgrp, | 841 | struct boardobjgrp *pboardobjgrp, |
840 | u8 index) | 842 | u8 index) |
841 | { | 843 | { |
842 | u32 status = 0; | 844 | int status = 0; |
843 | u32 stat; | 845 | int stat; |
844 | struct gk20a *g = pboardobjgrp->g; | 846 | struct gk20a *g = pboardobjgrp->g; |
845 | 847 | ||
846 | nvgpu_log_info(g, " "); | 848 | nvgpu_log_info(g, " "); |
@@ -938,7 +940,7 @@ static void boardobjgrp_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
938 | } | 940 | } |
939 | } | 941 | } |
940 | 942 | ||
941 | static u32 boardobjgrp_pmucmdsend(struct gk20a *g, | 943 | static int boardobjgrp_pmucmdsend(struct gk20a *g, |
942 | struct boardobjgrp *pboardobjgrp, | 944 | struct boardobjgrp *pboardobjgrp, |
943 | struct boardobjgrp_pmu_cmd *pcmd) | 945 | struct boardobjgrp_pmu_cmd *pcmd) |
944 | { | 946 | { |
@@ -947,7 +949,7 @@ static u32 boardobjgrp_pmucmdsend(struct gk20a *g, | |||
947 | struct nv_pmu_boardobj_cmd_grp *pgrpcmd; | 949 | struct nv_pmu_boardobj_cmd_grp *pgrpcmd; |
948 | struct pmu_cmd cmd; | 950 | struct pmu_cmd cmd; |
949 | u32 seqdesc; | 951 | u32 seqdesc; |
950 | u32 status = 0; | 952 | int status = 0; |
951 | 953 | ||
952 | nvgpu_log_info(g, " "); | 954 | nvgpu_log_info(g, " "); |
953 | 955 | ||
@@ -1009,7 +1011,7 @@ boardobjgrp_pmucmdsend_exit: | |||
1009 | return status; | 1011 | return status; |
1010 | } | 1012 | } |
1011 | 1013 | ||
1012 | static u32 boardobjgrp_pmucmdsend_rpc(struct gk20a *g, | 1014 | static int boardobjgrp_pmucmdsend_rpc(struct gk20a *g, |
1013 | struct boardobjgrp *pboardobjgrp, | 1015 | struct boardobjgrp *pboardobjgrp, |
1014 | struct boardobjgrp_pmu_cmd *pcmd, | 1016 | struct boardobjgrp_pmu_cmd *pcmd, |
1015 | bool copy_out) | 1017 | bool copy_out) |
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h index 8fc7136f..625e7912 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h | |||
@@ -40,13 +40,13 @@ struct pmu_surface; | |||
40 | * Board Object Group destructor. | 40 | * Board Object Group destructor. |
41 | * | 41 | * |
42 | */ | 42 | */ |
43 | typedef u32 boardobjgrp_destruct(struct boardobjgrp *pboardobjgrp); | 43 | typedef int boardobjgrp_destruct(struct boardobjgrp *pboardobjgrp); |
44 | 44 | ||
45 | /* | 45 | /* |
46 | * Inserts a previously constructed Board Object into a Board Object Group for | 46 | * Inserts a previously constructed Board Object into a Board Object Group for |
47 | * tracking. Objects are inserted in the array based on the given index. | 47 | * tracking. Objects are inserted in the array based on the given index. |
48 | */ | 48 | */ |
49 | typedef u32 boardobjgrp_objinsert(struct boardobjgrp *pboardobjgrp, | 49 | typedef int boardobjgrp_objinsert(struct boardobjgrp *pboardobjgrp, |
50 | struct boardobj *pboardobj, u8 index); | 50 | struct boardobj *pboardobj, u8 index); |
51 | 51 | ||
52 | /* | 52 | /* |
@@ -68,7 +68,7 @@ typedef struct boardobj *boardobjgrp_objgetnext( | |||
68 | * Board Object Group Remover and destructor. This is used to remove and | 68 | * Board Object Group Remover and destructor. This is used to remove and |
69 | * destruct specific entry from the Board Object Group. | 69 | * destruct specific entry from the Board Object Group. |
70 | */ | 70 | */ |
71 | typedef u32 boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, | 71 | typedef int boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, |
72 | u8 index); | 72 | u8 index); |
73 | 73 | ||
74 | /* | 74 | /* |
@@ -76,14 +76,14 @@ typedef u32 boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp, | |||
76 | * for the constructed PMU CMDs, and then sets the object via the | 76 | * for the constructed PMU CMDs, and then sets the object via the |
77 | * PMU_BOARDOBJ_CMD_GRP interface (if constructed). | 77 | * PMU_BOARDOBJ_CMD_GRP interface (if constructed). |
78 | */ | 78 | */ |
79 | typedef u32 boardobjgrp_pmuinithandle(struct gk20a *g, | 79 | typedef int boardobjgrp_pmuinithandle(struct gk20a *g, |
80 | struct boardobjgrp *pboardobjGrp); | 80 | struct boardobjgrp *pboardobjGrp); |
81 | 81 | ||
82 | /* | 82 | /* |
83 | * Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver<->PMU description | 83 | * Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver<->PMU description |
84 | * header structure, more specifically a mask of BOARDOBJs. | 84 | * header structure, more specifically a mask of BOARDOBJs. |
85 | */ | 85 | */ |
86 | typedef u32 boardobjgrp_pmuhdrdatainit(struct gk20a *g, | 86 | typedef int boardobjgrp_pmuhdrdatainit(struct gk20a *g, |
87 | struct boardobjgrp *pboardobjgrp, | 87 | struct boardobjgrp *pboardobjgrp, |
88 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, | 88 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, |
89 | struct boardobjgrpmask *mask); | 89 | struct boardobjgrpmask *mask); |
@@ -92,7 +92,7 @@ typedef u32 boardobjgrp_pmuhdrdatainit(struct gk20a *g, | |||
92 | * Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver->PMU description | 92 | * Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver->PMU description |
93 | * structure, describing the BOARDOBJGRP and all of its BOARDOBJs to the PMU. | 93 | * structure, describing the BOARDOBJGRP and all of its BOARDOBJs to the PMU. |
94 | */ | 94 | */ |
95 | typedef u32 boardobjgrp_pmudatainit(struct gk20a *g, | 95 | typedef int boardobjgrp_pmudatainit(struct gk20a *g, |
96 | struct boardobjgrp *pboardobjgrp, | 96 | struct boardobjgrp *pboardobjgrp, |
97 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu); | 97 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu); |
98 | 98 | ||
@@ -101,22 +101,22 @@ typedef u32 boardobjgrp_pmudatainit(struct gk20a *g, | |||
101 | * This interface leverages @ref boardobjgrp_pmudatainit to populate the | 101 | * This interface leverages @ref boardobjgrp_pmudatainit to populate the |
102 | * structure. | 102 | * structure. |
103 | */ | 103 | */ |
104 | typedef u32 boardobjgrp_pmuset(struct gk20a *g, | 104 | typedef int boardobjgrp_pmuset(struct gk20a *g, |
105 | struct boardobjgrp *pboardobjgrp); | 105 | struct boardobjgrp *pboardobjgrp); |
106 | 106 | ||
107 | /* | 107 | /* |
108 | * Gets the dynamic status of the PMU BOARDOBJGRP via the | 108 | * Gets the dynamic status of the PMU BOARDOBJGRP via the |
109 | * PMU_BOARDOBJ_CMD_GRP GET_STATUS interface. | 109 | * PMU_BOARDOBJ_CMD_GRP GET_STATUS interface. |
110 | */ | 110 | */ |
111 | typedef u32 boardobjgrp_pmugetstatus(struct gk20a *g, | 111 | typedef int boardobjgrp_pmugetstatus(struct gk20a *g, |
112 | struct boardobjgrp *pboardobjgrp, | 112 | struct boardobjgrp *pboardobjgrp, |
113 | struct boardobjgrpmask *mask); | 113 | struct boardobjgrpmask *mask); |
114 | 114 | ||
115 | typedef u32 boardobjgrp_pmudatainstget(struct gk20a *g, | 115 | typedef int boardobjgrp_pmudatainstget(struct gk20a *g, |
116 | struct nv_pmu_boardobjgrp *boardobjgrppmu, | 116 | struct nv_pmu_boardobjgrp *boardobjgrppmu, |
117 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx); | 117 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx); |
118 | 118 | ||
119 | typedef u32 boardobjgrp_pmustatusinstget(struct gk20a *g, void *pboardobjgrppmu, | 119 | typedef int boardobjgrp_pmustatusinstget(struct gk20a *g, void *pboardobjgrppmu, |
120 | struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx); | 120 | struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx); |
121 | 121 | ||
122 | /* | 122 | /* |
@@ -153,7 +153,7 @@ struct boardobjgrp_pmu { | |||
153 | * CMD. This provides the various information describing the PMU CMD including | 153 | * CMD. This provides the various information describing the PMU CMD including |
154 | * the CMD and MSG ID and the size of the various sturctures in the payload. | 154 | * the CMD and MSG ID and the size of the various sturctures in the payload. |
155 | */ | 155 | */ |
156 | typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g, | 156 | typedef int boardobjgrp_pmucmd_construct(struct gk20a *g, |
157 | struct boardobjgrp *pboardobjgrp, | 157 | struct boardobjgrp *pboardobjgrp, |
158 | struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, | 158 | struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, |
159 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); | 159 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); |
@@ -161,7 +161,7 @@ typedef u32 boardobjgrp_pmucmd_construct(struct gk20a *g, | |||
161 | /* | 161 | /* |
162 | * Destroys BOARDOBJGRP PMU SW state. CMD. | 162 | * Destroys BOARDOBJGRP PMU SW state. CMD. |
163 | */ | 163 | */ |
164 | typedef u32 boardobjgrp_pmucmd_destroy(struct gk20a *g, | 164 | typedef int boardobjgrp_pmucmd_destroy(struct gk20a *g, |
165 | struct boardobjgrp_pmu_cmd *cmd); | 165 | struct boardobjgrp_pmu_cmd *cmd); |
166 | 166 | ||
167 | /* | 167 | /* |
@@ -169,7 +169,7 @@ typedef u32 boardobjgrp_pmucmd_destroy(struct gk20a *g, | |||
169 | * PMU CMD payload within both the PMU and driver so that it can be referenced | 169 | * PMU CMD payload within both the PMU and driver so that it can be referenced |
170 | * at run-time. | 170 | * at run-time. |
171 | */ | 171 | */ |
172 | typedef u32 boardobjgrp_pmucmd_pmuinithandle(struct gk20a *g, | 172 | typedef int boardobjgrp_pmucmd_pmuinithandle(struct gk20a *g, |
173 | struct boardobjgrp *pboardobjgrp, | 173 | struct boardobjgrp *pboardobjgrp, |
174 | struct boardobjgrp_pmu_cmd *cmd); | 174 | struct boardobjgrp_pmu_cmd *cmd); |
175 | 175 | ||
@@ -352,7 +352,8 @@ do { \ | |||
352 | 352 | ||
353 | /* ------------------------ Function Prototypes ----------------------------- */ | 353 | /* ------------------------ Function Prototypes ----------------------------- */ |
354 | /* Constructor and destructor */ | 354 | /* Constructor and destructor */ |
355 | u32 boardobjgrp_construct_super(struct gk20a *g, struct boardobjgrp *pboardobjgrp); | 355 | int boardobjgrp_construct_super(struct gk20a *g, |
356 | struct boardobjgrp *pboardobjgrp); | ||
356 | boardobjgrp_destruct boardobjgrp_destruct_impl; | 357 | boardobjgrp_destruct boardobjgrp_destruct_impl; |
357 | boardobjgrp_destruct boardobjgrp_destruct_super; | 358 | boardobjgrp_destruct boardobjgrp_destruct_super; |
358 | 359 | ||
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c index a7da8064..b26f8ecb 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.c | |||
@@ -27,10 +27,10 @@ | |||
27 | #include "boardobjgrp.h" | 27 | #include "boardobjgrp.h" |
28 | #include "boardobjgrpmask.h" | 28 | #include "boardobjgrpmask.h" |
29 | 29 | ||
30 | u32 boardobjgrpconstruct_e255(struct gk20a *g, | 30 | int boardobjgrpconstruct_e255(struct gk20a *g, |
31 | struct boardobjgrp_e255 *pboardobjgrp_e255) | 31 | struct boardobjgrp_e255 *pboardobjgrp_e255) |
32 | { | 32 | { |
33 | u32 status = 0; | 33 | int status = 0; |
34 | u8 objslots; | 34 | u8 objslots; |
35 | 35 | ||
36 | nvgpu_log_info(g, " "); | 36 | nvgpu_log_info(g, " "); |
@@ -58,14 +58,14 @@ boardobjgrpconstruct_e255_exit: | |||
58 | return status; | 58 | return status; |
59 | } | 59 | } |
60 | 60 | ||
61 | u32 boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, | 61 | int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g, |
62 | struct boardobjgrp *pboardobjgrp, | 62 | struct boardobjgrp *pboardobjgrp, |
63 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, | 63 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, |
64 | struct boardobjgrpmask *mask) | 64 | struct boardobjgrpmask *mask) |
65 | { | 65 | { |
66 | struct nv_pmu_boardobjgrp_e255 *pgrpe255 = | 66 | struct nv_pmu_boardobjgrp_e255 *pgrpe255 = |
67 | (struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu; | 67 | (struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu; |
68 | u32 status; | 68 | int status; |
69 | 69 | ||
70 | nvgpu_log_info(g, " "); | 70 | nvgpu_log_info(g, " "); |
71 | 71 | ||
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h index 76aa902a..10cd95c6 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e255.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -43,7 +43,8 @@ struct boardobjgrp_e255 { | |||
43 | boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) | 43 | boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) |
44 | 44 | ||
45 | /* Constructor and destructor */ | 45 | /* Constructor and destructor */ |
46 | u32 boardobjgrpconstruct_e255(struct gk20a *g, struct boardobjgrp_e255 *pboardobjgrp); | 46 | int boardobjgrpconstruct_e255(struct gk20a *g, |
47 | struct boardobjgrp_e255 *pboardobjgrp); | ||
47 | boardobjgrp_destruct boardobjgrpdestruct_e255; | 48 | boardobjgrp_destruct boardobjgrpdestruct_e255; |
48 | boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e255; | 49 | boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e255; |
49 | 50 | ||
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c index 60e5caf6..48322310 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.c | |||
@@ -28,10 +28,10 @@ | |||
28 | #include "boardobjgrpmask.h" | 28 | #include "boardobjgrpmask.h" |
29 | 29 | ||
30 | 30 | ||
31 | u32 boardobjgrpconstruct_e32(struct gk20a *g, | 31 | int boardobjgrpconstruct_e32(struct gk20a *g, |
32 | struct boardobjgrp_e32 *pboardobjgrp_e32) | 32 | struct boardobjgrp_e32 *pboardobjgrp_e32) |
33 | { | 33 | { |
34 | u32 status; | 34 | int status; |
35 | u8 objslots; | 35 | u8 objslots; |
36 | 36 | ||
37 | nvgpu_log_info(g, " "); | 37 | nvgpu_log_info(g, " "); |
@@ -58,14 +58,14 @@ boardobjgrpconstruct_e32_exit: | |||
58 | return status; | 58 | return status; |
59 | } | 59 | } |
60 | 60 | ||
61 | u32 boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, | 61 | int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g, |
62 | struct boardobjgrp *pboardobjgrp, | 62 | struct boardobjgrp *pboardobjgrp, |
63 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, | 63 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu, |
64 | struct boardobjgrpmask *mask) | 64 | struct boardobjgrpmask *mask) |
65 | { | 65 | { |
66 | struct nv_pmu_boardobjgrp_e32 *pgrpe32 = | 66 | struct nv_pmu_boardobjgrp_e32 *pgrpe32 = |
67 | (struct nv_pmu_boardobjgrp_e32 *)pboardobjgrppmu; | 67 | (struct nv_pmu_boardobjgrp_e32 *)pboardobjgrppmu; |
68 | u32 status; | 68 | int status; |
69 | 69 | ||
70 | nvgpu_log_info(g, " "); | 70 | nvgpu_log_info(g, " "); |
71 | 71 | ||
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h index 97c737a5..900901bb 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp_e32.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -58,7 +58,8 @@ struct boardobjgrp_e32 { | |||
58 | boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) | 58 | boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu) |
59 | 59 | ||
60 | /* Constructor and destructor */ | 60 | /* Constructor and destructor */ |
61 | u32 boardobjgrpconstruct_e32(struct gk20a *g, struct boardobjgrp_e32 *pboardobjgrp); | 61 | int boardobjgrpconstruct_e32(struct gk20a *g, |
62 | struct boardobjgrp_e32 *pboardobjgrp); | ||
62 | boardobjgrp_destruct boardobjgrpdestruct_e32; | 63 | boardobjgrp_destruct boardobjgrpdestruct_e32; |
63 | boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e32; | 64 | boardobjgrp_pmuhdrdatainit boardobjgrp_pmuhdrdatainit_e32; |
64 | 65 | ||
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c index c3f4f4a5..d957467b 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.c | |||
@@ -221,7 +221,7 @@ u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask) | |||
221 | return result; | 221 | return result; |
222 | } | 222 | } |
223 | 223 | ||
224 | u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) | 224 | int boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) |
225 | { | 225 | { |
226 | u8 index; | 226 | u8 index; |
227 | u8 offset; | 227 | u8 offset; |
@@ -241,7 +241,7 @@ u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx) | |||
241 | return 0; | 241 | return 0; |
242 | } | 242 | } |
243 | 243 | ||
244 | u32 boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx) | 244 | int boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx) |
245 | { | 245 | { |
246 | u8 index; | 246 | u8 index; |
247 | u8 offset; | 247 | u8 offset; |
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h index aacabfe9..c081284a 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrpmask.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -83,8 +83,8 @@ u8 boardobjgrpmask_bitidxlowest(struct boardobjgrpmask *mask); | |||
83 | u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask); | 83 | u8 boardobjgrpmask_bitidxhighest(struct boardobjgrpmask *mask); |
84 | 84 | ||
85 | /* Operations on a single bit of a single mask */ | 85 | /* Operations on a single bit of a single mask */ |
86 | u32 boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx); | 86 | int boardobjgrpmask_bitclr(struct boardobjgrpmask *mask, u8 bitidx); |
87 | u32 boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx); | 87 | int boardobjgrpmask_bitset(struct boardobjgrpmask *mask, u8 bitidx); |
88 | u32 boardobjgrpmask_bitinv(struct boardobjgrpmask *mask, u8 bitidx); | 88 | u32 boardobjgrpmask_bitinv(struct boardobjgrpmask *mask, u8 bitidx); |
89 | bool boardobjgrpmask_bitget(struct boardobjgrpmask *mask, u8 bitidx); | 89 | bool boardobjgrpmask_bitget(struct boardobjgrpmask *mask, u8 bitidx); |
90 | 90 | ||
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c index 9f17d199..c0445e5c 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.c +++ b/drivers/gpu/nvgpu/clk/clk_domain.c | |||
@@ -33,10 +33,10 @@ | |||
33 | 33 | ||
34 | static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs); | 34 | static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs); |
35 | 35 | ||
36 | static u32 devinit_get_clocks_table(struct gk20a *g, | 36 | static int devinit_get_clocks_table(struct gk20a *g, |
37 | struct clk_domains *pdomainobjs); | 37 | struct clk_domains *pdomainobjs); |
38 | 38 | ||
39 | static u32 clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj | 39 | static int clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj |
40 | *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); | 40 | *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); |
41 | 41 | ||
42 | static struct vbios_clocks_table_1x_hal_clock_entry | 42 | static struct vbios_clocks_table_1x_hal_clock_entry |
@@ -120,7 +120,7 @@ static u32 clktranslatehalmumsettoapinumset(u32 clkhaldomains) | |||
120 | return clkapidomains; | 120 | return clkapidomains; |
121 | } | 121 | } |
122 | 122 | ||
123 | static u32 _clk_domains_pmudatainit_3x(struct gk20a *g, | 123 | static int _clk_domains_pmudatainit_3x(struct gk20a *g, |
124 | struct boardobjgrp *pboardobjgrp, | 124 | struct boardobjgrp *pboardobjgrp, |
125 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 125 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
126 | { | 126 | { |
@@ -128,7 +128,7 @@ static u32 _clk_domains_pmudatainit_3x(struct gk20a *g, | |||
128 | (struct nv_pmu_clk_clk_domain_boardobjgrp_set_header *) | 128 | (struct nv_pmu_clk_clk_domain_boardobjgrp_set_header *) |
129 | pboardobjgrppmu; | 129 | pboardobjgrppmu; |
130 | struct clk_domains *pdomains = (struct clk_domains *)pboardobjgrp; | 130 | struct clk_domains *pdomains = (struct clk_domains *)pboardobjgrp; |
131 | u32 status = 0; | 131 | int status = 0; |
132 | 132 | ||
133 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); | 133 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); |
134 | if (status) { | 134 | if (status) { |
@@ -162,7 +162,7 @@ done: | |||
162 | return status; | 162 | return status; |
163 | } | 163 | } |
164 | 164 | ||
165 | static u32 _clk_domains_pmudata_instget(struct gk20a *g, | 165 | static int _clk_domains_pmudata_instget(struct gk20a *g, |
166 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 166 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
167 | struct nv_pmu_boardobj **ppboardobjpmudata, | 167 | struct nv_pmu_boardobj **ppboardobjpmudata, |
168 | u8 idx) | 168 | u8 idx) |
@@ -185,9 +185,9 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g, | |||
185 | return 0; | 185 | return 0; |
186 | } | 186 | } |
187 | 187 | ||
188 | u32 clk_domain_sw_setup(struct gk20a *g) | 188 | int clk_domain_sw_setup(struct gk20a *g) |
189 | { | 189 | { |
190 | u32 status; | 190 | int status; |
191 | struct boardobjgrp *pboardobjgrp = NULL; | 191 | struct boardobjgrp *pboardobjgrp = NULL; |
192 | struct clk_domains *pclkdomainobjs; | 192 | struct clk_domains *pclkdomainobjs; |
193 | struct clk_domain *pdomain; | 193 | struct clk_domain *pdomain; |
@@ -281,9 +281,9 @@ done: | |||
281 | return status; | 281 | return status; |
282 | } | 282 | } |
283 | 283 | ||
284 | u32 clk_domain_pmu_setup(struct gk20a *g) | 284 | int clk_domain_pmu_setup(struct gk20a *g) |
285 | { | 285 | { |
286 | u32 status; | 286 | int status; |
287 | struct boardobjgrp *pboardobjgrp = NULL; | 287 | struct boardobjgrp *pboardobjgrp = NULL; |
288 | 288 | ||
289 | nvgpu_log_info(g, " "); | 289 | nvgpu_log_info(g, " "); |
@@ -300,10 +300,10 @@ u32 clk_domain_pmu_setup(struct gk20a *g) | |||
300 | return status; | 300 | return status; |
301 | } | 301 | } |
302 | 302 | ||
303 | static u32 devinit_get_clocks_table(struct gk20a *g, | 303 | static int devinit_get_clocks_table(struct gk20a *g, |
304 | struct clk_domains *pclkdomainobjs) | 304 | struct clk_domains *pclkdomainobjs) |
305 | { | 305 | { |
306 | u32 status = 0; | 306 | int status = 0; |
307 | u8 *clocks_table_ptr = NULL; | 307 | u8 *clocks_table_ptr = NULL; |
308 | struct vbios_clocks_table_1x_header clocks_table_header = { 0 }; | 308 | struct vbios_clocks_table_1x_header clocks_table_header = { 0 }; |
309 | struct vbios_clocks_table_1x_entry clocks_table_entry = { 0 }; | 309 | struct vbios_clocks_table_1x_entry clocks_table_entry = { 0 }; |
@@ -486,7 +486,7 @@ done: | |||
486 | return status; | 486 | return status; |
487 | } | 487 | } |
488 | 488 | ||
489 | static u32 clkdomainclkproglink_not_supported(struct gk20a *g, | 489 | static int clkdomainclkproglink_not_supported(struct gk20a *g, |
490 | struct clk_pmupstate *pclk, | 490 | struct clk_pmupstate *pclk, |
491 | struct clk_domain *pdomain) | 491 | struct clk_domain *pdomain) |
492 | { | 492 | { |
@@ -520,13 +520,13 @@ static u32 clkdomaingetfpoints_stub( | |||
520 | } | 520 | } |
521 | 521 | ||
522 | 522 | ||
523 | static u32 clk_domain_construct_super(struct gk20a *g, | 523 | static int clk_domain_construct_super(struct gk20a *g, |
524 | struct boardobj **ppboardobj, | 524 | struct boardobj **ppboardobj, |
525 | u16 size, void *pargs) | 525 | u16 size, void *pargs) |
526 | { | 526 | { |
527 | struct clk_domain *pdomain; | 527 | struct clk_domain *pdomain; |
528 | struct clk_domain *ptmpdomain = (struct clk_domain *)pargs; | 528 | struct clk_domain *ptmpdomain = (struct clk_domain *)pargs; |
529 | u32 status = 0; | 529 | int status = 0; |
530 | 530 | ||
531 | status = boardobj_construct_super(g, ppboardobj, | 531 | status = boardobj_construct_super(g, ppboardobj, |
532 | size, pargs); | 532 | size, pargs); |
@@ -557,11 +557,11 @@ static u32 clk_domain_construct_super(struct gk20a *g, | |||
557 | return status; | 557 | return status; |
558 | } | 558 | } |
559 | 559 | ||
560 | static u32 _clk_domain_pmudatainit_3x(struct gk20a *g, | 560 | static int _clk_domain_pmudatainit_3x(struct gk20a *g, |
561 | struct boardobj *board_obj_ptr, | 561 | struct boardobj *board_obj_ptr, |
562 | struct nv_pmu_boardobj *ppmudata) | 562 | struct nv_pmu_boardobj *ppmudata) |
563 | { | 563 | { |
564 | u32 status = 0; | 564 | int status = 0; |
565 | struct clk_domain_3x *pclk_domain_3x; | 565 | struct clk_domain_3x *pclk_domain_3x; |
566 | struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset; | 566 | struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset; |
567 | 567 | ||
@@ -581,7 +581,7 @@ static u32 _clk_domain_pmudatainit_3x(struct gk20a *g, | |||
581 | return status; | 581 | return status; |
582 | } | 582 | } |
583 | 583 | ||
584 | static u32 clk_domain_construct_3x(struct gk20a *g, | 584 | static int clk_domain_construct_3x(struct gk20a *g, |
585 | struct boardobj **ppboardobj, | 585 | struct boardobj **ppboardobj, |
586 | u16 size, void *pargs) | 586 | u16 size, void *pargs) |
587 | { | 587 | { |
@@ -589,7 +589,7 @@ static u32 clk_domain_construct_3x(struct gk20a *g, | |||
589 | struct clk_domain_3x *pdomain; | 589 | struct clk_domain_3x *pdomain; |
590 | struct clk_domain_3x *ptmpdomain = | 590 | struct clk_domain_3x *ptmpdomain = |
591 | (struct clk_domain_3x *)pargs; | 591 | (struct clk_domain_3x *)pargs; |
592 | u32 status = 0; | 592 | int status = 0; |
593 | 593 | ||
594 | ptmpobj->type_mask = BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X); | 594 | ptmpobj->type_mask = BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X); |
595 | status = clk_domain_construct_super(g, ppboardobj, | 595 | status = clk_domain_construct_super(g, ppboardobj, |
@@ -608,11 +608,11 @@ static u32 clk_domain_construct_3x(struct gk20a *g, | |||
608 | return status; | 608 | return status; |
609 | } | 609 | } |
610 | 610 | ||
611 | static u32 clkdomainclkproglink_3x_prog(struct gk20a *g, | 611 | static int clkdomainclkproglink_3x_prog(struct gk20a *g, |
612 | struct clk_pmupstate *pclk, | 612 | struct clk_pmupstate *pclk, |
613 | struct clk_domain *pdomain) | 613 | struct clk_domain *pdomain) |
614 | { | 614 | { |
615 | u32 status = 0; | 615 | int status = 0; |
616 | struct clk_domain_3x_prog *p3xprog = | 616 | struct clk_domain_3x_prog *p3xprog = |
617 | (struct clk_domain_3x_prog *)pdomain; | 617 | (struct clk_domain_3x_prog *)pdomain; |
618 | struct clk_prog *pprog = NULL; | 618 | struct clk_prog *pprog = NULL; |
@@ -822,11 +822,11 @@ done: | |||
822 | return status; | 822 | return status; |
823 | } | 823 | } |
824 | 824 | ||
825 | static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g, | 825 | static int _clk_domain_pmudatainit_3x_prog(struct gk20a *g, |
826 | struct boardobj *board_obj_ptr, | 826 | struct boardobj *board_obj_ptr, |
827 | struct nv_pmu_boardobj *ppmudata) | 827 | struct nv_pmu_boardobj *ppmudata) |
828 | { | 828 | { |
829 | u32 status = 0; | 829 | int status = 0; |
830 | struct clk_domain_3x_prog *pclk_domain_3x_prog; | 830 | struct clk_domain_3x_prog *pclk_domain_3x_prog; |
831 | struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset; | 831 | struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset; |
832 | struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs); | 832 | struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs); |
@@ -860,7 +860,7 @@ static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g, | |||
860 | return status; | 860 | return status; |
861 | } | 861 | } |
862 | 862 | ||
863 | static u32 clk_domain_construct_3x_prog(struct gk20a *g, | 863 | static int clk_domain_construct_3x_prog(struct gk20a *g, |
864 | struct boardobj **ppboardobj, | 864 | struct boardobj **ppboardobj, |
865 | u16 size, void *pargs) | 865 | u16 size, void *pargs) |
866 | { | 866 | { |
@@ -868,7 +868,7 @@ static u32 clk_domain_construct_3x_prog(struct gk20a *g, | |||
868 | struct clk_domain_3x_prog *pdomain; | 868 | struct clk_domain_3x_prog *pdomain; |
869 | struct clk_domain_3x_prog *ptmpdomain = | 869 | struct clk_domain_3x_prog *ptmpdomain = |
870 | (struct clk_domain_3x_prog *)pargs; | 870 | (struct clk_domain_3x_prog *)pargs; |
871 | u32 status = 0; | 871 | int status = 0; |
872 | 872 | ||
873 | ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_PROG); | 873 | ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_DOMAIN_TYPE_3X_PROG); |
874 | status = clk_domain_construct_3x(g, ppboardobj, size, pargs); | 874 | status = clk_domain_construct_3x(g, ppboardobj, size, pargs); |
@@ -905,11 +905,11 @@ static u32 clk_domain_construct_3x_prog(struct gk20a *g, | |||
905 | return status; | 905 | return status; |
906 | } | 906 | } |
907 | 907 | ||
908 | static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g, | 908 | static int _clk_domain_pmudatainit_3x_slave(struct gk20a *g, |
909 | struct boardobj *board_obj_ptr, | 909 | struct boardobj *board_obj_ptr, |
910 | struct nv_pmu_boardobj *ppmudata) | 910 | struct nv_pmu_boardobj *ppmudata) |
911 | { | 911 | { |
912 | u32 status = 0; | 912 | int status = 0; |
913 | struct clk_domain_3x_slave *pclk_domain_3x_slave; | 913 | struct clk_domain_3x_slave *pclk_domain_3x_slave; |
914 | struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset; | 914 | struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset; |
915 | 915 | ||
@@ -930,7 +930,7 @@ static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g, | |||
930 | return status; | 930 | return status; |
931 | } | 931 | } |
932 | 932 | ||
933 | static u32 clk_domain_construct_3x_slave(struct gk20a *g, | 933 | static int clk_domain_construct_3x_slave(struct gk20a *g, |
934 | struct boardobj **ppboardobj, | 934 | struct boardobj **ppboardobj, |
935 | u16 size, void *pargs) | 935 | u16 size, void *pargs) |
936 | { | 936 | { |
@@ -938,7 +938,7 @@ static u32 clk_domain_construct_3x_slave(struct gk20a *g, | |||
938 | struct clk_domain_3x_slave *pdomain; | 938 | struct clk_domain_3x_slave *pdomain; |
939 | struct clk_domain_3x_slave *ptmpdomain = | 939 | struct clk_domain_3x_slave *ptmpdomain = |
940 | (struct clk_domain_3x_slave *)pargs; | 940 | (struct clk_domain_3x_slave *)pargs; |
941 | u32 status = 0; | 941 | int status = 0; |
942 | 942 | ||
943 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE) { | 943 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE) { |
944 | return -EINVAL; | 944 | return -EINVAL; |
@@ -963,11 +963,11 @@ static u32 clk_domain_construct_3x_slave(struct gk20a *g, | |||
963 | return status; | 963 | return status; |
964 | } | 964 | } |
965 | 965 | ||
966 | static u32 clkdomainclkproglink_3x_master(struct gk20a *g, | 966 | static int clkdomainclkproglink_3x_master(struct gk20a *g, |
967 | struct clk_pmupstate *pclk, | 967 | struct clk_pmupstate *pclk, |
968 | struct clk_domain *pdomain) | 968 | struct clk_domain *pdomain) |
969 | { | 969 | { |
970 | u32 status = 0; | 970 | int status = 0; |
971 | struct clk_domain_3x_master *p3xmaster = | 971 | struct clk_domain_3x_master *p3xmaster = |
972 | (struct clk_domain_3x_master *)pdomain; | 972 | (struct clk_domain_3x_master *)pdomain; |
973 | struct clk_prog *pprog = NULL; | 973 | struct clk_prog *pprog = NULL; |
@@ -1007,11 +1007,11 @@ done: | |||
1007 | return status; | 1007 | return status; |
1008 | } | 1008 | } |
1009 | 1009 | ||
1010 | static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g, | 1010 | static int _clk_domain_pmudatainit_3x_master(struct gk20a *g, |
1011 | struct boardobj *board_obj_ptr, | 1011 | struct boardobj *board_obj_ptr, |
1012 | struct nv_pmu_boardobj *ppmudata) | 1012 | struct nv_pmu_boardobj *ppmudata) |
1013 | { | 1013 | { |
1014 | u32 status = 0; | 1014 | int status = 0; |
1015 | struct clk_domain_3x_master *pclk_domain_3x_master; | 1015 | struct clk_domain_3x_master *pclk_domain_3x_master; |
1016 | struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset; | 1016 | struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset; |
1017 | 1017 | ||
@@ -1032,13 +1032,13 @@ static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g, | |||
1032 | return status; | 1032 | return status; |
1033 | } | 1033 | } |
1034 | 1034 | ||
1035 | static u32 clk_domain_construct_3x_master(struct gk20a *g, | 1035 | static int clk_domain_construct_3x_master(struct gk20a *g, |
1036 | struct boardobj **ppboardobj, | 1036 | struct boardobj **ppboardobj, |
1037 | u16 size, void *pargs) | 1037 | u16 size, void *pargs) |
1038 | { | 1038 | { |
1039 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 1039 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
1040 | struct clk_domain_3x_master *pdomain; | 1040 | struct clk_domain_3x_master *pdomain; |
1041 | u32 status = 0; | 1041 | int status = 0; |
1042 | 1042 | ||
1043 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER) { | 1043 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_MASTER) { |
1044 | return -EINVAL; | 1044 | return -EINVAL; |
@@ -1062,7 +1062,7 @@ static u32 clk_domain_construct_3x_master(struct gk20a *g, | |||
1062 | return status; | 1062 | return status; |
1063 | } | 1063 | } |
1064 | 1064 | ||
1065 | static u32 clkdomainclkproglink_fixed(struct gk20a *g, | 1065 | static int clkdomainclkproglink_fixed(struct gk20a *g, |
1066 | struct clk_pmupstate *pclk, | 1066 | struct clk_pmupstate *pclk, |
1067 | struct clk_domain *pdomain) | 1067 | struct clk_domain *pdomain) |
1068 | { | 1068 | { |
@@ -1070,11 +1070,11 @@ static u32 clkdomainclkproglink_fixed(struct gk20a *g, | |||
1070 | return 0; | 1070 | return 0; |
1071 | } | 1071 | } |
1072 | 1072 | ||
1073 | static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, | 1073 | static int _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, |
1074 | struct boardobj *board_obj_ptr, | 1074 | struct boardobj *board_obj_ptr, |
1075 | struct nv_pmu_boardobj *ppmudata) | 1075 | struct nv_pmu_boardobj *ppmudata) |
1076 | { | 1076 | { |
1077 | u32 status = 0; | 1077 | int status = 0; |
1078 | struct clk_domain_3x_fixed *pclk_domain_3x_fixed; | 1078 | struct clk_domain_3x_fixed *pclk_domain_3x_fixed; |
1079 | struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset; | 1079 | struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset; |
1080 | 1080 | ||
@@ -1095,7 +1095,7 @@ static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g, | |||
1095 | return status; | 1095 | return status; |
1096 | } | 1096 | } |
1097 | 1097 | ||
1098 | static u32 clk_domain_construct_3x_fixed(struct gk20a *g, | 1098 | static int clk_domain_construct_3x_fixed(struct gk20a *g, |
1099 | struct boardobj **ppboardobj, | 1099 | struct boardobj **ppboardobj, |
1100 | u16 size, void *pargs) | 1100 | u16 size, void *pargs) |
1101 | { | 1101 | { |
@@ -1103,7 +1103,7 @@ static u32 clk_domain_construct_3x_fixed(struct gk20a *g, | |||
1103 | struct clk_domain_3x_fixed *pdomain; | 1103 | struct clk_domain_3x_fixed *pdomain; |
1104 | struct clk_domain_3x_fixed *ptmpdomain = | 1104 | struct clk_domain_3x_fixed *ptmpdomain = |
1105 | (struct clk_domain_3x_fixed *)pargs; | 1105 | (struct clk_domain_3x_fixed *)pargs; |
1106 | u32 status = 0; | 1106 | int status = 0; |
1107 | 1107 | ||
1108 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) { | 1108 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) { |
1109 | return -EINVAL; | 1109 | return -EINVAL; |
@@ -1163,11 +1163,11 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs) | |||
1163 | return (struct clk_domain *)board_obj_ptr; | 1163 | return (struct clk_domain *)board_obj_ptr; |
1164 | } | 1164 | } |
1165 | 1165 | ||
1166 | static u32 clk_domain_pmudatainit_super(struct gk20a *g, | 1166 | static int clk_domain_pmudatainit_super(struct gk20a *g, |
1167 | struct boardobj *board_obj_ptr, | 1167 | struct boardobj *board_obj_ptr, |
1168 | struct nv_pmu_boardobj *ppmudata) | 1168 | struct nv_pmu_boardobj *ppmudata) |
1169 | { | 1169 | { |
1170 | u32 status = 0; | 1170 | int status = 0; |
1171 | struct clk_domain *pclk_domain; | 1171 | struct clk_domain *pclk_domain; |
1172 | struct nv_pmu_clk_clk_domain_boardobj_set *pset; | 1172 | struct nv_pmu_clk_clk_domain_boardobj_set *pset; |
1173 | 1173 | ||
@@ -1189,9 +1189,9 @@ static u32 clk_domain_pmudatainit_super(struct gk20a *g, | |||
1189 | return status; | 1189 | return status; |
1190 | } | 1190 | } |
1191 | 1191 | ||
1192 | u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk) | 1192 | int clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk) |
1193 | { | 1193 | { |
1194 | u32 status = 0; | 1194 | int status = 0; |
1195 | struct clk_domain *pdomain; | 1195 | struct clk_domain *pdomain; |
1196 | u8 i; | 1196 | u8 i; |
1197 | 1197 | ||
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h index 4441e7a1..d0170339 100644 --- a/drivers/gpu/nvgpu/clk/clk_domain.h +++ b/drivers/gpu/nvgpu/clk/clk_domain.h | |||
@@ -38,10 +38,10 @@ struct clk_domain; | |||
38 | enum nv_pmu_clk_clkwhich; | 38 | enum nv_pmu_clk_clkwhich; |
39 | 39 | ||
40 | /*data and function definition to talk to driver*/ | 40 | /*data and function definition to talk to driver*/ |
41 | u32 clk_domain_sw_setup(struct gk20a *g); | 41 | int clk_domain_sw_setup(struct gk20a *g); |
42 | u32 clk_domain_pmu_setup(struct gk20a *g); | 42 | int clk_domain_pmu_setup(struct gk20a *g); |
43 | 43 | ||
44 | typedef u32 clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, | 44 | typedef int clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, |
45 | struct clk_domain *pdomain); | 45 | struct clk_domain *pdomain); |
46 | 46 | ||
47 | typedef int clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, | 47 | typedef int clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, |
@@ -123,7 +123,7 @@ struct clk_domain_3x_slave { | |||
123 | clkgetslaveclk *clkdomainclkgetslaveclk; | 123 | clkgetslaveclk *clkdomainclkgetslaveclk; |
124 | }; | 124 | }; |
125 | 125 | ||
126 | u32 clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); | 126 | int clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); |
127 | 127 | ||
128 | #define CLK_CLK_DOMAIN_GET(pclk, idx) \ | 128 | #define CLK_CLK_DOMAIN_GET(pclk, idx) \ |
129 | ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | 129 | ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ |
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c index 0fd9c33f..700aeb2d 100644 --- a/drivers/gpu/nvgpu/clk/clk_fll.c +++ b/drivers/gpu/nvgpu/clk/clk_fll.c | |||
@@ -31,15 +31,15 @@ | |||
31 | #include "ctrl/ctrlclk.h" | 31 | #include "ctrl/ctrlclk.h" |
32 | #include "ctrl/ctrlvolt.h" | 32 | #include "ctrl/ctrlvolt.h" |
33 | 33 | ||
34 | static u32 devinit_get_fll_device_table(struct gk20a *g, | 34 | static int devinit_get_fll_device_table(struct gk20a *g, |
35 | struct avfsfllobjs *pfllobjs); | 35 | struct avfsfllobjs *pfllobjs); |
36 | static struct fll_device *construct_fll_device(struct gk20a *g, | 36 | static struct fll_device *construct_fll_device(struct gk20a *g, |
37 | void *pargs); | 37 | void *pargs); |
38 | static u32 fll_device_init_pmudata_super(struct gk20a *g, | 38 | static int fll_device_init_pmudata_super(struct gk20a *g, |
39 | struct boardobj *board_obj_ptr, | 39 | struct boardobj *board_obj_ptr, |
40 | struct nv_pmu_boardobj *ppmudata); | 40 | struct nv_pmu_boardobj *ppmudata); |
41 | 41 | ||
42 | static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, | 42 | static int _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, |
43 | struct boardobjgrp *pboardobjgrp, | 43 | struct boardobjgrp *pboardobjgrp, |
44 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 44 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
45 | { | 45 | { |
@@ -48,7 +48,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, | |||
48 | pboardobjgrppmu; | 48 | pboardobjgrppmu; |
49 | struct avfsfllobjs *pfll_objs = (struct avfsfllobjs *) | 49 | struct avfsfllobjs *pfll_objs = (struct avfsfllobjs *) |
50 | pboardobjgrp; | 50 | pboardobjgrp; |
51 | u32 status = 0; | 51 | int status = 0; |
52 | 52 | ||
53 | nvgpu_log_info(g, " "); | 53 | nvgpu_log_info(g, " "); |
54 | 54 | ||
@@ -71,7 +71,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g, | |||
71 | return status; | 71 | return status; |
72 | } | 72 | } |
73 | 73 | ||
74 | static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g, | 74 | static int _clk_fll_devgrp_pmudata_instget(struct gk20a *g, |
75 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 75 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
76 | struct nv_pmu_boardobj **ppboardobjpmudata, | 76 | struct nv_pmu_boardobj **ppboardobjpmudata, |
77 | u8 idx) | 77 | u8 idx) |
@@ -94,7 +94,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g, | |||
94 | return 0; | 94 | return 0; |
95 | } | 95 | } |
96 | 96 | ||
97 | static u32 _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, | 97 | static int _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, |
98 | void *pboardobjgrppmu, | 98 | void *pboardobjgrppmu, |
99 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, | 99 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, |
100 | u8 idx) | 100 | u8 idx) |
@@ -114,9 +114,9 @@ static u32 _clk_fll_devgrp_pmustatus_instget(struct gk20a *g, | |||
114 | return 0; | 114 | return 0; |
115 | } | 115 | } |
116 | 116 | ||
117 | u32 clk_fll_sw_setup(struct gk20a *g) | 117 | int clk_fll_sw_setup(struct gk20a *g) |
118 | { | 118 | { |
119 | u32 status; | 119 | int status; |
120 | struct boardobjgrp *pboardobjgrp = NULL; | 120 | struct boardobjgrp *pboardobjgrp = NULL; |
121 | struct avfsfllobjs *pfllobjs; | 121 | struct avfsfllobjs *pfllobjs; |
122 | struct fll_device *pfll; | 122 | struct fll_device *pfll; |
@@ -209,9 +209,9 @@ done: | |||
209 | return status; | 209 | return status; |
210 | } | 210 | } |
211 | 211 | ||
212 | u32 clk_fll_pmu_setup(struct gk20a *g) | 212 | int clk_fll_pmu_setup(struct gk20a *g) |
213 | { | 213 | { |
214 | u32 status; | 214 | int status; |
215 | struct boardobjgrp *pboardobjgrp = NULL; | 215 | struct boardobjgrp *pboardobjgrp = NULL; |
216 | 216 | ||
217 | nvgpu_log_info(g, " "); | 217 | nvgpu_log_info(g, " "); |
@@ -228,10 +228,10 @@ u32 clk_fll_pmu_setup(struct gk20a *g) | |||
228 | return status; | 228 | return status; |
229 | } | 229 | } |
230 | 230 | ||
231 | static u32 devinit_get_fll_device_table(struct gk20a *g, | 231 | static int devinit_get_fll_device_table(struct gk20a *g, |
232 | struct avfsfllobjs *pfllobjs) | 232 | struct avfsfllobjs *pfllobjs) |
233 | { | 233 | { |
234 | u32 status = 0; | 234 | int status = 0; |
235 | u8 *fll_table_ptr = NULL; | 235 | u8 *fll_table_ptr = NULL; |
236 | struct fll_descriptor_header fll_desc_table_header_sz = { 0 }; | 236 | struct fll_descriptor_header fll_desc_table_header_sz = { 0 }; |
237 | struct fll_descriptor_header_10 fll_desc_table_header = { 0 }; | 237 | struct fll_descriptor_header_10 fll_desc_table_header = { 0 }; |
@@ -411,7 +411,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g, | |||
411 | struct boardobj *board_obj_ptr = NULL; | 411 | struct boardobj *board_obj_ptr = NULL; |
412 | struct fll_device *pfll_dev; | 412 | struct fll_device *pfll_dev; |
413 | struct fll_device *board_obj_fll_ptr = NULL; | 413 | struct fll_device *board_obj_fll_ptr = NULL; |
414 | u32 status; | 414 | int status; |
415 | 415 | ||
416 | nvgpu_log_info(g, " "); | 416 | nvgpu_log_info(g, " "); |
417 | status = boardobj_construct_super(g, &board_obj_ptr, | 417 | status = boardobj_construct_super(g, &board_obj_ptr, |
@@ -449,11 +449,11 @@ static struct fll_device *construct_fll_device(struct gk20a *g, | |||
449 | return (struct fll_device *)board_obj_ptr; | 449 | return (struct fll_device *)board_obj_ptr; |
450 | } | 450 | } |
451 | 451 | ||
452 | static u32 fll_device_init_pmudata_super(struct gk20a *g, | 452 | static int fll_device_init_pmudata_super(struct gk20a *g, |
453 | struct boardobj *board_obj_ptr, | 453 | struct boardobj *board_obj_ptr, |
454 | struct nv_pmu_boardobj *ppmudata) | 454 | struct nv_pmu_boardobj *ppmudata) |
455 | { | 455 | { |
456 | u32 status = 0; | 456 | int status = 0; |
457 | struct fll_device *pfll_dev; | 457 | struct fll_device *pfll_dev; |
458 | struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data; | 458 | struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data; |
459 | 459 | ||
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.h b/drivers/gpu/nvgpu/clk/clk_fll.h index 79ecf5e1..7f7cad97 100644 --- a/drivers/gpu/nvgpu/clk/clk_fll.h +++ b/drivers/gpu/nvgpu/clk/clk_fll.h | |||
@@ -28,8 +28,8 @@ | |||
28 | #include "boardobj/boardobjgrpmask.h" | 28 | #include "boardobj/boardobjgrpmask.h" |
29 | 29 | ||
30 | /*data and function definition to talk to driver*/ | 30 | /*data and function definition to talk to driver*/ |
31 | u32 clk_fll_sw_setup(struct gk20a *g); | 31 | int clk_fll_sw_setup(struct gk20a *g); |
32 | u32 clk_fll_pmu_setup(struct gk20a *g); | 32 | int clk_fll_pmu_setup(struct gk20a *g); |
33 | 33 | ||
34 | struct avfsfllobjs { | 34 | struct avfsfllobjs { |
35 | struct boardobjgrp_e32 super; | 35 | struct boardobjgrp_e32 super; |
@@ -79,4 +79,3 @@ u32 nvgpu_clk_get_vbios_clk_domain_gp10x( u32 vbios_domain); | |||
79 | (pclk->avfs_fllobjs.lut_step_size_uv) | 79 | (pclk->avfs_fllobjs.lut_step_size_uv) |
80 | 80 | ||
81 | #endif | 81 | #endif |
82 | |||
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c index aa2a3a54..f114f5d5 100644 --- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c +++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c | |||
@@ -32,13 +32,13 @@ | |||
32 | #include "ctrl/ctrlclk.h" | 32 | #include "ctrl/ctrlclk.h" |
33 | #include "ctrl/ctrlvolt.h" | 33 | #include "ctrl/ctrlvolt.h" |
34 | 34 | ||
35 | static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, | 35 | static int clk_freq_controller_pmudatainit_super(struct gk20a *g, |
36 | struct boardobj *board_obj_ptr, | 36 | struct boardobj *board_obj_ptr, |
37 | struct nv_pmu_boardobj *ppmudata) | 37 | struct nv_pmu_boardobj *ppmudata) |
38 | { | 38 | { |
39 | struct nv_pmu_clk_clk_freq_controller_boardobj_set *pfreq_cntlr_set; | 39 | struct nv_pmu_clk_clk_freq_controller_boardobj_set *pfreq_cntlr_set; |
40 | struct clk_freq_controller *pfreq_cntlr; | 40 | struct clk_freq_controller *pfreq_cntlr; |
41 | u32 status = 0; | 41 | int status = 0; |
42 | 42 | ||
43 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 43 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
44 | if (status) { | 44 | if (status) { |
@@ -63,14 +63,14 @@ static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, | |||
63 | return status; | 63 | return status; |
64 | } | 64 | } |
65 | 65 | ||
66 | static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, | 66 | static int clk_freq_controller_pmudatainit_pi(struct gk20a *g, |
67 | struct boardobj *board_obj_ptr, | 67 | struct boardobj *board_obj_ptr, |
68 | struct nv_pmu_boardobj *ppmudata) | 68 | struct nv_pmu_boardobj *ppmudata) |
69 | { | 69 | { |
70 | struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set | 70 | struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set |
71 | *pfreq_cntlr_pi_set; | 71 | *pfreq_cntlr_pi_set; |
72 | struct clk_freq_controller_pi *pfreq_cntlr_pi; | 72 | struct clk_freq_controller_pi *pfreq_cntlr_pi; |
73 | u32 status = 0; | 73 | int status = 0; |
74 | 74 | ||
75 | status = clk_freq_controller_pmudatainit_super(g, | 75 | status = clk_freq_controller_pmudatainit_super(g, |
76 | board_obj_ptr, ppmudata); | 76 | board_obj_ptr, ppmudata); |
@@ -94,13 +94,13 @@ static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, | |||
94 | return status; | 94 | return status; |
95 | } | 95 | } |
96 | 96 | ||
97 | static u32 clk_freq_controller_construct_super(struct gk20a *g, | 97 | static int clk_freq_controller_construct_super(struct gk20a *g, |
98 | struct boardobj **ppboardobj, | 98 | struct boardobj **ppboardobj, |
99 | u16 size, void *pargs) | 99 | u16 size, void *pargs) |
100 | { | 100 | { |
101 | struct clk_freq_controller *pfreq_cntlr = NULL; | 101 | struct clk_freq_controller *pfreq_cntlr = NULL; |
102 | struct clk_freq_controller *pfreq_cntlr_tmp = NULL; | 102 | struct clk_freq_controller *pfreq_cntlr_tmp = NULL; |
103 | u32 status = 0; | 103 | int status = 0; |
104 | 104 | ||
105 | status = boardobj_construct_super(g, ppboardobj, size, pargs); | 105 | status = boardobj_construct_super(g, ppboardobj, size, pargs); |
106 | if (status) { | 106 | if (status) { |
@@ -125,13 +125,13 @@ static u32 clk_freq_controller_construct_super(struct gk20a *g, | |||
125 | return status; | 125 | return status; |
126 | } | 126 | } |
127 | 127 | ||
128 | static u32 clk_freq_controller_construct_pi(struct gk20a *g, | 128 | static int clk_freq_controller_construct_pi(struct gk20a *g, |
129 | struct boardobj **ppboardobj, | 129 | struct boardobj **ppboardobj, |
130 | u16 size, void *pargs) | 130 | u16 size, void *pargs) |
131 | { | 131 | { |
132 | struct clk_freq_controller_pi *pfreq_cntlr_pi = NULL; | 132 | struct clk_freq_controller_pi *pfreq_cntlr_pi = NULL; |
133 | struct clk_freq_controller_pi *pfreq_cntlr_pi_tmp = NULL; | 133 | struct clk_freq_controller_pi *pfreq_cntlr_pi_tmp = NULL; |
134 | u32 status = 0; | 134 | int status = 0; |
135 | 135 | ||
136 | status = clk_freq_controller_construct_super(g, ppboardobj, | 136 | status = clk_freq_controller_construct_super(g, ppboardobj, |
137 | size, pargs); | 137 | size, pargs); |
@@ -161,7 +161,7 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( | |||
161 | void *pargs) | 161 | void *pargs) |
162 | { | 162 | { |
163 | struct boardobj *board_obj_ptr = NULL; | 163 | struct boardobj *board_obj_ptr = NULL; |
164 | u32 status = 0; | 164 | int status = 0; |
165 | 165 | ||
166 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) { | 166 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) { |
167 | return NULL; | 167 | return NULL; |
@@ -177,10 +177,10 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( | |||
177 | } | 177 | } |
178 | 178 | ||
179 | 179 | ||
180 | static u32 clk_get_freq_controller_table(struct gk20a *g, | 180 | static int clk_get_freq_controller_table(struct gk20a *g, |
181 | struct clk_freq_controllers *pclk_freq_controllers) | 181 | struct clk_freq_controllers *pclk_freq_controllers) |
182 | { | 182 | { |
183 | u32 status = 0; | 183 | int status = 0; |
184 | u8 *pfreq_controller_table_ptr = NULL; | 184 | u8 *pfreq_controller_table_ptr = NULL; |
185 | struct vbios_fct_1x_header header = { 0 }; | 185 | struct vbios_fct_1x_header header = { 0 }; |
186 | struct vbios_fct_1x_entry entry = { 0 }; | 186 | struct vbios_fct_1x_entry entry = { 0 }; |
@@ -324,9 +324,9 @@ done: | |||
324 | return status; | 324 | return status; |
325 | } | 325 | } |
326 | 326 | ||
327 | u32 clk_freq_controller_pmu_setup(struct gk20a *g) | 327 | int clk_freq_controller_pmu_setup(struct gk20a *g) |
328 | { | 328 | { |
329 | u32 status; | 329 | int status; |
330 | struct boardobjgrp *pboardobjgrp = NULL; | 330 | struct boardobjgrp *pboardobjgrp = NULL; |
331 | 331 | ||
332 | nvgpu_log_info(g, " "); | 332 | nvgpu_log_info(g, " "); |
@@ -343,7 +343,7 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g) | |||
343 | return status; | 343 | return status; |
344 | } | 344 | } |
345 | 345 | ||
346 | static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, | 346 | static int _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, |
347 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 347 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
348 | struct nv_pmu_boardobj **ppboardobjpmudata, | 348 | struct nv_pmu_boardobj **ppboardobjpmudata, |
349 | u8 idx) | 349 | u8 idx) |
@@ -366,7 +366,7 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, | |||
366 | return 0; | 366 | return 0; |
367 | } | 367 | } |
368 | 368 | ||
369 | static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, | 369 | static int _clk_freq_controllers_pmudatainit(struct gk20a *g, |
370 | struct boardobjgrp *pboardobjgrp, | 370 | struct boardobjgrp *pboardobjgrp, |
371 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 371 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
372 | { | 372 | { |
@@ -375,7 +375,7 @@ static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, | |||
375 | pboardobjgrppmu; | 375 | pboardobjgrppmu; |
376 | struct clk_freq_controllers *pcntrs = | 376 | struct clk_freq_controllers *pcntrs = |
377 | (struct clk_freq_controllers *)pboardobjgrp; | 377 | (struct clk_freq_controllers *)pboardobjgrp; |
378 | u32 status = 0; | 378 | int status = 0; |
379 | 379 | ||
380 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); | 380 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); |
381 | if (status) { | 381 | if (status) { |
@@ -391,9 +391,9 @@ done: | |||
391 | return status; | 391 | return status; |
392 | } | 392 | } |
393 | 393 | ||
394 | u32 clk_freq_controller_sw_setup(struct gk20a *g) | 394 | int clk_freq_controller_sw_setup(struct gk20a *g) |
395 | { | 395 | { |
396 | u32 status = 0; | 396 | int status = 0; |
397 | struct boardobjgrp *pboardobjgrp = NULL; | 397 | struct boardobjgrp *pboardobjgrp = NULL; |
398 | struct clk_freq_controllers *pclk_freq_controllers; | 398 | struct clk_freq_controllers *pclk_freq_controllers; |
399 | struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); | 399 | struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); |
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.h b/drivers/gpu/nvgpu/clk/clk_freq_controller.h index 1b8a24c9..659b75d5 100644 --- a/drivers/gpu/nvgpu/clk/clk_freq_controller.h +++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -78,7 +78,7 @@ struct clk_freq_controllers { | |||
78 | void *pprereq_load; | 78 | void *pprereq_load; |
79 | }; | 79 | }; |
80 | 80 | ||
81 | u32 clk_freq_controller_sw_setup(struct gk20a *g); | 81 | int clk_freq_controller_sw_setup(struct gk20a *g); |
82 | u32 clk_freq_controller_pmu_setup(struct gk20a *g); | 82 | int clk_freq_controller_pmu_setup(struct gk20a *g); |
83 | 83 | ||
84 | #endif | 84 | #endif |
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c index 5966d64a..ae8f8e01 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.c +++ b/drivers/gpu/nvgpu/clk/clk_prog.c | |||
@@ -34,14 +34,14 @@ | |||
34 | #include "ctrl/ctrlvolt.h" | 34 | #include "ctrl/ctrlvolt.h" |
35 | 35 | ||
36 | static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs); | 36 | static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs); |
37 | static u32 devinit_get_clk_prog_table(struct gk20a *g, | 37 | static int devinit_get_clk_prog_table(struct gk20a *g, |
38 | struct clk_progs *pprogobjs); | 38 | struct clk_progs *pprogobjs); |
39 | static vf_flatten vfflatten_prog_1x_master; | 39 | static vf_flatten vfflatten_prog_1x_master; |
40 | static vf_lookup vflookup_prog_1x_master; | 40 | static vf_lookup vflookup_prog_1x_master; |
41 | static get_fpoints getfpoints_prog_1x_master; | 41 | static get_fpoints getfpoints_prog_1x_master; |
42 | static get_slaveclk getslaveclk_prog_1x_master; | 42 | static get_slaveclk getslaveclk_prog_1x_master; |
43 | 43 | ||
44 | static u32 _clk_progs_pmudatainit(struct gk20a *g, | 44 | static int _clk_progs_pmudatainit(struct gk20a *g, |
45 | struct boardobjgrp *pboardobjgrp, | 45 | struct boardobjgrp *pboardobjgrp, |
46 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 46 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
47 | { | 47 | { |
@@ -64,7 +64,7 @@ done: | |||
64 | return status; | 64 | return status; |
65 | } | 65 | } |
66 | 66 | ||
67 | static u32 _clk_progs_pmudata_instget(struct gk20a *g, | 67 | static int _clk_progs_pmudata_instget(struct gk20a *g, |
68 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 68 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
69 | struct nv_pmu_boardobj **ppboardobjpmudata, | 69 | struct nv_pmu_boardobj **ppboardobjpmudata, |
70 | u8 idx) | 70 | u8 idx) |
@@ -86,9 +86,9 @@ static u32 _clk_progs_pmudata_instget(struct gk20a *g, | |||
86 | return 0; | 86 | return 0; |
87 | } | 87 | } |
88 | 88 | ||
89 | u32 clk_prog_sw_setup(struct gk20a *g) | 89 | int clk_prog_sw_setup(struct gk20a *g) |
90 | { | 90 | { |
91 | u32 status; | 91 | int status; |
92 | struct boardobjgrp *pboardobjgrp = NULL; | 92 | struct boardobjgrp *pboardobjgrp = NULL; |
93 | struct clk_progs *pclkprogobjs; | 93 | struct clk_progs *pclkprogobjs; |
94 | 94 | ||
@@ -136,9 +136,9 @@ done: | |||
136 | return status; | 136 | return status; |
137 | } | 137 | } |
138 | 138 | ||
139 | u32 clk_prog_pmu_setup(struct gk20a *g) | 139 | int clk_prog_pmu_setup(struct gk20a *g) |
140 | { | 140 | { |
141 | u32 status; | 141 | int status; |
142 | struct boardobjgrp *pboardobjgrp = NULL; | 142 | struct boardobjgrp *pboardobjgrp = NULL; |
143 | 143 | ||
144 | nvgpu_log_info(g, " "); | 144 | nvgpu_log_info(g, " "); |
@@ -155,10 +155,10 @@ u32 clk_prog_pmu_setup(struct gk20a *g) | |||
155 | return status; | 155 | return status; |
156 | } | 156 | } |
157 | 157 | ||
158 | static u32 devinit_get_clk_prog_table(struct gk20a *g, | 158 | static int devinit_get_clk_prog_table(struct gk20a *g, |
159 | struct clk_progs *pclkprogobjs) | 159 | struct clk_progs *pclkprogobjs) |
160 | { | 160 | { |
161 | u32 status = 0; | 161 | int status = 0; |
162 | u8 *clkprogs_tbl_ptr = NULL; | 162 | u8 *clkprogs_tbl_ptr = NULL; |
163 | struct vbios_clock_programming_table_1x_header header = { 0 }; | 163 | struct vbios_clock_programming_table_1x_header header = { 0 }; |
164 | struct vbios_clock_programming_table_1x_entry prog = { 0 }; | 164 | struct vbios_clock_programming_table_1x_entry prog = { 0 }; |
@@ -379,11 +379,11 @@ done: | |||
379 | return status; | 379 | return status; |
380 | } | 380 | } |
381 | 381 | ||
382 | static u32 _clk_prog_pmudatainit_super(struct gk20a *g, | 382 | static int _clk_prog_pmudatainit_super(struct gk20a *g, |
383 | struct boardobj *board_obj_ptr, | 383 | struct boardobj *board_obj_ptr, |
384 | struct nv_pmu_boardobj *ppmudata) | 384 | struct nv_pmu_boardobj *ppmudata) |
385 | { | 385 | { |
386 | u32 status = 0; | 386 | int status = 0; |
387 | 387 | ||
388 | nvgpu_log_info(g, " "); | 388 | nvgpu_log_info(g, " "); |
389 | 389 | ||
@@ -391,11 +391,11 @@ static u32 _clk_prog_pmudatainit_super(struct gk20a *g, | |||
391 | return status; | 391 | return status; |
392 | } | 392 | } |
393 | 393 | ||
394 | static u32 _clk_prog_pmudatainit_1x(struct gk20a *g, | 394 | static int _clk_prog_pmudatainit_1x(struct gk20a *g, |
395 | struct boardobj *board_obj_ptr, | 395 | struct boardobj *board_obj_ptr, |
396 | struct nv_pmu_boardobj *ppmudata) | 396 | struct nv_pmu_boardobj *ppmudata) |
397 | { | 397 | { |
398 | u32 status = 0; | 398 | int status = 0; |
399 | struct clk_prog_1x *pclk_prog_1x; | 399 | struct clk_prog_1x *pclk_prog_1x; |
400 | struct nv_pmu_clk_clk_prog_1x_boardobj_set *pset; | 400 | struct nv_pmu_clk_clk_prog_1x_boardobj_set *pset; |
401 | 401 | ||
@@ -418,11 +418,11 @@ static u32 _clk_prog_pmudatainit_1x(struct gk20a *g, | |||
418 | return status; | 418 | return status; |
419 | } | 419 | } |
420 | 420 | ||
421 | static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g, | 421 | static int _clk_prog_pmudatainit_1x_master(struct gk20a *g, |
422 | struct boardobj *board_obj_ptr, | 422 | struct boardobj *board_obj_ptr, |
423 | struct nv_pmu_boardobj *ppmudata) | 423 | struct nv_pmu_boardobj *ppmudata) |
424 | { | 424 | { |
425 | u32 status = 0; | 425 | int status = 0; |
426 | struct clk_prog_1x_master *pclk_prog_1x_master; | 426 | struct clk_prog_1x_master *pclk_prog_1x_master; |
427 | struct nv_pmu_clk_clk_prog_1x_master_boardobj_set *pset; | 427 | struct nv_pmu_clk_clk_prog_1x_master_boardobj_set *pset; |
428 | u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * | 428 | u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * |
@@ -449,11 +449,11 @@ static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g, | |||
449 | return status; | 449 | return status; |
450 | } | 450 | } |
451 | 451 | ||
452 | static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, | 452 | static int _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, |
453 | struct boardobj *board_obj_ptr, | 453 | struct boardobj *board_obj_ptr, |
454 | struct nv_pmu_boardobj *ppmudata) | 454 | struct nv_pmu_boardobj *ppmudata) |
455 | { | 455 | { |
456 | u32 status = 0; | 456 | int status = 0; |
457 | struct clk_prog_1x_master_ratio *pclk_prog_1x_master_ratio; | 457 | struct clk_prog_1x_master_ratio *pclk_prog_1x_master_ratio; |
458 | struct nv_pmu_clk_clk_prog_1x_master_ratio_boardobj_set *pset; | 458 | struct nv_pmu_clk_clk_prog_1x_master_ratio_boardobj_set *pset; |
459 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * | 459 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * |
@@ -478,11 +478,11 @@ static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g, | |||
478 | return status; | 478 | return status; |
479 | } | 479 | } |
480 | 480 | ||
481 | static u32 _clk_prog_pmudatainit_1x_master_table(struct gk20a *g, | 481 | static int _clk_prog_pmudatainit_1x_master_table(struct gk20a *g, |
482 | struct boardobj *board_obj_ptr, | 482 | struct boardobj *board_obj_ptr, |
483 | struct nv_pmu_boardobj *ppmudata) | 483 | struct nv_pmu_boardobj *ppmudata) |
484 | { | 484 | { |
485 | u32 status = 0; | 485 | int status = 0; |
486 | struct clk_prog_1x_master_table *pclk_prog_1x_master_table; | 486 | struct clk_prog_1x_master_table *pclk_prog_1x_master_table; |
487 | struct nv_pmu_clk_clk_prog_1x_master_table_boardobj_set *pset; | 487 | struct nv_pmu_clk_clk_prog_1x_master_table_boardobj_set *pset; |
488 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * | 488 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * |
@@ -538,12 +538,12 @@ done: | |||
538 | return status; | 538 | return status; |
539 | } | 539 | } |
540 | 540 | ||
541 | static u32 clk_prog_construct_super(struct gk20a *g, | 541 | static int clk_prog_construct_super(struct gk20a *g, |
542 | struct boardobj **ppboardobj, | 542 | struct boardobj **ppboardobj, |
543 | u16 size, void *pargs) | 543 | u16 size, void *pargs) |
544 | { | 544 | { |
545 | struct clk_prog *pclkprog; | 545 | struct clk_prog *pclkprog; |
546 | u32 status = 0; | 546 | int status = 0; |
547 | 547 | ||
548 | status = boardobj_construct_super(g, ppboardobj, | 548 | status = boardobj_construct_super(g, ppboardobj, |
549 | size, pargs); | 549 | size, pargs); |
@@ -559,7 +559,7 @@ static u32 clk_prog_construct_super(struct gk20a *g, | |||
559 | } | 559 | } |
560 | 560 | ||
561 | 561 | ||
562 | static u32 clk_prog_construct_1x(struct gk20a *g, | 562 | static int clk_prog_construct_1x(struct gk20a *g, |
563 | struct boardobj **ppboardobj, | 563 | struct boardobj **ppboardobj, |
564 | u16 size, void *pargs) | 564 | u16 size, void *pargs) |
565 | { | 565 | { |
@@ -567,7 +567,7 @@ static u32 clk_prog_construct_1x(struct gk20a *g, | |||
567 | struct clk_prog_1x *pclkprog; | 567 | struct clk_prog_1x *pclkprog; |
568 | struct clk_prog_1x *ptmpprog = | 568 | struct clk_prog_1x *ptmpprog = |
569 | (struct clk_prog_1x *)pargs; | 569 | (struct clk_prog_1x *)pargs; |
570 | u32 status = 0; | 570 | int status = 0; |
571 | 571 | ||
572 | nvgpu_log_info(g, " "); | 572 | nvgpu_log_info(g, " "); |
573 | ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X); | 573 | ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X); |
@@ -588,7 +588,7 @@ static u32 clk_prog_construct_1x(struct gk20a *g, | |||
588 | return status; | 588 | return status; |
589 | } | 589 | } |
590 | 590 | ||
591 | static u32 clk_prog_construct_1x_master(struct gk20a *g, | 591 | static int clk_prog_construct_1x_master(struct gk20a *g, |
592 | struct boardobj **ppboardobj, | 592 | struct boardobj **ppboardobj, |
593 | u16 size, void *pargs) | 593 | u16 size, void *pargs) |
594 | { | 594 | { |
@@ -596,7 +596,7 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g, | |||
596 | struct clk_prog_1x_master *pclkprog; | 596 | struct clk_prog_1x_master *pclkprog; |
597 | struct clk_prog_1x_master *ptmpprog = | 597 | struct clk_prog_1x_master *ptmpprog = |
598 | (struct clk_prog_1x_master *)pargs; | 598 | (struct clk_prog_1x_master *)pargs; |
599 | u32 status = 0; | 599 | int status = 0; |
600 | u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * | 600 | u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) * |
601 | g->clk_pmu.clk_progobjs.vf_entry_count; | 601 | g->clk_pmu.clk_progobjs.vf_entry_count; |
602 | u8 railidx; | 602 | u8 railidx; |
@@ -645,7 +645,7 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g, | |||
645 | return status; | 645 | return status; |
646 | } | 646 | } |
647 | 647 | ||
648 | static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, | 648 | static int clk_prog_construct_1x_master_ratio(struct gk20a *g, |
649 | struct boardobj **ppboardobj, | 649 | struct boardobj **ppboardobj, |
650 | u16 size, void *pargs) | 650 | u16 size, void *pargs) |
651 | { | 651 | { |
@@ -653,7 +653,7 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, | |||
653 | struct clk_prog_1x_master_ratio *pclkprog; | 653 | struct clk_prog_1x_master_ratio *pclkprog; |
654 | struct clk_prog_1x_master_ratio *ptmpprog = | 654 | struct clk_prog_1x_master_ratio *ptmpprog = |
655 | (struct clk_prog_1x_master_ratio *)pargs; | 655 | (struct clk_prog_1x_master_ratio *)pargs; |
656 | u32 status = 0; | 656 | int status = 0; |
657 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * | 657 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * |
658 | g->clk_pmu.clk_progobjs.slave_entry_count; | 658 | g->clk_pmu.clk_progobjs.slave_entry_count; |
659 | 659 | ||
@@ -687,7 +687,7 @@ static u32 clk_prog_construct_1x_master_ratio(struct gk20a *g, | |||
687 | return status; | 687 | return status; |
688 | } | 688 | } |
689 | 689 | ||
690 | static u32 clk_prog_construct_1x_master_table(struct gk20a *g, | 690 | static int clk_prog_construct_1x_master_table(struct gk20a *g, |
691 | struct boardobj **ppboardobj, | 691 | struct boardobj **ppboardobj, |
692 | u16 size, void *pargs) | 692 | u16 size, void *pargs) |
693 | { | 693 | { |
@@ -695,7 +695,7 @@ static u32 clk_prog_construct_1x_master_table(struct gk20a *g, | |||
695 | struct clk_prog_1x_master_table *pclkprog; | 695 | struct clk_prog_1x_master_table *pclkprog; |
696 | struct clk_prog_1x_master_table *ptmpprog = | 696 | struct clk_prog_1x_master_table *ptmpprog = |
697 | (struct clk_prog_1x_master_table *)pargs; | 697 | (struct clk_prog_1x_master_table *)pargs; |
698 | u32 status = 0; | 698 | int status = 0; |
699 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * | 699 | u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) * |
700 | g->clk_pmu.clk_progobjs.slave_entry_count; | 700 | g->clk_pmu.clk_progobjs.slave_entry_count; |
701 | 701 | ||
@@ -741,7 +741,7 @@ exit: | |||
741 | static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs) | 741 | static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs) |
742 | { | 742 | { |
743 | struct boardobj *board_obj_ptr = NULL; | 743 | struct boardobj *board_obj_ptr = NULL; |
744 | u32 status; | 744 | int status; |
745 | 745 | ||
746 | nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs)); | 746 | nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs)); |
747 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 747 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.h b/drivers/gpu/nvgpu/clk/clk_prog.h index 64cb1b51..cabe0bf0 100644 --- a/drivers/gpu/nvgpu/clk/clk_prog.h +++ b/drivers/gpu/nvgpu/clk/clk_prog.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -29,8 +29,8 @@ | |||
29 | #include "boardobj/boardobjgrp_e255.h" | 29 | #include "boardobj/boardobjgrp_e255.h" |
30 | #include "boardobj/boardobjgrpmask.h" | 30 | #include "boardobj/boardobjgrpmask.h" |
31 | 31 | ||
32 | u32 clk_prog_sw_setup(struct gk20a *g); | 32 | int clk_prog_sw_setup(struct gk20a *g); |
33 | u32 clk_prog_pmu_setup(struct gk20a *g); | 33 | int clk_prog_pmu_setup(struct gk20a *g); |
34 | struct clk_prog_1x_master; | 34 | struct clk_prog_1x_master; |
35 | 35 | ||
36 | typedef u32 vf_flatten(struct gk20a *g, struct clk_pmupstate *pclk, | 36 | typedef u32 vf_flatten(struct gk20a *g, struct clk_pmupstate *pclk, |
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c index 5fc1d8e5..80eefe96 100644 --- a/drivers/gpu/nvgpu/clk/clk_vf_point.c +++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c | |||
@@ -29,10 +29,10 @@ | |||
29 | #include "ctrl/ctrlclk.h" | 29 | #include "ctrl/ctrlclk.h" |
30 | #include "ctrl/ctrlvolt.h" | 30 | #include "ctrl/ctrlvolt.h" |
31 | 31 | ||
32 | static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj | 32 | static int _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj |
33 | *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); | 33 | *board_obj_ptr, struct nv_pmu_boardobj *ppmudata); |
34 | 34 | ||
35 | static u32 _clk_vf_points_pmudatainit(struct gk20a *g, | 35 | static int _clk_vf_points_pmudatainit(struct gk20a *g, |
36 | struct boardobjgrp *pboardobjgrp, | 36 | struct boardobjgrp *pboardobjgrp, |
37 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 37 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
38 | { | 38 | { |
@@ -50,7 +50,7 @@ done: | |||
50 | return status; | 50 | return status; |
51 | } | 51 | } |
52 | 52 | ||
53 | static u32 _clk_vf_points_pmudata_instget(struct gk20a *g, | 53 | static int _clk_vf_points_pmudata_instget(struct gk20a *g, |
54 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 54 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
55 | struct nv_pmu_boardobj **ppboardobjpmudata, | 55 | struct nv_pmu_boardobj **ppboardobjpmudata, |
56 | u8 idx) | 56 | u8 idx) |
@@ -72,7 +72,7 @@ static u32 _clk_vf_points_pmudata_instget(struct gk20a *g, | |||
72 | return 0; | 72 | return 0; |
73 | } | 73 | } |
74 | 74 | ||
75 | static u32 _clk_vf_points_pmustatus_instget(struct gk20a *g, | 75 | static int _clk_vf_points_pmustatus_instget(struct gk20a *g, |
76 | void *pboardobjgrppmu, | 76 | void *pboardobjgrppmu, |
77 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, | 77 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, |
78 | u8 idx) | 78 | u8 idx) |
@@ -91,9 +91,9 @@ static u32 _clk_vf_points_pmustatus_instget(struct gk20a *g, | |||
91 | return 0; | 91 | return 0; |
92 | } | 92 | } |
93 | 93 | ||
94 | u32 clk_vf_point_sw_setup(struct gk20a *g) | 94 | int clk_vf_point_sw_setup(struct gk20a *g) |
95 | { | 95 | { |
96 | u32 status; | 96 | int status; |
97 | struct boardobjgrp *pboardobjgrp = NULL; | 97 | struct boardobjgrp *pboardobjgrp = NULL; |
98 | 98 | ||
99 | nvgpu_log_info(g, " "); | 99 | nvgpu_log_info(g, " "); |
@@ -138,9 +138,9 @@ done: | |||
138 | return status; | 138 | return status; |
139 | } | 139 | } |
140 | 140 | ||
141 | u32 clk_vf_point_pmu_setup(struct gk20a *g) | 141 | int clk_vf_point_pmu_setup(struct gk20a *g) |
142 | { | 142 | { |
143 | u32 status; | 143 | int status; |
144 | struct boardobjgrp *pboardobjgrp = NULL; | 144 | struct boardobjgrp *pboardobjgrp = NULL; |
145 | 145 | ||
146 | nvgpu_log_info(g, " "); | 146 | nvgpu_log_info(g, " "); |
@@ -157,14 +157,14 @@ u32 clk_vf_point_pmu_setup(struct gk20a *g) | |||
157 | return status; | 157 | return status; |
158 | } | 158 | } |
159 | 159 | ||
160 | static u32 clk_vf_point_construct_super(struct gk20a *g, | 160 | static int clk_vf_point_construct_super(struct gk20a *g, |
161 | struct boardobj **ppboardobj, | 161 | struct boardobj **ppboardobj, |
162 | u16 size, void *pargs) | 162 | u16 size, void *pargs) |
163 | { | 163 | { |
164 | struct clk_vf_point *pclkvfpoint; | 164 | struct clk_vf_point *pclkvfpoint; |
165 | struct clk_vf_point *ptmpvfpoint = | 165 | struct clk_vf_point *ptmpvfpoint = |
166 | (struct clk_vf_point *)pargs; | 166 | (struct clk_vf_point *)pargs; |
167 | u32 status = 0; | 167 | int status = 0; |
168 | 168 | ||
169 | status = boardobj_construct_super(g, ppboardobj, | 169 | status = boardobj_construct_super(g, ppboardobj, |
170 | size, pargs); | 170 | size, pargs); |
@@ -183,11 +183,11 @@ static u32 clk_vf_point_construct_super(struct gk20a *g, | |||
183 | return status; | 183 | return status; |
184 | } | 184 | } |
185 | 185 | ||
186 | static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g, | 186 | static int _clk_vf_point_pmudatainit_volt(struct gk20a *g, |
187 | struct boardobj *board_obj_ptr, | 187 | struct boardobj *board_obj_ptr, |
188 | struct nv_pmu_boardobj *ppmudata) | 188 | struct nv_pmu_boardobj *ppmudata) |
189 | { | 189 | { |
190 | u32 status = 0; | 190 | int status = 0; |
191 | struct clk_vf_point_volt *pclk_vf_point_volt; | 191 | struct clk_vf_point_volt *pclk_vf_point_volt; |
192 | struct nv_pmu_clk_clk_vf_point_volt_boardobj_set *pset; | 192 | struct nv_pmu_clk_clk_vf_point_volt_boardobj_set *pset; |
193 | 193 | ||
@@ -211,11 +211,11 @@ static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g, | |||
211 | return status; | 211 | return status; |
212 | } | 212 | } |
213 | 213 | ||
214 | static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g, | 214 | static int _clk_vf_point_pmudatainit_freq(struct gk20a *g, |
215 | struct boardobj *board_obj_ptr, | 215 | struct boardobj *board_obj_ptr, |
216 | struct nv_pmu_boardobj *ppmudata) | 216 | struct nv_pmu_boardobj *ppmudata) |
217 | { | 217 | { |
218 | u32 status = 0; | 218 | int status = 0; |
219 | struct clk_vf_point_freq *pclk_vf_point_freq; | 219 | struct clk_vf_point_freq *pclk_vf_point_freq; |
220 | struct nv_pmu_clk_clk_vf_point_freq_boardobj_set *pset; | 220 | struct nv_pmu_clk_clk_vf_point_freq_boardobj_set *pset; |
221 | 221 | ||
@@ -240,7 +240,7 @@ static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g, | |||
240 | return status; | 240 | return status; |
241 | } | 241 | } |
242 | 242 | ||
243 | static u32 clk_vf_point_construct_volt(struct gk20a *g, | 243 | static int clk_vf_point_construct_volt(struct gk20a *g, |
244 | struct boardobj **ppboardobj, | 244 | struct boardobj **ppboardobj, |
245 | u16 size, void *pargs) | 245 | u16 size, void *pargs) |
246 | { | 246 | { |
@@ -248,7 +248,7 @@ static u32 clk_vf_point_construct_volt(struct gk20a *g, | |||
248 | struct clk_vf_point_volt *pclkvfpoint; | 248 | struct clk_vf_point_volt *pclkvfpoint; |
249 | struct clk_vf_point_volt *ptmpvfpoint = | 249 | struct clk_vf_point_volt *ptmpvfpoint = |
250 | (struct clk_vf_point_volt *)pargs; | 250 | (struct clk_vf_point_volt *)pargs; |
251 | u32 status = 0; | 251 | int status = 0; |
252 | 252 | ||
253 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_VOLT) { | 253 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_VOLT) { |
254 | return -EINVAL; | 254 | return -EINVAL; |
@@ -271,7 +271,7 @@ static u32 clk_vf_point_construct_volt(struct gk20a *g, | |||
271 | return status; | 271 | return status; |
272 | } | 272 | } |
273 | 273 | ||
274 | static u32 clk_vf_point_construct_freq(struct gk20a *g, | 274 | static int clk_vf_point_construct_freq(struct gk20a *g, |
275 | struct boardobj **ppboardobj, | 275 | struct boardobj **ppboardobj, |
276 | u16 size, void *pargs) | 276 | u16 size, void *pargs) |
277 | { | 277 | { |
@@ -279,7 +279,7 @@ static u32 clk_vf_point_construct_freq(struct gk20a *g, | |||
279 | struct clk_vf_point_freq *pclkvfpoint; | 279 | struct clk_vf_point_freq *pclkvfpoint; |
280 | struct clk_vf_point_freq *ptmpvfpoint = | 280 | struct clk_vf_point_freq *ptmpvfpoint = |
281 | (struct clk_vf_point_freq *)pargs; | 281 | (struct clk_vf_point_freq *)pargs; |
282 | u32 status = 0; | 282 | int status = 0; |
283 | 283 | ||
284 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_FREQ) { | 284 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_FREQ) { |
285 | return -EINVAL; | 285 | return -EINVAL; |
@@ -305,7 +305,7 @@ static u32 clk_vf_point_construct_freq(struct gk20a *g, | |||
305 | struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs) | 305 | struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs) |
306 | { | 306 | { |
307 | struct boardobj *board_obj_ptr = NULL; | 307 | struct boardobj *board_obj_ptr = NULL; |
308 | u32 status; | 308 | int status; |
309 | 309 | ||
310 | nvgpu_log_info(g, " "); | 310 | nvgpu_log_info(g, " "); |
311 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 311 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
@@ -332,11 +332,11 @@ struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs) | |||
332 | return (struct clk_vf_point *)board_obj_ptr; | 332 | return (struct clk_vf_point *)board_obj_ptr; |
333 | } | 333 | } |
334 | 334 | ||
335 | static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, | 335 | static int _clk_vf_point_pmudatainit_super(struct gk20a *g, |
336 | struct boardobj *board_obj_ptr, | 336 | struct boardobj *board_obj_ptr, |
337 | struct nv_pmu_boardobj *ppmudata) | 337 | struct nv_pmu_boardobj *ppmudata) |
338 | { | 338 | { |
339 | u32 status = 0; | 339 | int status = 0; |
340 | struct clk_vf_point *pclk_vf_point; | 340 | struct clk_vf_point *pclk_vf_point; |
341 | struct nv_pmu_clk_clk_vf_point_boardobj_set *pset; | 341 | struct nv_pmu_clk_clk_vf_point_boardobj_set *pset; |
342 | 342 | ||
@@ -360,7 +360,7 @@ static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g, | |||
360 | } | 360 | } |
361 | 361 | ||
362 | 362 | ||
363 | static u32 clk_vf_point_update(struct gk20a *g, | 363 | static int clk_vf_point_update(struct gk20a *g, |
364 | struct boardobj *board_obj_ptr, | 364 | struct boardobj *board_obj_ptr, |
365 | struct nv_pmu_boardobj *ppmudata) | 365 | struct nv_pmu_boardobj *ppmudata) |
366 | { | 366 | { |
@@ -388,7 +388,7 @@ static u32 clk_vf_point_update(struct gk20a *g, | |||
388 | } | 388 | } |
389 | 389 | ||
390 | /*get latest vf point data from PMU */ | 390 | /*get latest vf point data from PMU */ |
391 | u32 clk_vf_point_cache(struct gk20a *g) | 391 | int clk_vf_point_cache(struct gk20a *g) |
392 | { | 392 | { |
393 | 393 | ||
394 | struct clk_vf_points *pclk_vf_points; | 394 | struct clk_vf_points *pclk_vf_points; |
@@ -397,7 +397,7 @@ u32 clk_vf_point_cache(struct gk20a *g) | |||
397 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu; | 397 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu; |
398 | struct boardobj *pboardobj = NULL; | 398 | struct boardobj *pboardobj = NULL; |
399 | struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL; | 399 | struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL; |
400 | u32 status; | 400 | int status; |
401 | u8 index; | 401 | u8 index; |
402 | 402 | ||
403 | nvgpu_log_info(g, " "); | 403 | nvgpu_log_info(g, " "); |
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.h b/drivers/gpu/nvgpu/clk/clk_vf_point.h index b67434b7..a4e2f48f 100644 --- a/drivers/gpu/nvgpu/clk/clk_vf_point.h +++ b/drivers/gpu/nvgpu/clk/clk_vf_point.h | |||
@@ -28,9 +28,9 @@ | |||
28 | #include "boardobj/boardobjgrp_e32.h" | 28 | #include "boardobj/boardobjgrp_e32.h" |
29 | #include "boardobj/boardobjgrpmask.h" | 29 | #include "boardobj/boardobjgrpmask.h" |
30 | 30 | ||
31 | u32 clk_vf_point_sw_setup(struct gk20a *g); | 31 | int clk_vf_point_sw_setup(struct gk20a *g); |
32 | u32 clk_vf_point_pmu_setup(struct gk20a *g); | 32 | int clk_vf_point_pmu_setup(struct gk20a *g); |
33 | u32 clk_vf_point_cache(struct gk20a *g); | 33 | int clk_vf_point_cache(struct gk20a *g); |
34 | 34 | ||
35 | struct clk_vf_points { | 35 | struct clk_vf_points { |
36 | struct boardobjgrp_e255 super; | 36 | struct boardobjgrp_e255 super; |
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c index 1c18b662..9a163594 100644 --- a/drivers/gpu/nvgpu/clk/clk_vin.c +++ b/drivers/gpu/nvgpu/clk/clk_vin.c | |||
@@ -36,27 +36,27 @@ | |||
36 | #include "clk.h" | 36 | #include "clk.h" |
37 | #include "clk_vin.h" | 37 | #include "clk_vin.h" |
38 | 38 | ||
39 | static u32 devinit_get_vin_device_table(struct gk20a *g, | 39 | static int devinit_get_vin_device_table(struct gk20a *g, |
40 | struct avfsvinobjs *pvinobjs); | 40 | struct avfsvinobjs *pvinobjs); |
41 | 41 | ||
42 | static u32 vin_device_construct_v10(struct gk20a *g, | 42 | static int vin_device_construct_v10(struct gk20a *g, |
43 | struct boardobj **ppboardobj, | 43 | struct boardobj **ppboardobj, |
44 | u16 size, void *pargs); | 44 | u16 size, void *pargs); |
45 | static u32 vin_device_construct_v20(struct gk20a *g, | 45 | static int vin_device_construct_v20(struct gk20a *g, |
46 | struct boardobj **ppboardobj, | 46 | struct boardobj **ppboardobj, |
47 | u16 size, void *pargs); | 47 | u16 size, void *pargs); |
48 | static u32 vin_device_construct_super(struct gk20a *g, | 48 | static int vin_device_construct_super(struct gk20a *g, |
49 | struct boardobj **ppboardobj, | 49 | struct boardobj **ppboardobj, |
50 | u16 size, void *pargs); | 50 | u16 size, void *pargs); |
51 | static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs); | 51 | static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs); |
52 | 52 | ||
53 | static u32 vin_device_init_pmudata_v10(struct gk20a *g, | 53 | static int vin_device_init_pmudata_v10(struct gk20a *g, |
54 | struct boardobj *board_obj_ptr, | 54 | struct boardobj *board_obj_ptr, |
55 | struct nv_pmu_boardobj *ppmudata); | 55 | struct nv_pmu_boardobj *ppmudata); |
56 | static u32 vin_device_init_pmudata_v20(struct gk20a *g, | 56 | static int vin_device_init_pmudata_v20(struct gk20a *g, |
57 | struct boardobj *board_obj_ptr, | 57 | struct boardobj *board_obj_ptr, |
58 | struct nv_pmu_boardobj *ppmudata); | 58 | struct nv_pmu_boardobj *ppmudata); |
59 | static u32 vin_device_init_pmudata_super(struct gk20a *g, | 59 | static int vin_device_init_pmudata_super(struct gk20a *g, |
60 | struct boardobj *board_obj_ptr, | 60 | struct boardobj *board_obj_ptr, |
61 | struct nv_pmu_boardobj *ppmudata); | 61 | struct nv_pmu_boardobj *ppmudata); |
62 | 62 | ||
@@ -122,7 +122,7 @@ u32 clk_avfs_get_vin_cal_fuse_v20(struct gk20a *g, | |||
122 | 122 | ||
123 | } | 123 | } |
124 | 124 | ||
125 | static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, | 125 | static int _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, |
126 | struct boardobjgrp *pboardobjgrp, | 126 | struct boardobjgrp *pboardobjgrp, |
127 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 127 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
128 | { | 128 | { |
@@ -130,7 +130,7 @@ static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, | |||
130 | (struct nv_pmu_clk_clk_vin_device_boardobjgrp_set_header *) | 130 | (struct nv_pmu_clk_clk_vin_device_boardobjgrp_set_header *) |
131 | pboardobjgrppmu; | 131 | pboardobjgrppmu; |
132 | struct avfsvinobjs *pvin_obbj = (struct avfsvinobjs *)pboardobjgrp; | 132 | struct avfsvinobjs *pvin_obbj = (struct avfsvinobjs *)pboardobjgrp; |
133 | u32 status = 0; | 133 | int status = 0; |
134 | 134 | ||
135 | nvgpu_log_info(g, " "); | 135 | nvgpu_log_info(g, " "); |
136 | 136 | ||
@@ -142,7 +142,7 @@ static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g, | |||
142 | return status; | 142 | return status; |
143 | } | 143 | } |
144 | 144 | ||
145 | static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g, | 145 | static int _clk_vin_devgrp_pmudata_instget(struct gk20a *g, |
146 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 146 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
147 | struct nv_pmu_boardobj **ppboardobjpmudata, | 147 | struct nv_pmu_boardobj **ppboardobjpmudata, |
148 | u8 idx) | 148 | u8 idx) |
@@ -165,7 +165,7 @@ static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g, | |||
165 | return 0; | 165 | return 0; |
166 | } | 166 | } |
167 | 167 | ||
168 | static u32 _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, | 168 | static int _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, |
169 | void *pboardobjgrppmu, | 169 | void *pboardobjgrppmu, |
170 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, | 170 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, |
171 | u8 idx) | 171 | u8 idx) |
@@ -185,9 +185,9 @@ static u32 _clk_vin_devgrp_pmustatus_instget(struct gk20a *g, | |||
185 | return 0; | 185 | return 0; |
186 | } | 186 | } |
187 | 187 | ||
188 | u32 clk_vin_sw_setup(struct gk20a *g) | 188 | int clk_vin_sw_setup(struct gk20a *g) |
189 | { | 189 | { |
190 | u32 status; | 190 | int status; |
191 | struct boardobjgrp *pboardobjgrp = NULL; | 191 | struct boardobjgrp *pboardobjgrp = NULL; |
192 | struct vin_device_v20 *pvindev = NULL; | 192 | struct vin_device_v20 *pvindev = NULL; |
193 | struct avfsvinobjs *pvinobjs; | 193 | struct avfsvinobjs *pvinobjs; |
@@ -243,9 +243,9 @@ done: | |||
243 | return status; | 243 | return status; |
244 | } | 244 | } |
245 | 245 | ||
246 | u32 clk_vin_pmu_setup(struct gk20a *g) | 246 | int clk_vin_pmu_setup(struct gk20a *g) |
247 | { | 247 | { |
248 | u32 status; | 248 | int status; |
249 | struct boardobjgrp *pboardobjgrp = NULL; | 249 | struct boardobjgrp *pboardobjgrp = NULL; |
250 | 250 | ||
251 | nvgpu_log_info(g, " "); | 251 | nvgpu_log_info(g, " "); |
@@ -262,10 +262,10 @@ u32 clk_vin_pmu_setup(struct gk20a *g) | |||
262 | return status; | 262 | return status; |
263 | } | 263 | } |
264 | 264 | ||
265 | static u32 devinit_get_vin_device_table(struct gk20a *g, | 265 | static int devinit_get_vin_device_table(struct gk20a *g, |
266 | struct avfsvinobjs *pvinobjs) | 266 | struct avfsvinobjs *pvinobjs) |
267 | { | 267 | { |
268 | u32 status = 0; | 268 | int status = 0; |
269 | u8 *vin_table_ptr = NULL; | 269 | u8 *vin_table_ptr = NULL; |
270 | struct vin_descriptor_header_10 vin_desc_table_header = { 0 }; | 270 | struct vin_descriptor_header_10 vin_desc_table_header = { 0 }; |
271 | struct vin_descriptor_entry_10 vin_desc_table_entry = { 0 }; | 271 | struct vin_descriptor_entry_10 vin_desc_table_entry = { 0 }; |
@@ -376,14 +376,14 @@ done: | |||
376 | return status; | 376 | return status; |
377 | } | 377 | } |
378 | 378 | ||
379 | static u32 vin_device_construct_v10(struct gk20a *g, | 379 | static int vin_device_construct_v10(struct gk20a *g, |
380 | struct boardobj **ppboardobj, | 380 | struct boardobj **ppboardobj, |
381 | u16 size, void *pargs) | 381 | u16 size, void *pargs) |
382 | { | 382 | { |
383 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 383 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
384 | struct vin_device_v10 *pvin_device_v10; | 384 | struct vin_device_v10 *pvin_device_v10; |
385 | struct vin_device_v10 *ptmpvin_device_v10 = (struct vin_device_v10 *)pargs; | 385 | struct vin_device_v10 *ptmpvin_device_v10 = (struct vin_device_v10 *)pargs; |
386 | u32 status = 0; | 386 | int status = 0; |
387 | 387 | ||
388 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V10) { | 388 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V10) { |
389 | return -EINVAL; | 389 | return -EINVAL; |
@@ -406,14 +406,14 @@ static u32 vin_device_construct_v10(struct gk20a *g, | |||
406 | return status; | 406 | return status; |
407 | } | 407 | } |
408 | 408 | ||
409 | static u32 vin_device_construct_v20(struct gk20a *g, | 409 | static int vin_device_construct_v20(struct gk20a *g, |
410 | struct boardobj **ppboardobj, | 410 | struct boardobj **ppboardobj, |
411 | u16 size, void *pargs) | 411 | u16 size, void *pargs) |
412 | { | 412 | { |
413 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 413 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
414 | struct vin_device_v20 *pvin_device_v20; | 414 | struct vin_device_v20 *pvin_device_v20; |
415 | struct vin_device_v20 *ptmpvin_device_v20 = (struct vin_device_v20 *)pargs; | 415 | struct vin_device_v20 *ptmpvin_device_v20 = (struct vin_device_v20 *)pargs; |
416 | u32 status = 0; | 416 | int status = 0; |
417 | 417 | ||
418 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20) { | 418 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20) { |
419 | return -EINVAL; | 419 | return -EINVAL; |
@@ -435,13 +435,13 @@ static u32 vin_device_construct_v20(struct gk20a *g, | |||
435 | 435 | ||
436 | return status; | 436 | return status; |
437 | } | 437 | } |
438 | static u32 vin_device_construct_super(struct gk20a *g, | 438 | static int vin_device_construct_super(struct gk20a *g, |
439 | struct boardobj **ppboardobj, | 439 | struct boardobj **ppboardobj, |
440 | u16 size, void *pargs) | 440 | u16 size, void *pargs) |
441 | { | 441 | { |
442 | struct vin_device *pvin_device; | 442 | struct vin_device *pvin_device; |
443 | struct vin_device *ptmpvin_device = (struct vin_device *)pargs; | 443 | struct vin_device *ptmpvin_device = (struct vin_device *)pargs; |
444 | u32 status = 0; | 444 | int status = 0; |
445 | status = boardobj_construct_super(g, ppboardobj, size, pargs); | 445 | status = boardobj_construct_super(g, ppboardobj, size, pargs); |
446 | 446 | ||
447 | if (status) { | 447 | if (status) { |
@@ -463,7 +463,7 @@ static u32 vin_device_construct_super(struct gk20a *g, | |||
463 | static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs) | 463 | static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs) |
464 | { | 464 | { |
465 | struct boardobj *board_obj_ptr = NULL; | 465 | struct boardobj *board_obj_ptr = NULL; |
466 | u32 status; | 466 | int status; |
467 | 467 | ||
468 | nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs)); | 468 | nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs)); |
469 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 469 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
@@ -492,11 +492,11 @@ static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs) | |||
492 | 492 | ||
493 | 493 | ||
494 | 494 | ||
495 | static u32 vin_device_init_pmudata_v10(struct gk20a *g, | 495 | static int vin_device_init_pmudata_v10(struct gk20a *g, |
496 | struct boardobj *board_obj_ptr, | 496 | struct boardobj *board_obj_ptr, |
497 | struct nv_pmu_boardobj *ppmudata) | 497 | struct nv_pmu_boardobj *ppmudata) |
498 | { | 498 | { |
499 | u32 status = 0; | 499 | int status = 0; |
500 | struct vin_device_v20 *pvin_dev_v20; | 500 | struct vin_device_v20 *pvin_dev_v20; |
501 | struct nv_pmu_clk_clk_vin_device_v10_boardobj_set *perf_pmu_data; | 501 | struct nv_pmu_clk_clk_vin_device_v10_boardobj_set *perf_pmu_data; |
502 | 502 | ||
@@ -519,11 +519,11 @@ static u32 vin_device_init_pmudata_v10(struct gk20a *g, | |||
519 | return status; | 519 | return status; |
520 | } | 520 | } |
521 | 521 | ||
522 | static u32 vin_device_init_pmudata_v20(struct gk20a *g, | 522 | static int vin_device_init_pmudata_v20(struct gk20a *g, |
523 | struct boardobj *board_obj_ptr, | 523 | struct boardobj *board_obj_ptr, |
524 | struct nv_pmu_boardobj *ppmudata) | 524 | struct nv_pmu_boardobj *ppmudata) |
525 | { | 525 | { |
526 | u32 status = 0; | 526 | int status = 0; |
527 | struct vin_device_v20 *pvin_dev_v20; | 527 | struct vin_device_v20 *pvin_dev_v20; |
528 | struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *perf_pmu_data; | 528 | struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *perf_pmu_data; |
529 | 529 | ||
@@ -546,11 +546,11 @@ static u32 vin_device_init_pmudata_v20(struct gk20a *g, | |||
546 | return status; | 546 | return status; |
547 | } | 547 | } |
548 | 548 | ||
549 | static u32 vin_device_init_pmudata_super(struct gk20a *g, | 549 | static int vin_device_init_pmudata_super(struct gk20a *g, |
550 | struct boardobj *board_obj_ptr, | 550 | struct boardobj *board_obj_ptr, |
551 | struct nv_pmu_boardobj *ppmudata) | 551 | struct nv_pmu_boardobj *ppmudata) |
552 | { | 552 | { |
553 | u32 status = 0; | 553 | int status = 0; |
554 | struct vin_device *pvin_dev; | 554 | struct vin_device *pvin_dev; |
555 | struct nv_pmu_clk_clk_vin_device_boardobj_set *perf_pmu_data; | 555 | struct nv_pmu_clk_clk_vin_device_boardobj_set *perf_pmu_data; |
556 | 556 | ||
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.h b/drivers/gpu/nvgpu/clk/clk_vin.h index 209e7055..9396c848 100644 --- a/drivers/gpu/nvgpu/clk/clk_vin.h +++ b/drivers/gpu/nvgpu/clk/clk_vin.h | |||
@@ -67,8 +67,8 @@ struct vin_device_v20 { | |||
67 | boardobj_construct construct_vindevice; | 67 | boardobj_construct construct_vindevice; |
68 | boardobj_pmudatainit vindeviceinit_pmudata_super; | 68 | boardobj_pmudatainit vindeviceinit_pmudata_super; |
69 | 69 | ||
70 | u32 clk_vin_sw_setup(struct gk20a *g); | 70 | int clk_vin_sw_setup(struct gk20a *g); |
71 | u32 clk_vin_pmu_setup(struct gk20a *g); | 71 | int clk_vin_pmu_setup(struct gk20a *g); |
72 | u32 clk_avfs_get_vin_cal_fuse_v10(struct gk20a *g, | 72 | u32 clk_avfs_get_vin_cal_fuse_v10(struct gk20a *g, |
73 | struct avfsvinobjs *pvinobjs, | 73 | struct avfsvinobjs *pvinobjs, |
74 | struct vin_device_v20 *pvindev); | 74 | struct vin_device_v20 *pvindev); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2b8e8b0a..c98fec48 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -850,14 +850,15 @@ struct gpu_ops { | |||
850 | void (*pg_cmd_eng_buf_load_set_dma_idx)(struct pmu_pg_cmd *pg, | 850 | void (*pg_cmd_eng_buf_load_set_dma_idx)(struct pmu_pg_cmd *pg, |
851 | u8 value); | 851 | u8 value); |
852 | struct { | 852 | struct { |
853 | u32 (*boardobjgrp_pmucmd_construct_impl)(struct gk20a *g, | 853 | int (*boardobjgrp_pmucmd_construct_impl) |
854 | (struct gk20a *g, | ||
854 | struct boardobjgrp *pboardobjgrp, | 855 | struct boardobjgrp *pboardobjgrp, |
855 | struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, | 856 | struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, |
856 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, | 857 | u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, |
857 | u8 rpc_func_id); | 858 | u8 rpc_func_id); |
858 | u32 (*boardobjgrp_pmuset_impl)(struct gk20a *g, | 859 | int (*boardobjgrp_pmuset_impl)(struct gk20a *g, |
859 | struct boardobjgrp *pboardobjgrp); | 860 | struct boardobjgrp *pboardobjgrp); |
860 | u32 (*boardobjgrp_pmugetstatus_impl)(struct gk20a *g, | 861 | int (*boardobjgrp_pmugetstatus_impl)(struct gk20a *g, |
861 | struct boardobjgrp *pboardobjgrp, | 862 | struct boardobjgrp *pboardobjgrp, |
862 | struct boardobjgrpmask *mask); | 863 | struct boardobjgrpmask *mask); |
863 | int (*is_boardobjgrp_pmucmd_id_valid)(struct gk20a *g, | 864 | int (*is_boardobjgrp_pmucmd_id_valid)(struct gk20a *g, |
diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.c b/drivers/gpu/nvgpu/perf/vfe_equ.c index fa742c35..fdeee9a7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_equ.c +++ b/drivers/gpu/nvgpu/perf/vfe_equ.c | |||
@@ -31,14 +31,14 @@ | |||
31 | #include "ctrl/ctrlvolt.h" | 31 | #include "ctrl/ctrlvolt.h" |
32 | 32 | ||
33 | static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs); | 33 | static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs); |
34 | static u32 devinit_get_vfe_equ_table(struct gk20a *g, | 34 | static int devinit_get_vfe_equ_table(struct gk20a *g, |
35 | struct vfe_equs *pequobjs); | 35 | struct vfe_equs *pequobjs); |
36 | 36 | ||
37 | static u32 _vfe_equs_pmudatainit(struct gk20a *g, | 37 | static int _vfe_equs_pmudatainit(struct gk20a *g, |
38 | struct boardobjgrp *pboardobjgrp, | 38 | struct boardobjgrp *pboardobjgrp, |
39 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 39 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
40 | { | 40 | { |
41 | u32 status = 0; | 41 | int status = 0; |
42 | 42 | ||
43 | status = boardobjgrp_pmudatainit_e255(g, pboardobjgrp, pboardobjgrppmu); | 43 | status = boardobjgrp_pmudatainit_e255(g, pboardobjgrp, pboardobjgrppmu); |
44 | if (status) { | 44 | if (status) { |
@@ -51,7 +51,7 @@ done: | |||
51 | return status; | 51 | return status; |
52 | } | 52 | } |
53 | 53 | ||
54 | static u32 _vfe_equs_pmudata_instget(struct gk20a *g, | 54 | static int _vfe_equs_pmudata_instget(struct gk20a *g, |
55 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 55 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
56 | struct nv_pmu_boardobj **ppboardobjpmudata, | 56 | struct nv_pmu_boardobj **ppboardobjpmudata, |
57 | u8 idx) | 57 | u8 idx) |
@@ -71,9 +71,9 @@ static u32 _vfe_equs_pmudata_instget(struct gk20a *g, | |||
71 | return 0; | 71 | return 0; |
72 | } | 72 | } |
73 | 73 | ||
74 | u32 vfe_equ_sw_setup(struct gk20a *g) | 74 | int vfe_equ_sw_setup(struct gk20a *g) |
75 | { | 75 | { |
76 | u32 status; | 76 | int status; |
77 | struct boardobjgrp *pboardobjgrp = NULL; | 77 | struct boardobjgrp *pboardobjgrp = NULL; |
78 | struct vfe_equs *pvfeequobjs; | 78 | struct vfe_equs *pvfeequobjs; |
79 | 79 | ||
@@ -113,9 +113,9 @@ done: | |||
113 | return status; | 113 | return status; |
114 | } | 114 | } |
115 | 115 | ||
116 | u32 vfe_equ_pmu_setup(struct gk20a *g) | 116 | int vfe_equ_pmu_setup(struct gk20a *g) |
117 | { | 117 | { |
118 | u32 status; | 118 | int status; |
119 | struct boardobjgrp *pboardobjgrp = NULL; | 119 | struct boardobjgrp *pboardobjgrp = NULL; |
120 | 120 | ||
121 | nvgpu_log_info(g, " "); | 121 | nvgpu_log_info(g, " "); |
@@ -131,10 +131,10 @@ u32 vfe_equ_pmu_setup(struct gk20a *g) | |||
131 | return status; | 131 | return status; |
132 | } | 132 | } |
133 | 133 | ||
134 | static u32 devinit_get_vfe_equ_table(struct gk20a *g, | 134 | static int devinit_get_vfe_equ_table(struct gk20a *g, |
135 | struct vfe_equs *pvfeequobjs) | 135 | struct vfe_equs *pvfeequobjs) |
136 | { | 136 | { |
137 | u32 status = 0; | 137 | int status = 0; |
138 | u8 *vfeequs_tbl_ptr = NULL; | 138 | u8 *vfeequs_tbl_ptr = NULL; |
139 | struct vbios_vfe_3x_header_struct vfeequs_tbl_header = { 0 }; | 139 | struct vbios_vfe_3x_header_struct vfeequs_tbl_header = { 0 }; |
140 | struct vbios_vfe_3x_equ_entry_struct equ = { 0 }; | 140 | struct vbios_vfe_3x_equ_entry_struct equ = { 0 }; |
@@ -329,7 +329,7 @@ done: | |||
329 | return status; | 329 | return status; |
330 | } | 330 | } |
331 | 331 | ||
332 | static u32 _vfe_equ_pmudatainit_super(struct gk20a *g, | 332 | static int _vfe_equ_pmudatainit_super(struct gk20a *g, |
333 | struct boardobj *board_obj_ptr, | 333 | struct boardobj *board_obj_ptr, |
334 | struct nv_pmu_boardobj *ppmudata) | 334 | struct nv_pmu_boardobj *ppmudata) |
335 | { | 335 | { |
@@ -357,13 +357,13 @@ static u32 _vfe_equ_pmudatainit_super(struct gk20a *g, | |||
357 | return status; | 357 | return status; |
358 | } | 358 | } |
359 | 359 | ||
360 | static u32 vfe_equ_construct_super(struct gk20a *g, | 360 | static int vfe_equ_construct_super(struct gk20a *g, |
361 | struct boardobj **ppboardobj, | 361 | struct boardobj **ppboardobj, |
362 | u16 size, void *pargs) | 362 | u16 size, void *pargs) |
363 | { | 363 | { |
364 | struct vfe_equ *pvfeequ; | 364 | struct vfe_equ *pvfeequ; |
365 | struct vfe_equ *ptmpequ = (struct vfe_equ *)pargs; | 365 | struct vfe_equ *ptmpequ = (struct vfe_equ *)pargs; |
366 | u32 status = 0; | 366 | int status = 0; |
367 | 367 | ||
368 | status = boardobj_construct_super(g, ppboardobj, | 368 | status = boardobj_construct_super(g, ppboardobj, |
369 | size, pargs); | 369 | size, pargs); |
@@ -384,11 +384,11 @@ static u32 vfe_equ_construct_super(struct gk20a *g, | |||
384 | return status; | 384 | return status; |
385 | } | 385 | } |
386 | 386 | ||
387 | static u32 _vfe_equ_pmudatainit_compare(struct gk20a *g, | 387 | static int _vfe_equ_pmudatainit_compare(struct gk20a *g, |
388 | struct boardobj *board_obj_ptr, | 388 | struct boardobj *board_obj_ptr, |
389 | struct nv_pmu_boardobj *ppmudata) | 389 | struct nv_pmu_boardobj *ppmudata) |
390 | { | 390 | { |
391 | u32 status = 0; | 391 | int status = 0; |
392 | struct vfe_equ_compare *pvfe_equ_compare; | 392 | struct vfe_equ_compare *pvfe_equ_compare; |
393 | struct nv_pmu_vfe_equ_compare *pset; | 393 | struct nv_pmu_vfe_equ_compare *pset; |
394 | 394 | ||
@@ -411,7 +411,7 @@ static u32 _vfe_equ_pmudatainit_compare(struct gk20a *g, | |||
411 | } | 411 | } |
412 | 412 | ||
413 | 413 | ||
414 | static u32 vfe_equ_construct_compare(struct gk20a *g, | 414 | static int vfe_equ_construct_compare(struct gk20a *g, |
415 | struct boardobj **ppboardobj, | 415 | struct boardobj **ppboardobj, |
416 | u16 size, void *pargs) | 416 | u16 size, void *pargs) |
417 | { | 417 | { |
@@ -419,7 +419,7 @@ static u32 vfe_equ_construct_compare(struct gk20a *g, | |||
419 | struct vfe_equ_compare *pvfeequ; | 419 | struct vfe_equ_compare *pvfeequ; |
420 | struct vfe_equ_compare *ptmpequ = | 420 | struct vfe_equ_compare *ptmpequ = |
421 | (struct vfe_equ_compare *)pargs; | 421 | (struct vfe_equ_compare *)pargs; |
422 | u32 status = 0; | 422 | int status = 0; |
423 | 423 | ||
424 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_COMPARE) | 424 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_COMPARE) |
425 | return -EINVAL; | 425 | return -EINVAL; |
@@ -443,11 +443,11 @@ static u32 vfe_equ_construct_compare(struct gk20a *g, | |||
443 | return status; | 443 | return status; |
444 | } | 444 | } |
445 | 445 | ||
446 | static u32 _vfe_equ_pmudatainit_minmax(struct gk20a *g, | 446 | static int _vfe_equ_pmudatainit_minmax(struct gk20a *g, |
447 | struct boardobj *board_obj_ptr, | 447 | struct boardobj *board_obj_ptr, |
448 | struct nv_pmu_boardobj *ppmudata) | 448 | struct nv_pmu_boardobj *ppmudata) |
449 | { | 449 | { |
450 | u32 status = 0; | 450 | int status = 0; |
451 | struct vfe_equ_minmax *pvfe_equ_minmax; | 451 | struct vfe_equ_minmax *pvfe_equ_minmax; |
452 | struct nv_pmu_vfe_equ_minmax *pset; | 452 | struct nv_pmu_vfe_equ_minmax *pset; |
453 | 453 | ||
@@ -469,7 +469,7 @@ static u32 _vfe_equ_pmudatainit_minmax(struct gk20a *g, | |||
469 | return status; | 469 | return status; |
470 | } | 470 | } |
471 | 471 | ||
472 | static u32 vfe_equ_construct_minmax(struct gk20a *g, | 472 | static int vfe_equ_construct_minmax(struct gk20a *g, |
473 | struct boardobj **ppboardobj, | 473 | struct boardobj **ppboardobj, |
474 | u16 size, void *pargs) | 474 | u16 size, void *pargs) |
475 | { | 475 | { |
@@ -477,7 +477,7 @@ static u32 vfe_equ_construct_minmax(struct gk20a *g, | |||
477 | struct vfe_equ_minmax *pvfeequ; | 477 | struct vfe_equ_minmax *pvfeequ; |
478 | struct vfe_equ_minmax *ptmpequ = | 478 | struct vfe_equ_minmax *ptmpequ = |
479 | (struct vfe_equ_minmax *)pargs; | 479 | (struct vfe_equ_minmax *)pargs; |
480 | u32 status = 0; | 480 | int status = 0; |
481 | 481 | ||
482 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_MINMAX) | 482 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_MINMAX) |
483 | return -EINVAL; | 483 | return -EINVAL; |
@@ -498,11 +498,11 @@ static u32 vfe_equ_construct_minmax(struct gk20a *g, | |||
498 | return status; | 498 | return status; |
499 | } | 499 | } |
500 | 500 | ||
501 | static u32 _vfe_equ_pmudatainit_quadratic(struct gk20a *g, | 501 | static int _vfe_equ_pmudatainit_quadratic(struct gk20a *g, |
502 | struct boardobj *board_obj_ptr, | 502 | struct boardobj *board_obj_ptr, |
503 | struct nv_pmu_boardobj *ppmudata) | 503 | struct nv_pmu_boardobj *ppmudata) |
504 | { | 504 | { |
505 | u32 status = 0; | 505 | int status = 0; |
506 | struct vfe_equ_quadratic *pvfe_equ_quadratic; | 506 | struct vfe_equ_quadratic *pvfe_equ_quadratic; |
507 | struct nv_pmu_vfe_equ_quadratic *pset; | 507 | struct nv_pmu_vfe_equ_quadratic *pset; |
508 | u32 i; | 508 | u32 i; |
@@ -524,7 +524,7 @@ static u32 _vfe_equ_pmudatainit_quadratic(struct gk20a *g, | |||
524 | return status; | 524 | return status; |
525 | } | 525 | } |
526 | 526 | ||
527 | static u32 vfe_equ_construct_quadratic(struct gk20a *g, | 527 | static int vfe_equ_construct_quadratic(struct gk20a *g, |
528 | struct boardobj **ppboardobj, | 528 | struct boardobj **ppboardobj, |
529 | u16 size, void *pargs) | 529 | u16 size, void *pargs) |
530 | { | 530 | { |
@@ -532,7 +532,7 @@ static u32 vfe_equ_construct_quadratic(struct gk20a *g, | |||
532 | struct vfe_equ_quadratic *pvfeequ; | 532 | struct vfe_equ_quadratic *pvfeequ; |
533 | struct vfe_equ_quadratic *ptmpequ = | 533 | struct vfe_equ_quadratic *ptmpequ = |
534 | (struct vfe_equ_quadratic *)pargs; | 534 | (struct vfe_equ_quadratic *)pargs; |
535 | u32 status = 0; | 535 | int status = 0; |
536 | u32 i; | 536 | u32 i; |
537 | 537 | ||
538 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_QUADRATIC) | 538 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_QUADRATIC) |
@@ -558,7 +558,7 @@ static u32 vfe_equ_construct_quadratic(struct gk20a *g, | |||
558 | static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs) | 558 | static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs) |
559 | { | 559 | { |
560 | struct boardobj *board_obj_ptr = NULL; | 560 | struct boardobj *board_obj_ptr = NULL; |
561 | u32 status; | 561 | int status; |
562 | 562 | ||
563 | nvgpu_log_info(g, " "); | 563 | nvgpu_log_info(g, " "); |
564 | 564 | ||
diff --git a/drivers/gpu/nvgpu/perf/vfe_equ.h b/drivers/gpu/nvgpu/perf/vfe_equ.h index 87888d82..486a48f8 100644 --- a/drivers/gpu/nvgpu/perf/vfe_equ.h +++ b/drivers/gpu/nvgpu/perf/vfe_equ.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general perf structures & definitions | 2 | * general perf structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -28,8 +28,8 @@ | |||
28 | #include "perf/vfe_var.h" | 28 | #include "perf/vfe_var.h" |
29 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> | 29 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> |
30 | 30 | ||
31 | u32 vfe_equ_sw_setup(struct gk20a *g); | 31 | int vfe_equ_sw_setup(struct gk20a *g); |
32 | u32 vfe_equ_pmu_setup(struct gk20a *g); | 32 | int vfe_equ_pmu_setup(struct gk20a *g); |
33 | 33 | ||
34 | #define VFE_EQU_GET(_pperf, _idx) \ | 34 | #define VFE_EQU_GET(_pperf, _idx) \ |
35 | ((struct vfe_equ *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | 35 | ((struct vfe_equ *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ |
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.c b/drivers/gpu/nvgpu/perf/vfe_var.c index 8b95230e..5f6e9de7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_var.c +++ b/drivers/gpu/nvgpu/perf/vfe_var.c | |||
@@ -31,13 +31,13 @@ | |||
31 | #include "ctrl/ctrlvolt.h" | 31 | #include "ctrl/ctrlvolt.h" |
32 | #include "ctrl/ctrlperf.h" | 32 | #include "ctrl/ctrlperf.h" |
33 | 33 | ||
34 | static u32 devinit_get_vfe_var_table(struct gk20a *g, | 34 | static int devinit_get_vfe_var_table(struct gk20a *g, |
35 | struct vfe_vars *pvarobjs); | 35 | struct vfe_vars *pvarobjs); |
36 | static u32 vfe_var_construct_single(struct gk20a *g, | 36 | static int vfe_var_construct_single(struct gk20a *g, |
37 | struct boardobj **ppboardobj, | 37 | struct boardobj **ppboardobj, |
38 | u16 size, void *pargs); | 38 | u16 size, void *pargs); |
39 | 39 | ||
40 | static u32 _vfe_vars_pmudatainit(struct gk20a *g, | 40 | static int _vfe_vars_pmudatainit(struct gk20a *g, |
41 | struct boardobjgrp *pboardobjgrp, | 41 | struct boardobjgrp *pboardobjgrp, |
42 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 42 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
43 | { | 43 | { |
@@ -45,7 +45,7 @@ static u32 _vfe_vars_pmudatainit(struct gk20a *g, | |||
45 | (struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *) | 45 | (struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *) |
46 | pboardobjgrppmu; | 46 | pboardobjgrppmu; |
47 | struct vfe_vars *pvars = (struct vfe_vars *)pboardobjgrp; | 47 | struct vfe_vars *pvars = (struct vfe_vars *)pboardobjgrp; |
48 | u32 status = 0; | 48 | int status = 0; |
49 | 49 | ||
50 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); | 50 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); |
51 | if (status) { | 51 | if (status) { |
@@ -60,7 +60,7 @@ done: | |||
60 | return status; | 60 | return status; |
61 | } | 61 | } |
62 | 62 | ||
63 | static u32 _vfe_vars_pmudata_instget(struct gk20a *g, | 63 | static int _vfe_vars_pmudata_instget(struct gk20a *g, |
64 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 64 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
65 | struct nv_pmu_boardobj **ppboardobjpmudata, | 65 | struct nv_pmu_boardobj **ppboardobjpmudata, |
66 | u8 idx) | 66 | u8 idx) |
@@ -82,7 +82,7 @@ static u32 _vfe_vars_pmudata_instget(struct gk20a *g, | |||
82 | return 0; | 82 | return 0; |
83 | } | 83 | } |
84 | 84 | ||
85 | static u32 _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, | 85 | static int _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, |
86 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) | 86 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) |
87 | { | 87 | { |
88 | struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status = | 88 | struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status = |
@@ -99,7 +99,7 @@ static u32 _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu, | |||
99 | } | 99 | } |
100 | 100 | ||
101 | 101 | ||
102 | u32 vfe_var_sw_setup(struct gk20a *g) | 102 | int vfe_var_sw_setup(struct gk20a *g) |
103 | { | 103 | { |
104 | u32 status; | 104 | u32 status; |
105 | struct boardobjgrp *pboardobjgrp = NULL; | 105 | struct boardobjgrp *pboardobjgrp = NULL; |
@@ -152,9 +152,9 @@ done: | |||
152 | return status; | 152 | return status; |
153 | } | 153 | } |
154 | 154 | ||
155 | u32 vfe_var_pmu_setup(struct gk20a *g) | 155 | int vfe_var_pmu_setup(struct gk20a *g) |
156 | { | 156 | { |
157 | u32 status; | 157 | int status; |
158 | struct boardobjgrp *pboardobjgrp = NULL; | 158 | struct boardobjgrp *pboardobjgrp = NULL; |
159 | 159 | ||
160 | nvgpu_log_info(g, " "); | 160 | nvgpu_log_info(g, " "); |
@@ -293,11 +293,11 @@ done: | |||
293 | return status; | 293 | return status; |
294 | } | 294 | } |
295 | 295 | ||
296 | static u32 _vfe_var_pmudatainit_super(struct gk20a *g, | 296 | static int _vfe_var_pmudatainit_super(struct gk20a *g, |
297 | struct boardobj *board_obj_ptr, | 297 | struct boardobj *board_obj_ptr, |
298 | struct nv_pmu_boardobj *ppmudata) | 298 | struct nv_pmu_boardobj *ppmudata) |
299 | { | 299 | { |
300 | u32 status = 0; | 300 | int status = 0; |
301 | struct vfe_var *pvfe_var; | 301 | struct vfe_var *pvfe_var; |
302 | struct nv_pmu_vfe_var *pset; | 302 | struct nv_pmu_vfe_var *pset; |
303 | 303 | ||
@@ -321,13 +321,13 @@ static u32 _vfe_var_pmudatainit_super(struct gk20a *g, | |||
321 | return status; | 321 | return status; |
322 | } | 322 | } |
323 | 323 | ||
324 | static u32 vfe_var_construct_super(struct gk20a *g, | 324 | static int vfe_var_construct_super(struct gk20a *g, |
325 | struct boardobj **ppboardobj, | 325 | struct boardobj **ppboardobj, |
326 | u16 size, void *pargs) | 326 | u16 size, void *pargs) |
327 | { | 327 | { |
328 | struct vfe_var *pvfevar; | 328 | struct vfe_var *pvfevar; |
329 | struct vfe_var *ptmpvar = (struct vfe_var *)pargs; | 329 | struct vfe_var *ptmpvar = (struct vfe_var *)pargs; |
330 | u32 status = 0; | 330 | int status = 0; |
331 | 331 | ||
332 | nvgpu_log_info(g, " "); | 332 | nvgpu_log_info(g, " "); |
333 | 333 | ||
@@ -350,11 +350,11 @@ static u32 vfe_var_construct_super(struct gk20a *g, | |||
350 | return status; | 350 | return status; |
351 | } | 351 | } |
352 | 352 | ||
353 | static u32 _vfe_var_pmudatainit_derived(struct gk20a *g, | 353 | static int _vfe_var_pmudatainit_derived(struct gk20a *g, |
354 | struct boardobj *board_obj_ptr, | 354 | struct boardobj *board_obj_ptr, |
355 | struct nv_pmu_boardobj *ppmudata) | 355 | struct nv_pmu_boardobj *ppmudata) |
356 | { | 356 | { |
357 | u32 status = 0; | 357 | int status = 0; |
358 | 358 | ||
359 | nvgpu_log_info(g, " "); | 359 | nvgpu_log_info(g, " "); |
360 | 360 | ||
@@ -363,12 +363,12 @@ static u32 _vfe_var_pmudatainit_derived(struct gk20a *g, | |||
363 | return status; | 363 | return status; |
364 | } | 364 | } |
365 | 365 | ||
366 | static u32 vfe_var_construct_derived(struct gk20a *g, | 366 | static int vfe_var_construct_derived(struct gk20a *g, |
367 | struct boardobj **ppboardobj, | 367 | struct boardobj **ppboardobj, |
368 | u16 size, void *pargs) | 368 | u16 size, void *pargs) |
369 | { | 369 | { |
370 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 370 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
371 | u32 status = 0; | 371 | int status = 0; |
372 | struct vfe_var_derived *pvfevar; | 372 | struct vfe_var_derived *pvfevar; |
373 | 373 | ||
374 | ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED); | 374 | ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED); |
@@ -384,11 +384,11 @@ static u32 vfe_var_construct_derived(struct gk20a *g, | |||
384 | return status; | 384 | return status; |
385 | } | 385 | } |
386 | 386 | ||
387 | static u32 _vfe_var_pmudatainit_derived_product(struct gk20a *g, | 387 | static int _vfe_var_pmudatainit_derived_product(struct gk20a *g, |
388 | struct boardobj *board_obj_ptr, | 388 | struct boardobj *board_obj_ptr, |
389 | struct nv_pmu_boardobj *ppmudata) | 389 | struct nv_pmu_boardobj *ppmudata) |
390 | { | 390 | { |
391 | u32 status = 0; | 391 | int status = 0; |
392 | struct vfe_var_derived_product *pvfe_var_derived_product; | 392 | struct vfe_var_derived_product *pvfe_var_derived_product; |
393 | struct nv_pmu_vfe_var_derived_product *pset; | 393 | struct nv_pmu_vfe_var_derived_product *pset; |
394 | 394 | ||
@@ -408,7 +408,7 @@ static u32 _vfe_var_pmudatainit_derived_product(struct gk20a *g, | |||
408 | return status; | 408 | return status; |
409 | } | 409 | } |
410 | 410 | ||
411 | static u32 vfe_var_construct_derived_product(struct gk20a *g, | 411 | static int vfe_var_construct_derived_product(struct gk20a *g, |
412 | struct boardobj **ppboardobj, | 412 | struct boardobj **ppboardobj, |
413 | u16 size, void *pargs) | 413 | u16 size, void *pargs) |
414 | { | 414 | { |
@@ -416,7 +416,7 @@ static u32 vfe_var_construct_derived_product(struct gk20a *g, | |||
416 | struct vfe_var_derived_product *pvfevar; | 416 | struct vfe_var_derived_product *pvfevar; |
417 | struct vfe_var_derived_product *ptmpvar = | 417 | struct vfe_var_derived_product *ptmpvar = |
418 | (struct vfe_var_derived_product *)pargs; | 418 | (struct vfe_var_derived_product *)pargs; |
419 | u32 status = 0; | 419 | int status = 0; |
420 | 420 | ||
421 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT) | 421 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT) |
422 | return -EINVAL; | 422 | return -EINVAL; |
@@ -438,11 +438,11 @@ static u32 vfe_var_construct_derived_product(struct gk20a *g, | |||
438 | return status; | 438 | return status; |
439 | } | 439 | } |
440 | 440 | ||
441 | static u32 _vfe_var_pmudatainit_derived_sum(struct gk20a *g, | 441 | static int _vfe_var_pmudatainit_derived_sum(struct gk20a *g, |
442 | struct boardobj *board_obj_ptr, | 442 | struct boardobj *board_obj_ptr, |
443 | struct nv_pmu_boardobj *ppmudata) | 443 | struct nv_pmu_boardobj *ppmudata) |
444 | { | 444 | { |
445 | u32 status = 0; | 445 | int status = 0; |
446 | struct vfe_var_derived_sum *pvfe_var_derived_sum; | 446 | struct vfe_var_derived_sum *pvfe_var_derived_sum; |
447 | struct nv_pmu_vfe_var_derived_sum *pset; | 447 | struct nv_pmu_vfe_var_derived_sum *pset; |
448 | 448 | ||
@@ -461,7 +461,7 @@ static u32 _vfe_var_pmudatainit_derived_sum(struct gk20a *g, | |||
461 | return status; | 461 | return status; |
462 | } | 462 | } |
463 | 463 | ||
464 | static u32 vfe_var_construct_derived_sum(struct gk20a *g, | 464 | static int vfe_var_construct_derived_sum(struct gk20a *g, |
465 | struct boardobj **ppboardobj, | 465 | struct boardobj **ppboardobj, |
466 | u16 size, void *pargs) | 466 | u16 size, void *pargs) |
467 | { | 467 | { |
@@ -469,7 +469,7 @@ static u32 vfe_var_construct_derived_sum(struct gk20a *g, | |||
469 | struct vfe_var_derived_sum *pvfevar; | 469 | struct vfe_var_derived_sum *pvfevar; |
470 | struct vfe_var_derived_sum *ptmpvar = | 470 | struct vfe_var_derived_sum *ptmpvar = |
471 | (struct vfe_var_derived_sum *)pargs; | 471 | (struct vfe_var_derived_sum *)pargs; |
472 | u32 status = 0; | 472 | int status = 0; |
473 | 473 | ||
474 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM) | 474 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM) |
475 | return -EINVAL; | 475 | return -EINVAL; |
@@ -490,11 +490,11 @@ static u32 vfe_var_construct_derived_sum(struct gk20a *g, | |||
490 | return status; | 490 | return status; |
491 | } | 491 | } |
492 | 492 | ||
493 | static u32 _vfe_var_pmudatainit_single(struct gk20a *g, | 493 | static int _vfe_var_pmudatainit_single(struct gk20a *g, |
494 | struct boardobj *board_obj_ptr, | 494 | struct boardobj *board_obj_ptr, |
495 | struct nv_pmu_boardobj *ppmudata) | 495 | struct nv_pmu_boardobj *ppmudata) |
496 | { | 496 | { |
497 | u32 status = 0; | 497 | int status = 0; |
498 | struct vfe_var_single *pvfe_var_single; | 498 | struct vfe_var_single *pvfe_var_single; |
499 | struct nv_pmu_vfe_var_single *pset; | 499 | struct nv_pmu_vfe_var_single *pset; |
500 | 500 | ||
@@ -514,11 +514,11 @@ static u32 _vfe_var_pmudatainit_single(struct gk20a *g, | |||
514 | return status; | 514 | return status; |
515 | } | 515 | } |
516 | 516 | ||
517 | static u32 _vfe_var_pmudatainit_single_frequency(struct gk20a *g, | 517 | static int _vfe_var_pmudatainit_single_frequency(struct gk20a *g, |
518 | struct boardobj *board_obj_ptr, | 518 | struct boardobj *board_obj_ptr, |
519 | struct nv_pmu_boardobj *ppmudata) | 519 | struct nv_pmu_boardobj *ppmudata) |
520 | { | 520 | { |
521 | u32 status = 0; | 521 | int status = 0; |
522 | 522 | ||
523 | nvgpu_log_info(g, " "); | 523 | nvgpu_log_info(g, " "); |
524 | 524 | ||
@@ -557,11 +557,11 @@ static u32 vfe_var_construct_single_frequency(struct gk20a *g, | |||
557 | return status; | 557 | return status; |
558 | } | 558 | } |
559 | 559 | ||
560 | static u32 _vfe_var_pmudatainit_single_sensed(struct gk20a *g, | 560 | static int _vfe_var_pmudatainit_single_sensed(struct gk20a *g, |
561 | struct boardobj *board_obj_ptr, | 561 | struct boardobj *board_obj_ptr, |
562 | struct nv_pmu_boardobj *ppmudata) | 562 | struct nv_pmu_boardobj *ppmudata) |
563 | { | 563 | { |
564 | u32 status = 0; | 564 | int status = 0; |
565 | 565 | ||
566 | nvgpu_log_info(g, " "); | 566 | nvgpu_log_info(g, " "); |
567 | 567 | ||
@@ -570,11 +570,11 @@ static u32 _vfe_var_pmudatainit_single_sensed(struct gk20a *g, | |||
570 | return status; | 570 | return status; |
571 | } | 571 | } |
572 | 572 | ||
573 | static u32 _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g, | 573 | static int _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g, |
574 | struct boardobj *board_obj_ptr, | 574 | struct boardobj *board_obj_ptr, |
575 | struct nv_pmu_boardobj *ppmudata) | 575 | struct nv_pmu_boardobj *ppmudata) |
576 | { | 576 | { |
577 | u32 status = 0; | 577 | int status = 0; |
578 | struct vfe_var_single_sensed_fuse *pvfe_var_single_sensed_fuse; | 578 | struct vfe_var_single_sensed_fuse *pvfe_var_single_sensed_fuse; |
579 | struct nv_pmu_vfe_var_single_sensed_fuse *pset; | 579 | struct nv_pmu_vfe_var_single_sensed_fuse *pset; |
580 | 580 | ||
@@ -696,11 +696,11 @@ exit: | |||
696 | return status; | 696 | return status; |
697 | } | 697 | } |
698 | 698 | ||
699 | static u32 _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g, | 699 | static int _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g, |
700 | struct boardobj *board_obj_ptr, | 700 | struct boardobj *board_obj_ptr, |
701 | struct nv_pmu_boardobj *ppmudata) | 701 | struct nv_pmu_boardobj *ppmudata) |
702 | { | 702 | { |
703 | u32 status = 0; | 703 | int status = 0; |
704 | struct vfe_var_single_sensed_temp *pvfe_var_single_sensed_temp; | 704 | struct vfe_var_single_sensed_temp *pvfe_var_single_sensed_temp; |
705 | struct nv_pmu_vfe_var_single_sensed_temp *pset; | 705 | struct nv_pmu_vfe_var_single_sensed_temp *pset; |
706 | 706 | ||
@@ -763,11 +763,11 @@ static u32 vfe_var_construct_single_sensed_temp(struct gk20a *g, | |||
763 | return status; | 763 | return status; |
764 | } | 764 | } |
765 | 765 | ||
766 | static u32 _vfe_var_pmudatainit_single_voltage(struct gk20a *g, | 766 | static int _vfe_var_pmudatainit_single_voltage(struct gk20a *g, |
767 | struct boardobj *board_obj_ptr, | 767 | struct boardobj *board_obj_ptr, |
768 | struct nv_pmu_boardobj *ppmudata) | 768 | struct nv_pmu_boardobj *ppmudata) |
769 | { | 769 | { |
770 | u32 status = 0; | 770 | int status = 0; |
771 | 771 | ||
772 | nvgpu_log_info(g, " "); | 772 | nvgpu_log_info(g, " "); |
773 | 773 | ||
@@ -776,13 +776,13 @@ static u32 _vfe_var_pmudatainit_single_voltage(struct gk20a *g, | |||
776 | return status; | 776 | return status; |
777 | } | 777 | } |
778 | 778 | ||
779 | static u32 vfe_var_construct_single_voltage(struct gk20a *g, | 779 | static int vfe_var_construct_single_voltage(struct gk20a *g, |
780 | struct boardobj **ppboardobj, | 780 | struct boardobj **ppboardobj, |
781 | u16 size, void *pargs) | 781 | u16 size, void *pargs) |
782 | { | 782 | { |
783 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 783 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
784 | struct vfe_var_single_voltage *pvfevar; | 784 | struct vfe_var_single_voltage *pvfevar; |
785 | u32 status = 0; | 785 | int status = 0; |
786 | 786 | ||
787 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE) | 787 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE) |
788 | return -EINVAL; | 788 | return -EINVAL; |
@@ -806,7 +806,7 @@ static u32 vfe_var_construct_single_voltage(struct gk20a *g, | |||
806 | static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs) | 806 | static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs) |
807 | { | 807 | { |
808 | struct boardobj *board_obj_ptr = NULL; | 808 | struct boardobj *board_obj_ptr = NULL; |
809 | u32 status; | 809 | int status; |
810 | 810 | ||
811 | nvgpu_log_info(g, " "); | 811 | nvgpu_log_info(g, " "); |
812 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 812 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
@@ -855,10 +855,10 @@ static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs) | |||
855 | return (struct vfe_var *)board_obj_ptr; | 855 | return (struct vfe_var *)board_obj_ptr; |
856 | } | 856 | } |
857 | 857 | ||
858 | static u32 devinit_get_vfe_var_table(struct gk20a *g, | 858 | static int devinit_get_vfe_var_table(struct gk20a *g, |
859 | struct vfe_vars *pvfevarobjs) | 859 | struct vfe_vars *pvfevarobjs) |
860 | { | 860 | { |
861 | u32 status = 0; | 861 | int status = 0; |
862 | u8 *vfevars_tbl_ptr = NULL; | 862 | u8 *vfevars_tbl_ptr = NULL; |
863 | struct vbios_vfe_3x_header_struct vfevars_tbl_header = { 0 }; | 863 | struct vbios_vfe_3x_header_struct vfevars_tbl_header = { 0 }; |
864 | struct vbios_vfe_3x_var_entry_struct var = { 0 }; | 864 | struct vbios_vfe_3x_var_entry_struct var = { 0 }; |
@@ -1035,13 +1035,13 @@ done: | |||
1035 | return status; | 1035 | return status; |
1036 | } | 1036 | } |
1037 | 1037 | ||
1038 | static u32 vfe_var_construct_single(struct gk20a *g, | 1038 | static int vfe_var_construct_single(struct gk20a *g, |
1039 | struct boardobj **ppboardobj, | 1039 | struct boardobj **ppboardobj, |
1040 | u16 size, void *pargs) | 1040 | u16 size, void *pargs) |
1041 | { | 1041 | { |
1042 | struct boardobj *ptmpobj = (struct boardobj *)pargs; | 1042 | struct boardobj *ptmpobj = (struct boardobj *)pargs; |
1043 | struct vfe_var_single *pvfevar; | 1043 | struct vfe_var_single *pvfevar; |
1044 | u32 status = 0; | 1044 | int status = 0; |
1045 | 1045 | ||
1046 | nvgpu_log_info(g, " "); | 1046 | nvgpu_log_info(g, " "); |
1047 | 1047 | ||
diff --git a/drivers/gpu/nvgpu/perf/vfe_var.h b/drivers/gpu/nvgpu/perf/vfe_var.h index 3364f994..535600a7 100644 --- a/drivers/gpu/nvgpu/perf/vfe_var.h +++ b/drivers/gpu/nvgpu/perf/vfe_var.h | |||
@@ -26,8 +26,8 @@ | |||
26 | #include "boardobj/boardobjgrp.h" | 26 | #include "boardobj/boardobjgrp.h" |
27 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> | 27 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> |
28 | 28 | ||
29 | u32 vfe_var_sw_setup(struct gk20a *g); | 29 | int vfe_var_sw_setup(struct gk20a *g); |
30 | u32 vfe_var_pmu_setup(struct gk20a *g); | 30 | int vfe_var_pmu_setup(struct gk20a *g); |
31 | 31 | ||
32 | #define VFE_VAR_GET(_pperf, _idx) \ | 32 | #define VFE_VAR_GET(_pperf, _idx) \ |
33 | ((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | 33 | ((struct vfe_var)BOARDOBJGRP_OBJ_GET_BY_IDX( \ |
diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.c b/drivers/gpu/nvgpu/pmgr/pmgr.c index 3d6a96af..6be0f82f 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.c +++ b/drivers/gpu/nvgpu/pmgr/pmgr.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -101,7 +101,7 @@ exit: | |||
101 | return status; | 101 | return status; |
102 | } | 102 | } |
103 | 103 | ||
104 | u32 pmgr_domain_pmu_setup(struct gk20a *g) | 104 | int pmgr_domain_pmu_setup(struct gk20a *g) |
105 | { | 105 | { |
106 | return pmgr_send_pmgr_tables_to_pmu(g); | 106 | return pmgr_send_pmgr_tables_to_pmu(g); |
107 | } | 107 | } |
diff --git a/drivers/gpu/nvgpu/pmgr/pmgr.h b/drivers/gpu/nvgpu/pmgr/pmgr.h index 85b1bbd1..33daf8a9 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgr.h +++ b/drivers/gpu/nvgpu/pmgr/pmgr.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general power device structures & definitions | 2 | * general power device structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -35,7 +35,7 @@ struct pmgr_pmupstate { | |||
35 | }; | 35 | }; |
36 | 36 | ||
37 | u32 pmgr_domain_sw_setup(struct gk20a *g); | 37 | u32 pmgr_domain_sw_setup(struct gk20a *g); |
38 | u32 pmgr_domain_pmu_setup(struct gk20a *g); | 38 | int pmgr_domain_pmu_setup(struct gk20a *g); |
39 | int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val); | 39 | int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val); |
40 | int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val); | 40 | int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val); |
41 | int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val); | 41 | int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val); |
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c index 3398e8df..69c43a01 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.c +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -175,11 +175,11 @@ static u32 pmgr_send_i2c_device_topology_to_pmu(struct gk20a *g) | |||
175 | return status; | 175 | return status; |
176 | } | 176 | } |
177 | 177 | ||
178 | static u32 pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) | 178 | static int pmgr_send_pwr_device_topology_to_pmu(struct gk20a *g) |
179 | { | 179 | { |
180 | struct nv_pmu_pmgr_pwr_device_desc_table *pwr_desc_table; | 180 | struct nv_pmu_pmgr_pwr_device_desc_table *pwr_desc_table; |
181 | struct nv_pmu_pmgr_pwr_device_desc_table_header *ppwr_desc_header; | 181 | struct nv_pmu_pmgr_pwr_device_desc_table_header *ppwr_desc_header; |
182 | u32 status = 0; | 182 | int status = 0; |
183 | 183 | ||
184 | /* Set the BA-device-independent HW information */ | 184 | /* Set the BA-device-independent HW information */ |
185 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); | 185 | pwr_desc_table = nvgpu_kzalloc(g, sizeof(*pwr_desc_table)); |
@@ -221,13 +221,13 @@ exit: | |||
221 | return status; | 221 | return status; |
222 | } | 222 | } |
223 | 223 | ||
224 | static u32 pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) | 224 | static int pmgr_send_pwr_mointer_to_pmu(struct gk20a *g) |
225 | { | 225 | { |
226 | struct nv_pmu_pmgr_pwr_monitor_pack *pwr_monitor_pack = NULL; | 226 | struct nv_pmu_pmgr_pwr_monitor_pack *pwr_monitor_pack = NULL; |
227 | struct nv_pmu_pmgr_pwr_channel_header *pwr_channel_hdr; | 227 | struct nv_pmu_pmgr_pwr_channel_header *pwr_channel_hdr; |
228 | struct nv_pmu_pmgr_pwr_chrelationship_header *pwr_chrelationship_header; | 228 | struct nv_pmu_pmgr_pwr_chrelationship_header *pwr_chrelationship_header; |
229 | u32 max_dmem_size; | 229 | u32 max_dmem_size; |
230 | u32 status = 0; | 230 | int status = 0; |
231 | 231 | ||
232 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); | 232 | pwr_monitor_pack = nvgpu_kzalloc(g, sizeof(*pwr_monitor_pack)); |
233 | if (!pwr_monitor_pack) | 233 | if (!pwr_monitor_pack) |
@@ -290,11 +290,11 @@ exit: | |||
290 | return status; | 290 | return status; |
291 | } | 291 | } |
292 | 292 | ||
293 | static u32 pmgr_send_pwr_policy_to_pmu(struct gk20a *g) | 293 | static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g) |
294 | { | 294 | { |
295 | struct nv_pmu_pmgr_pwr_policy_pack *ppwrpack = NULL; | 295 | struct nv_pmu_pmgr_pwr_policy_pack *ppwrpack = NULL; |
296 | struct pwr_policy *ppolicy = NULL; | 296 | struct pwr_policy *ppolicy = NULL; |
297 | u32 status = 0; | 297 | int status = 0; |
298 | u8 indx; | 298 | u8 indx; |
299 | u32 max_dmem_size; | 299 | u32 max_dmem_size; |
300 | 300 | ||
@@ -479,9 +479,9 @@ exit: | |||
479 | return status; | 479 | return status; |
480 | } | 480 | } |
481 | 481 | ||
482 | u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) | 482 | int pmgr_send_pmgr_tables_to_pmu(struct gk20a *g) |
483 | { | 483 | { |
484 | u32 status = 0; | 484 | int status = 0; |
485 | 485 | ||
486 | status = pmgr_send_i2c_device_topology_to_pmu(g); | 486 | status = pmgr_send_i2c_device_topology_to_pmu(g); |
487 | 487 | ||
diff --git a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h index 3cb9eecb..a576f384 100644 --- a/drivers/gpu/nvgpu/pmgr/pmgrpmu.h +++ b/drivers/gpu/nvgpu/pmgr/pmgrpmu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general power device control structures & definitions | 2 | * general power device control structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -28,7 +28,7 @@ | |||
28 | #include "pwrdev.h" | 28 | #include "pwrdev.h" |
29 | #include "pwrmonitor.h" | 29 | #include "pwrmonitor.h" |
30 | 30 | ||
31 | u32 pmgr_send_pmgr_tables_to_pmu(struct gk20a *g); | 31 | int pmgr_send_pmgr_tables_to_pmu(struct gk20a *g); |
32 | 32 | ||
33 | u32 pmgr_pmu_pwr_devices_query_blocking( | 33 | u32 pmgr_pmu_pwr_devices_query_blocking( |
34 | struct gk20a *g, | 34 | struct gk20a *g, |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.c b/drivers/gpu/nvgpu/pmgr/pwrdev.c index da51ac4b..235629d6 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.c +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include "boardobj/boardobjgrp_e32.h" | 28 | #include "boardobj/boardobjgrp_e32.h" |
29 | #include "gp106/bios_gp106.h" | 29 | #include "gp106/bios_gp106.h" |
30 | 30 | ||
31 | static u32 _pwr_device_pmudata_instget(struct gk20a *g, | 31 | static int _pwr_device_pmudata_instget(struct gk20a *g, |
32 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 32 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
33 | struct nv_pmu_boardobj **ppboardobjpmudata, | 33 | struct nv_pmu_boardobj **ppboardobjpmudata, |
34 | u8 idx) | 34 | u8 idx) |
@@ -51,13 +51,13 @@ static u32 _pwr_device_pmudata_instget(struct gk20a *g, | |||
51 | return 0; | 51 | return 0; |
52 | } | 52 | } |
53 | 53 | ||
54 | static u32 _pwr_domains_pmudatainit_ina3221(struct gk20a *g, | 54 | static int _pwr_domains_pmudatainit_ina3221(struct gk20a *g, |
55 | struct boardobj *board_obj_ptr, | 55 | struct boardobj *board_obj_ptr, |
56 | struct nv_pmu_boardobj *ppmudata) | 56 | struct nv_pmu_boardobj *ppmudata) |
57 | { | 57 | { |
58 | struct nv_pmu_pmgr_pwr_device_desc_ina3221 *ina3221_desc; | 58 | struct nv_pmu_pmgr_pwr_device_desc_ina3221 *ina3221_desc; |
59 | struct pwr_device_ina3221 *ina3221; | 59 | struct pwr_device_ina3221 *ina3221; |
60 | u32 status = 0; | 60 | int status = 0; |
61 | u32 indx; | 61 | u32 indx; |
62 | 62 | ||
63 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 63 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
@@ -92,7 +92,7 @@ static struct boardobj *construct_pwr_device(struct gk20a *g, | |||
92 | void *pargs, u16 pargs_size, u8 type) | 92 | void *pargs, u16 pargs_size, u8 type) |
93 | { | 93 | { |
94 | struct boardobj *board_obj_ptr = NULL; | 94 | struct boardobj *board_obj_ptr = NULL; |
95 | u32 status; | 95 | int status; |
96 | u32 indx; | 96 | u32 indx; |
97 | struct pwr_device_ina3221 *pwrdev; | 97 | struct pwr_device_ina3221 *pwrdev; |
98 | struct pwr_device_ina3221 *ina3221 = (struct pwr_device_ina3221*)pargs; | 98 | struct pwr_device_ina3221 *ina3221 = (struct pwr_device_ina3221*)pargs; |
@@ -127,10 +127,10 @@ static struct boardobj *construct_pwr_device(struct gk20a *g, | |||
127 | return board_obj_ptr; | 127 | return board_obj_ptr; |
128 | } | 128 | } |
129 | 129 | ||
130 | static u32 devinit_get_pwr_device_table(struct gk20a *g, | 130 | static int devinit_get_pwr_device_table(struct gk20a *g, |
131 | struct pwr_devices *ppwrdeviceobjs) | 131 | struct pwr_devices *ppwrdeviceobjs) |
132 | { | 132 | { |
133 | u32 status = 0; | 133 | int status = 0; |
134 | u8 *pwr_device_table_ptr = NULL; | 134 | u8 *pwr_device_table_ptr = NULL; |
135 | u8 *curr_pwr_device_table_ptr = NULL; | 135 | u8 *curr_pwr_device_table_ptr = NULL; |
136 | struct boardobj *boardobj; | 136 | struct boardobj *boardobj; |
@@ -284,9 +284,9 @@ done: | |||
284 | return status; | 284 | return status; |
285 | } | 285 | } |
286 | 286 | ||
287 | u32 pmgr_device_sw_setup(struct gk20a *g) | 287 | int pmgr_device_sw_setup(struct gk20a *g) |
288 | { | 288 | { |
289 | u32 status; | 289 | int status; |
290 | struct boardobjgrp *pboardobjgrp = NULL; | 290 | struct boardobjgrp *pboardobjgrp = NULL; |
291 | struct pwr_devices *ppwrdeviceobjs; | 291 | struct pwr_devices *ppwrdeviceobjs; |
292 | 292 | ||
diff --git a/drivers/gpu/nvgpu/pmgr/pwrdev.h b/drivers/gpu/nvgpu/pmgr/pwrdev.h index 1d9acb89..72cca1fb 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrdev.h +++ b/drivers/gpu/nvgpu/pmgr/pwrdev.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general power device structures & definitions | 2 | * general power device structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -55,6 +55,6 @@ struct pwr_device_ina3221 { | |||
55 | s16 curr_correct_b; | 55 | s16 curr_correct_b; |
56 | } ; | 56 | } ; |
57 | 57 | ||
58 | u32 pmgr_device_sw_setup(struct gk20a *g); | 58 | int pmgr_device_sw_setup(struct gk20a *g); |
59 | 59 | ||
60 | #endif | 60 | #endif |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c index 5e0cc966..53c7a1c4 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.c +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include "boardobj/boardobjgrp_e32.h" | 28 | #include "boardobj/boardobjgrp_e32.h" |
29 | #include "gp106/bios_gp106.h" | 29 | #include "gp106/bios_gp106.h" |
30 | 30 | ||
31 | static u32 _pwr_channel_pmudata_instget(struct gk20a *g, | 31 | static int _pwr_channel_pmudata_instget(struct gk20a *g, |
32 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 32 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
33 | struct nv_pmu_boardobj **ppboardobjpmudata, | 33 | struct nv_pmu_boardobj **ppboardobjpmudata, |
34 | u8 idx) | 34 | u8 idx) |
@@ -54,7 +54,7 @@ static u32 _pwr_channel_pmudata_instget(struct gk20a *g, | |||
54 | return 0; | 54 | return 0; |
55 | } | 55 | } |
56 | 56 | ||
57 | static u32 _pwr_channel_rels_pmudata_instget(struct gk20a *g, | 57 | static int _pwr_channel_rels_pmudata_instget(struct gk20a *g, |
58 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 58 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
59 | struct nv_pmu_boardobj **ppboardobjpmudata, | 59 | struct nv_pmu_boardobj **ppboardobjpmudata, |
60 | u8 idx) | 60 | u8 idx) |
@@ -105,13 +105,13 @@ static bool _pwr_channel_implements(struct pwr_channel *pchannel, | |||
105 | return (type == BOARDOBJ_GET_TYPE(pchannel)); | 105 | return (type == BOARDOBJ_GET_TYPE(pchannel)); |
106 | } | 106 | } |
107 | 107 | ||
108 | static u32 _pwr_domains_pmudatainit_sensor(struct gk20a *g, | 108 | static int _pwr_domains_pmudatainit_sensor(struct gk20a *g, |
109 | struct boardobj *board_obj_ptr, | 109 | struct boardobj *board_obj_ptr, |
110 | struct nv_pmu_boardobj *ppmudata) | 110 | struct nv_pmu_boardobj *ppmudata) |
111 | { | 111 | { |
112 | struct nv_pmu_pmgr_pwr_channel_sensor *pmu_sensor_data; | 112 | struct nv_pmu_pmgr_pwr_channel_sensor *pmu_sensor_data; |
113 | struct pwr_channel_sensor *sensor; | 113 | struct pwr_channel_sensor *sensor; |
114 | u32 status = 0; | 114 | int status = 0; |
115 | 115 | ||
116 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 116 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
117 | if (status) { | 117 | if (status) { |
@@ -144,7 +144,7 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, | |||
144 | void *pargs, u16 pargs_size, u8 type) | 144 | void *pargs, u16 pargs_size, u8 type) |
145 | { | 145 | { |
146 | struct boardobj *board_obj_ptr = NULL; | 146 | struct boardobj *board_obj_ptr = NULL; |
147 | u32 status; | 147 | int status; |
148 | struct pwr_channel_sensor *pwrchannel; | 148 | struct pwr_channel_sensor *pwrchannel; |
149 | struct pwr_channel_sensor *sensor = (struct pwr_channel_sensor*)pargs; | 149 | struct pwr_channel_sensor *sensor = (struct pwr_channel_sensor*)pargs; |
150 | 150 | ||
@@ -174,10 +174,10 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g, | |||
174 | return board_obj_ptr; | 174 | return board_obj_ptr; |
175 | } | 175 | } |
176 | 176 | ||
177 | static u32 devinit_get_pwr_topology_table(struct gk20a *g, | 177 | static int devinit_get_pwr_topology_table(struct gk20a *g, |
178 | struct pmgr_pwr_monitor *ppwrmonitorobjs) | 178 | struct pmgr_pwr_monitor *ppwrmonitorobjs) |
179 | { | 179 | { |
180 | u32 status = 0; | 180 | int status = 0; |
181 | u8 *pwr_topology_table_ptr = NULL; | 181 | u8 *pwr_topology_table_ptr = NULL; |
182 | u8 *curr_pwr_topology_table_ptr = NULL; | 182 | u8 *curr_pwr_topology_table_ptr = NULL; |
183 | struct boardobj *boardobj; | 183 | struct boardobj *boardobj; |
@@ -296,9 +296,9 @@ done: | |||
296 | return status; | 296 | return status; |
297 | } | 297 | } |
298 | 298 | ||
299 | u32 pmgr_monitor_sw_setup(struct gk20a *g) | 299 | int pmgr_monitor_sw_setup(struct gk20a *g) |
300 | { | 300 | { |
301 | u32 status; | 301 | int status; |
302 | struct boardobjgrp *pboardobjgrp = NULL; | 302 | struct boardobjgrp *pboardobjgrp = NULL; |
303 | struct pwr_channel *pchannel; | 303 | struct pwr_channel *pchannel; |
304 | struct pmgr_pwr_monitor *ppwrmonitorobjs; | 304 | struct pmgr_pwr_monitor *ppwrmonitorobjs; |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h index 4f094c3e..da52b08a 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrmonitor.h +++ b/drivers/gpu/nvgpu/pmgr/pwrmonitor.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general power channel structures & definitions | 2 | * general power channel structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -64,6 +64,6 @@ struct pmgr_pwr_monitor { | |||
64 | ((struct pwr_channel *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | 64 | ((struct pwr_channel *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ |
65 | &(g->pmgr_pmu.pmgr_monitorobjs.pwr_channels.super), (channel_idx))) | 65 | &(g->pmgr_pmu.pmgr_monitorobjs.pwr_channels.super), (channel_idx))) |
66 | 66 | ||
67 | u32 pmgr_monitor_sw_setup(struct gk20a *g); | 67 | int pmgr_monitor_sw_setup(struct gk20a *g); |
68 | 68 | ||
69 | #endif | 69 | #endif |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c index 38575f74..13a94e4f 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.c +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.c | |||
@@ -182,7 +182,7 @@ static u32 _pwr_policy_limitarboutputget(struct gk20a *g, | |||
182 | return _pwr_policy_limitarboutputget_helper(p_limit_arb); | 182 | return _pwr_policy_limitarboutputget_helper(p_limit_arb); |
183 | } | 183 | } |
184 | 184 | ||
185 | static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, | 185 | static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, |
186 | struct boardobj *board_obj_ptr, | 186 | struct boardobj *board_obj_ptr, |
187 | struct nv_pmu_boardobj *ppmudata) | 187 | struct nv_pmu_boardobj *ppmudata) |
188 | { | 188 | { |
@@ -190,7 +190,7 @@ static u32 _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g, | |||
190 | struct pwr_policy_hw_threshold *p_hw_threshold; | 190 | struct pwr_policy_hw_threshold *p_hw_threshold; |
191 | struct pwr_policy *p_pwr_policy; | 191 | struct pwr_policy *p_pwr_policy; |
192 | struct nv_pmu_pmgr_pwr_policy *pmu_pwr_policy; | 192 | struct nv_pmu_pmgr_pwr_policy *pmu_pwr_policy; |
193 | u32 status = 0; | 193 | int status = 0; |
194 | 194 | ||
195 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 195 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
196 | if (status) { | 196 | if (status) { |
@@ -256,7 +256,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, | |||
256 | void *pargs, u16 pargs_size, u8 type) | 256 | void *pargs, u16 pargs_size, u8 type) |
257 | { | 257 | { |
258 | struct boardobj *board_obj_ptr = NULL; | 258 | struct boardobj *board_obj_ptr = NULL; |
259 | u32 status; | 259 | int status; |
260 | struct pwr_policy_hw_threshold *pwrpolicyhwthreshold; | 260 | struct pwr_policy_hw_threshold *pwrpolicyhwthreshold; |
261 | struct pwr_policy *pwrpolicy; | 261 | struct pwr_policy *pwrpolicy; |
262 | struct pwr_policy *pwrpolicyparams = (struct pwr_policy*)pargs; | 262 | struct pwr_policy *pwrpolicyparams = (struct pwr_policy*)pargs; |
@@ -363,13 +363,13 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g, | |||
363 | return board_obj_ptr; | 363 | return board_obj_ptr; |
364 | } | 364 | } |
365 | 365 | ||
366 | static u32 _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, | 366 | static int _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g, |
367 | struct pmgr_pwr_policy *ppwrpolicyobjs, | 367 | struct pmgr_pwr_policy *ppwrpolicyobjs, |
368 | union pwr_policy_data_union *ppwrpolicydata, | 368 | union pwr_policy_data_union *ppwrpolicydata, |
369 | u16 pwr_policy_size, | 369 | u16 pwr_policy_size, |
370 | u32 obj_index) | 370 | u32 obj_index) |
371 | { | 371 | { |
372 | u32 status = 0; | 372 | int status = 0; |
373 | struct boardobj *boardobj; | 373 | struct boardobj *boardobj; |
374 | 374 | ||
375 | /* WARN policy */ | 375 | /* WARN policy */ |
@@ -512,10 +512,10 @@ static inline void devinit_unpack_pwr_policy_entry( | |||
512 | __UNPACK_FIELD(unpacked, packed, filter_param); | 512 | __UNPACK_FIELD(unpacked, packed, filter_param); |
513 | } | 513 | } |
514 | 514 | ||
515 | static u32 devinit_get_pwr_policy_table(struct gk20a *g, | 515 | static int devinit_get_pwr_policy_table(struct gk20a *g, |
516 | struct pmgr_pwr_policy *ppwrpolicyobjs) | 516 | struct pmgr_pwr_policy *ppwrpolicyobjs) |
517 | { | 517 | { |
518 | u32 status = 0; | 518 | int status = 0; |
519 | u8 *ptr = NULL; | 519 | u8 *ptr = NULL; |
520 | struct boardobj *boardobj; | 520 | struct boardobj *boardobj; |
521 | struct pwr_policy_3x_header_struct *packed_hdr; | 521 | struct pwr_policy_3x_header_struct *packed_hdr; |
@@ -707,9 +707,9 @@ done: | |||
707 | return status; | 707 | return status; |
708 | } | 708 | } |
709 | 709 | ||
710 | u32 pmgr_policy_sw_setup(struct gk20a *g) | 710 | int pmgr_policy_sw_setup(struct gk20a *g) |
711 | { | 711 | { |
712 | u32 status; | 712 | int status; |
713 | struct boardobjgrp *pboardobjgrp = NULL; | 713 | struct boardobjgrp *pboardobjgrp = NULL; |
714 | struct pwr_policy *ppolicy; | 714 | struct pwr_policy *ppolicy; |
715 | struct pmgr_pwr_policy *ppwrpolicyobjs; | 715 | struct pmgr_pwr_policy *ppwrpolicyobjs; |
diff --git a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h index 9bc99bb7..12936a3e 100644 --- a/drivers/gpu/nvgpu/pmgr/pwrpolicy.h +++ b/drivers/gpu/nvgpu/pmgr/pwrpolicy.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general power channel structures & definitions | 2 | * general power channel structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -131,6 +131,6 @@ union pwr_policy_data_union { | |||
131 | #define PMGR_PWR_POLICY_INCREMENT_LIMIT_INPUT_COUNT(ppolicy) \ | 131 | #define PMGR_PWR_POLICY_INCREMENT_LIMIT_INPUT_COUNT(ppolicy) \ |
132 | ((ppolicy)->num_limit_inputs++) | 132 | ((ppolicy)->num_limit_inputs++) |
133 | 133 | ||
134 | u32 pmgr_policy_sw_setup(struct gk20a *g); | 134 | int pmgr_policy_sw_setup(struct gk20a *g); |
135 | 135 | ||
136 | #endif | 136 | #endif |
diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index 6c9d7736..9b7d9b7e 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c | |||
@@ -44,7 +44,7 @@ void gk20a_deinit_pstate_support(struct gk20a *g) | |||
44 | /*sw setup for pstate components*/ | 44 | /*sw setup for pstate components*/ |
45 | int gk20a_init_pstate_support(struct gk20a *g) | 45 | int gk20a_init_pstate_support(struct gk20a *g) |
46 | { | 46 | { |
47 | u32 err; | 47 | int err; |
48 | 48 | ||
49 | nvgpu_log_fn(g, " "); | 49 | nvgpu_log_fn(g, " "); |
50 | 50 | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.c b/drivers/gpu/nvgpu/therm/thrmchannel.c index de3de62a..7d196422 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.c +++ b/drivers/gpu/nvgpu/therm/thrmchannel.c | |||
@@ -29,11 +29,11 @@ | |||
29 | #include "boardobj/boardobjgrp_e32.h" | 29 | #include "boardobj/boardobjgrp_e32.h" |
30 | #include "gp106/bios_gp106.h" | 30 | #include "gp106/bios_gp106.h" |
31 | 31 | ||
32 | static u32 _therm_channel_pmudatainit_device(struct gk20a *g, | 32 | static int _therm_channel_pmudatainit_device(struct gk20a *g, |
33 | struct boardobj *board_obj_ptr, | 33 | struct boardobj *board_obj_ptr, |
34 | struct nv_pmu_boardobj *ppmudata) | 34 | struct nv_pmu_boardobj *ppmudata) |
35 | { | 35 | { |
36 | u32 status = 0; | 36 | int status = 0; |
37 | struct therm_channel *pchannel; | 37 | struct therm_channel *pchannel; |
38 | struct therm_channel_device *ptherm_channel; | 38 | struct therm_channel_device *ptherm_channel; |
39 | struct nv_pmu_therm_therm_channel_device_boardobj_set *pset; | 39 | struct nv_pmu_therm_therm_channel_device_boardobj_set *pset; |
@@ -68,7 +68,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g, | |||
68 | struct boardobj *board_obj_ptr = NULL; | 68 | struct boardobj *board_obj_ptr = NULL; |
69 | struct therm_channel *pchannel; | 69 | struct therm_channel *pchannel; |
70 | struct therm_channel_device *pchannel_device; | 70 | struct therm_channel_device *pchannel_device; |
71 | u32 status; | 71 | int status; |
72 | struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs; | 72 | struct therm_channel_device *therm_device = (struct therm_channel_device*)pargs; |
73 | 73 | ||
74 | status = boardobj_construct_super(g, &board_obj_ptr, | 74 | status = boardobj_construct_super(g, &board_obj_ptr, |
@@ -95,7 +95,7 @@ static struct boardobj *construct_channel_device(struct gk20a *g, | |||
95 | return board_obj_ptr; | 95 | return board_obj_ptr; |
96 | } | 96 | } |
97 | 97 | ||
98 | static u32 _therm_channel_pmudata_instget(struct gk20a *g, | 98 | static int _therm_channel_pmudata_instget(struct gk20a *g, |
99 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 99 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
100 | struct nv_pmu_boardobj **ppboardobjpmudata, | 100 | struct nv_pmu_boardobj **ppboardobjpmudata, |
101 | u8 idx) | 101 | u8 idx) |
@@ -119,10 +119,10 @@ static u32 _therm_channel_pmudata_instget(struct gk20a *g, | |||
119 | return 0; | 119 | return 0; |
120 | } | 120 | } |
121 | 121 | ||
122 | static u32 devinit_get_therm_channel_table(struct gk20a *g, | 122 | static int devinit_get_therm_channel_table(struct gk20a *g, |
123 | struct therm_channels *pthermchannelobjs) | 123 | struct therm_channels *pthermchannelobjs) |
124 | { | 124 | { |
125 | u32 status = 0; | 125 | int status = 0; |
126 | u8 *therm_channel_table_ptr = NULL; | 126 | u8 *therm_channel_table_ptr = NULL; |
127 | u8 *curr_therm_channel_table_ptr = NULL; | 127 | u8 *curr_therm_channel_table_ptr = NULL; |
128 | struct boardobj *boardobj; | 128 | struct boardobj *boardobj; |
@@ -210,9 +210,9 @@ done: | |||
210 | return status; | 210 | return status; |
211 | } | 211 | } |
212 | 212 | ||
213 | u32 therm_channel_sw_setup(struct gk20a *g) | 213 | int therm_channel_sw_setup(struct gk20a *g) |
214 | { | 214 | { |
215 | u32 status; | 215 | int status; |
216 | struct boardobjgrp *pboardobjgrp = NULL; | 216 | struct boardobjgrp *pboardobjgrp = NULL; |
217 | struct therm_channels *pthermchannelobjs; | 217 | struct therm_channels *pthermchannelobjs; |
218 | 218 | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmchannel.h b/drivers/gpu/nvgpu/therm/thrmchannel.h index 4e0dd2e4..a2045c26 100644 --- a/drivers/gpu/nvgpu/therm/thrmchannel.h +++ b/drivers/gpu/nvgpu/therm/thrmchannel.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general thermal device structures & definitions | 2 | * general thermal device structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -46,6 +46,6 @@ struct therm_channel_device { | |||
46 | u8 therm_dev_prov_idx; | 46 | u8 therm_dev_prov_idx; |
47 | }; | 47 | }; |
48 | 48 | ||
49 | u32 therm_channel_sw_setup(struct gk20a *g); | 49 | int therm_channel_sw_setup(struct gk20a *g); |
50 | 50 | ||
51 | #endif | 51 | #endif |
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.c b/drivers/gpu/nvgpu/therm/thrmdev.c index aaf0a461..ddd1f280 100644 --- a/drivers/gpu/nvgpu/therm/thrmdev.c +++ b/drivers/gpu/nvgpu/therm/thrmdev.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include "gp106/bios_gp106.h" | 30 | #include "gp106/bios_gp106.h" |
31 | #include "ctrl/ctrltherm.h" | 31 | #include "ctrl/ctrltherm.h" |
32 | 32 | ||
33 | static u32 _therm_device_pmudata_instget(struct gk20a *g, | 33 | static int _therm_device_pmudata_instget(struct gk20a *g, |
34 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 34 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
35 | struct nv_pmu_boardobj **ppboardobjpmudata, | 35 | struct nv_pmu_boardobj **ppboardobjpmudata, |
36 | u8 idx) | 36 | u8 idx) |
@@ -54,29 +54,29 @@ static u32 _therm_device_pmudata_instget(struct gk20a *g, | |||
54 | return 0; | 54 | return 0; |
55 | } | 55 | } |
56 | 56 | ||
57 | static u32 construct_therm_device(struct gk20a *g, | 57 | static int construct_therm_device(struct gk20a *g, |
58 | struct boardobj **ppboardobj, u16 size, void *pargs) | 58 | struct boardobj **ppboardobj, u16 size, void *pargs) |
59 | { | 59 | { |
60 | return boardobj_construct_super(g, ppboardobj, size, pargs); | 60 | return boardobj_construct_super(g, ppboardobj, size, pargs); |
61 | } | 61 | } |
62 | 62 | ||
63 | static u32 construct_therm_device_gpu(struct gk20a *g, | 63 | static int construct_therm_device_gpu(struct gk20a *g, |
64 | struct boardobj **ppboardobj, u16 size, void *pargs) | 64 | struct boardobj **ppboardobj, u16 size, void *pargs) |
65 | { | 65 | { |
66 | return construct_therm_device(g, ppboardobj, size, pargs); | 66 | return construct_therm_device(g, ppboardobj, size, pargs); |
67 | } | 67 | } |
68 | 68 | ||
69 | static u32 construct_therm_device_gpu_sci(struct gk20a *g, | 69 | static int construct_therm_device_gpu_sci(struct gk20a *g, |
70 | struct boardobj **ppboardobj, u16 size, void *pargs) | 70 | struct boardobj **ppboardobj, u16 size, void *pargs) |
71 | { | 71 | { |
72 | return construct_therm_device(g, ppboardobj, size, pargs); | 72 | return construct_therm_device(g, ppboardobj, size, pargs); |
73 | } | 73 | } |
74 | 74 | ||
75 | 75 | ||
76 | static u32 therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g, | 76 | static int therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g, |
77 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) | 77 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) |
78 | { | 78 | { |
79 | u32 status = 0; | 79 | int status = 0; |
80 | struct therm_device_gpu_gpc_tsosc *pdev = NULL; | 80 | struct therm_device_gpu_gpc_tsosc *pdev = NULL; |
81 | struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *pset; | 81 | struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *pset; |
82 | 82 | ||
@@ -95,13 +95,13 @@ exit: | |||
95 | return status; | 95 | return status; |
96 | } | 96 | } |
97 | 97 | ||
98 | static u32 construct_therm_device_gpu_tsosc(struct gk20a *g, | 98 | static int construct_therm_device_gpu_tsosc(struct gk20a *g, |
99 | struct boardobj **ppboardobj, u16 size, void *pargs) | 99 | struct boardobj **ppboardobj, u16 size, void *pargs) |
100 | { | 100 | { |
101 | struct therm_device_gpu_gpc_tsosc *pdev = NULL; | 101 | struct therm_device_gpu_gpc_tsosc *pdev = NULL; |
102 | struct therm_device_gpu_gpc_tsosc *ptmp_dev = | 102 | struct therm_device_gpu_gpc_tsosc *ptmp_dev = |
103 | (struct therm_device_gpu_gpc_tsosc *)pargs; | 103 | (struct therm_device_gpu_gpc_tsosc *)pargs; |
104 | u32 status = 0; | 104 | int status = 0; |
105 | 105 | ||
106 | status = construct_therm_device(g, ppboardobj, size, pargs); | 106 | status = construct_therm_device(g, ppboardobj, size, pargs); |
107 | if (status != 0) { | 107 | if (status != 0) { |
@@ -118,10 +118,10 @@ static u32 construct_therm_device_gpu_tsosc(struct gk20a *g, | |||
118 | return status; | 118 | return status; |
119 | } | 119 | } |
120 | 120 | ||
121 | static u32 therm_device_pmu_data_init_hbm2_site(struct gk20a *g, | 121 | static int therm_device_pmu_data_init_hbm2_site(struct gk20a *g, |
122 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) | 122 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) |
123 | { | 123 | { |
124 | u32 status = 0; | 124 | int status = 0; |
125 | struct therm_device_hbm2_site *pdev = NULL; | 125 | struct therm_device_hbm2_site *pdev = NULL; |
126 | struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *pset; | 126 | struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *pset; |
127 | 127 | ||
@@ -140,13 +140,13 @@ exit: | |||
140 | return status; | 140 | return status; |
141 | } | 141 | } |
142 | 142 | ||
143 | static u32 construct_therm_device_hbm2_site(struct gk20a *g, | 143 | static int construct_therm_device_hbm2_site(struct gk20a *g, |
144 | struct boardobj **ppboardobj, u16 size, void *pargs) | 144 | struct boardobj **ppboardobj, u16 size, void *pargs) |
145 | { | 145 | { |
146 | struct therm_device_hbm2_site *pdev = NULL; | 146 | struct therm_device_hbm2_site *pdev = NULL; |
147 | struct therm_device_hbm2_site *ptmp_dev = | 147 | struct therm_device_hbm2_site *ptmp_dev = |
148 | (struct therm_device_hbm2_site *)pargs; | 148 | (struct therm_device_hbm2_site *)pargs; |
149 | u32 status = 0; | 149 | int status = 0; |
150 | 150 | ||
151 | status = construct_therm_device(g, ppboardobj, size, pargs); | 151 | status = construct_therm_device(g, ppboardobj, size, pargs); |
152 | if (status != 0) { | 152 | if (status != 0) { |
@@ -163,7 +163,7 @@ static u32 construct_therm_device_hbm2_site(struct gk20a *g, | |||
163 | return status; | 163 | return status; |
164 | } | 164 | } |
165 | 165 | ||
166 | static u32 construct_therm_device_hbm2_combined(struct gk20a *g, | 166 | static int construct_therm_device_hbm2_combined(struct gk20a *g, |
167 | struct boardobj **ppboardobj, u16 size, void *pargs) | 167 | struct boardobj **ppboardobj, u16 size, void *pargs) |
168 | { | 168 | { |
169 | return construct_therm_device(g, ppboardobj, size, pargs); | 169 | return construct_therm_device(g, ppboardobj, size, pargs); |
@@ -174,7 +174,7 @@ static struct boardobj *therm_device_construct(struct gk20a *g, | |||
174 | void *pargs) | 174 | void *pargs) |
175 | { | 175 | { |
176 | struct boardobj *board_obj_ptr = NULL; | 176 | struct boardobj *board_obj_ptr = NULL; |
177 | u32 status = 0; | 177 | int status = 0; |
178 | 178 | ||
179 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 179 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
180 | case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU: | 180 | case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU: |
@@ -216,10 +216,10 @@ static struct boardobj *therm_device_construct(struct gk20a *g, | |||
216 | return board_obj_ptr; | 216 | return board_obj_ptr; |
217 | } | 217 | } |
218 | 218 | ||
219 | static u32 devinit_get_therm_device_table(struct gk20a *g, | 219 | static int devinit_get_therm_device_table(struct gk20a *g, |
220 | struct therm_devices *pthermdeviceobjs) | 220 | struct therm_devices *pthermdeviceobjs) |
221 | { | 221 | { |
222 | u32 status = 0; | 222 | int status = 0; |
223 | u8 *therm_device_table_ptr = NULL; | 223 | u8 *therm_device_table_ptr = NULL; |
224 | u8 *curr_therm_device_table_ptr = NULL; | 224 | u8 *curr_therm_device_table_ptr = NULL; |
225 | struct boardobj *boardobj; | 225 | struct boardobj *boardobj; |
@@ -324,9 +324,9 @@ done: | |||
324 | return status; | 324 | return status; |
325 | } | 325 | } |
326 | 326 | ||
327 | u32 therm_device_sw_setup(struct gk20a *g) | 327 | int therm_device_sw_setup(struct gk20a *g) |
328 | { | 328 | { |
329 | u32 status; | 329 | int status; |
330 | struct boardobjgrp *pboardobjgrp = NULL; | 330 | struct boardobjgrp *pboardobjgrp = NULL; |
331 | struct therm_devices *pthermdeviceobjs; | 331 | struct therm_devices *pthermdeviceobjs; |
332 | 332 | ||
diff --git a/drivers/gpu/nvgpu/therm/thrmdev.h b/drivers/gpu/nvgpu/therm/thrmdev.h index af349c88..df4c199a 100644 --- a/drivers/gpu/nvgpu/therm/thrmdev.h +++ b/drivers/gpu/nvgpu/therm/thrmdev.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general thermal device structures & definitions | 2 | * general thermal device structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -53,6 +53,6 @@ struct therm_device_hbm2_combined { | |||
53 | struct therm_device super; | 53 | struct therm_device super; |
54 | }; | 54 | }; |
55 | 55 | ||
56 | u32 therm_device_sw_setup(struct gk20a *g); | 56 | int therm_device_sw_setup(struct gk20a *g); |
57 | 57 | ||
58 | #endif | 58 | #endif |
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.c b/drivers/gpu/nvgpu/therm/thrmpmu.c index 6a79cc3e..7814cf5e 100644 --- a/drivers/gpu/nvgpu/therm/thrmpmu.c +++ b/drivers/gpu/nvgpu/therm/thrmpmu.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -50,9 +50,9 @@ static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, | |||
50 | phandlerparams->success = 1; | 50 | phandlerparams->success = 1; |
51 | } | 51 | } |
52 | 52 | ||
53 | u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g) | 53 | int therm_send_pmgr_tables_to_pmu(struct gk20a *g) |
54 | { | 54 | { |
55 | u32 status = 0; | 55 | int status = 0; |
56 | struct boardobjgrp *pboardobjgrp = NULL; | 56 | struct boardobjgrp *pboardobjgrp = NULL; |
57 | 57 | ||
58 | if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) { | 58 | if (!BOARDOBJGRP_IS_EMPTY(&g->therm_pmu.therm_deviceobjs.super.super)) { |
diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.h b/drivers/gpu/nvgpu/therm/thrmpmu.h index 1813ce6c..1341a055 100644 --- a/drivers/gpu/nvgpu/therm/thrmpmu.h +++ b/drivers/gpu/nvgpu/therm/thrmpmu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * general thermal pmu control structures & definitions | 2 | * general thermal pmu control structures & definitions |
3 | * | 3 | * |
4 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -24,7 +24,7 @@ | |||
24 | #ifndef _THRMPMU_H_ | 24 | #ifndef _THRMPMU_H_ |
25 | #define _THRMPMU_H_ | 25 | #define _THRMPMU_H_ |
26 | 26 | ||
27 | u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g); | 27 | int therm_send_pmgr_tables_to_pmu(struct gk20a *g); |
28 | 28 | ||
29 | u32 therm_configure_therm_alert(struct gk20a *g); | 29 | u32 therm_configure_therm_alert(struct gk20a *g); |
30 | 30 | ||
diff --git a/drivers/gpu/nvgpu/volt/volt_dev.c b/drivers/gpu/nvgpu/volt/volt_dev.c index 728b0eaf..b6e69a37 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.c +++ b/drivers/gpu/nvgpu/volt/volt_dev.c | |||
@@ -38,10 +38,10 @@ | |||
38 | #define VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID 0 | 38 | #define VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID 0 |
39 | #define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1 | 39 | #define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1 |
40 | 40 | ||
41 | static u32 volt_device_pmu_data_init_super(struct gk20a *g, | 41 | static int volt_device_pmu_data_init_super(struct gk20a *g, |
42 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) | 42 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) |
43 | { | 43 | { |
44 | u32 status; | 44 | int status; |
45 | struct voltage_device *pdev; | 45 | struct voltage_device *pdev; |
46 | struct nv_pmu_volt_volt_device_boardobj_set *pset; | 46 | struct nv_pmu_volt_volt_device_boardobj_set *pset; |
47 | 47 | ||
@@ -61,10 +61,10 @@ static u32 volt_device_pmu_data_init_super(struct gk20a *g, | |||
61 | return status; | 61 | return status; |
62 | } | 62 | } |
63 | 63 | ||
64 | static u32 volt_device_pmu_data_init_pwm(struct gk20a *g, | 64 | static int volt_device_pmu_data_init_pwm(struct gk20a *g, |
65 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) | 65 | struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata) |
66 | { | 66 | { |
67 | u32 status = 0; | 67 | int status = 0; |
68 | struct voltage_device_pwm *pdev; | 68 | struct voltage_device_pwm *pdev; |
69 | struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset; | 69 | struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset; |
70 | 70 | ||
@@ -84,12 +84,12 @@ static u32 volt_device_pmu_data_init_pwm(struct gk20a *g, | |||
84 | return status; | 84 | return status; |
85 | } | 85 | } |
86 | 86 | ||
87 | static u32 construct_volt_device(struct gk20a *g, | 87 | static int construct_volt_device(struct gk20a *g, |
88 | struct boardobj **ppboardobj, u16 size, void *pargs) | 88 | struct boardobj **ppboardobj, u16 size, void *pargs) |
89 | { | 89 | { |
90 | struct voltage_device *ptmp_dev = (struct voltage_device *)pargs; | 90 | struct voltage_device *ptmp_dev = (struct voltage_device *)pargs; |
91 | struct voltage_device *pvolt_dev = NULL; | 91 | struct voltage_device *pvolt_dev = NULL; |
92 | u32 status = 0; | 92 | int status = 0; |
93 | 93 | ||
94 | status = boardobj_construct_super(g, ppboardobj, size, pargs); | 94 | status = boardobj_construct_super(g, ppboardobj, size, pargs); |
95 | if (status) { | 95 | if (status) { |
@@ -113,7 +113,7 @@ static u32 construct_volt_device(struct gk20a *g, | |||
113 | return status; | 113 | return status; |
114 | } | 114 | } |
115 | 115 | ||
116 | static u32 construct_pwm_volt_device(struct gk20a *g, | 116 | static int construct_pwm_volt_device(struct gk20a *g, |
117 | struct boardobj **ppboardobj, | 117 | struct boardobj **ppboardobj, |
118 | u16 size, void *pargs) | 118 | u16 size, void *pargs) |
119 | { | 119 | { |
@@ -121,7 +121,7 @@ static u32 construct_pwm_volt_device(struct gk20a *g, | |||
121 | struct voltage_device_pwm *ptmp_dev = | 121 | struct voltage_device_pwm *ptmp_dev = |
122 | (struct voltage_device_pwm *)pargs; | 122 | (struct voltage_device_pwm *)pargs; |
123 | struct voltage_device_pwm *pdev = NULL; | 123 | struct voltage_device_pwm *pdev = NULL; |
124 | u32 status = 0; | 124 | int status = 0; |
125 | 125 | ||
126 | status = construct_volt_device(g, ppboardobj, size, pargs); | 126 | status = construct_volt_device(g, ppboardobj, size, pargs); |
127 | if (status) { | 127 | if (status) { |
@@ -186,7 +186,7 @@ static struct voltage_device *volt_volt_device_construct(struct gk20a *g, | |||
186 | struct boardobj *pboard_obj = NULL; | 186 | struct boardobj *pboard_obj = NULL; |
187 | 187 | ||
188 | if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) { | 188 | if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) { |
189 | u32 status = construct_pwm_volt_device(g, &pboard_obj, | 189 | int status = construct_pwm_volt_device(g, &pboard_obj, |
190 | sizeof(struct voltage_device_pwm), pargs); | 190 | sizeof(struct voltage_device_pwm), pargs); |
191 | if (status) { | 191 | if (status) { |
192 | nvgpu_err(g, | 192 | nvgpu_err(g, |
@@ -199,12 +199,12 @@ static struct voltage_device *volt_volt_device_construct(struct gk20a *g, | |||
199 | return (struct voltage_device *)pboard_obj; | 199 | return (struct voltage_device *)pboard_obj; |
200 | } | 200 | } |
201 | 201 | ||
202 | static u32 volt_get_voltage_device_table_1x_psv(struct gk20a *g, | 202 | static int volt_get_voltage_device_table_1x_psv(struct gk20a *g, |
203 | struct vbios_voltage_device_table_1x_entry *p_bios_entry, | 203 | struct vbios_voltage_device_table_1x_entry *p_bios_entry, |
204 | struct voltage_device_metadata *p_Volt_Device_Meta_Data, | 204 | struct voltage_device_metadata *p_Volt_Device_Meta_Data, |
205 | u8 entry_Idx) | 205 | u8 entry_Idx) |
206 | { | 206 | { |
207 | u32 status = 0; | 207 | int status = 0; |
208 | u32 entry_cnt = 0; | 208 | u32 entry_cnt = 0; |
209 | struct voltage_device *pvolt_dev = NULL; | 209 | struct voltage_device *pvolt_dev = NULL; |
210 | struct voltage_device_pwm *pvolt_dev_pwm = NULL; | 210 | struct voltage_device_pwm *pvolt_dev_pwm = NULL; |
@@ -413,7 +413,7 @@ done: | |||
413 | return status; | 413 | return status; |
414 | } | 414 | } |
415 | 415 | ||
416 | static u32 _volt_device_devgrp_pmudata_instget(struct gk20a *g, | 416 | static int _volt_device_devgrp_pmudata_instget(struct gk20a *g, |
417 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 417 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
418 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) | 418 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) |
419 | { | 419 | { |
@@ -435,7 +435,7 @@ static u32 _volt_device_devgrp_pmudata_instget(struct gk20a *g, | |||
435 | return 0; | 435 | return 0; |
436 | } | 436 | } |
437 | 437 | ||
438 | static u32 _volt_device_devgrp_pmustatus_instget(struct gk20a *g, | 438 | static int _volt_device_devgrp_pmustatus_instget(struct gk20a *g, |
439 | void *pboardobjgrppmu, | 439 | void *pboardobjgrppmu, |
440 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) | 440 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) |
441 | { | 441 | { |
@@ -518,9 +518,9 @@ done: | |||
518 | return status; | 518 | return status; |
519 | } | 519 | } |
520 | 520 | ||
521 | u32 volt_dev_pmu_setup(struct gk20a *g) | 521 | int volt_dev_pmu_setup(struct gk20a *g) |
522 | { | 522 | { |
523 | u32 status; | 523 | int status; |
524 | struct boardobjgrp *pboardobjgrp = NULL; | 524 | struct boardobjgrp *pboardobjgrp = NULL; |
525 | 525 | ||
526 | nvgpu_log_info(g, " "); | 526 | nvgpu_log_info(g, " "); |
diff --git a/drivers/gpu/nvgpu/volt/volt_dev.h b/drivers/gpu/nvgpu/volt/volt_dev.h index a3dc8cf6..98f3bce9 100644 --- a/drivers/gpu/nvgpu/volt/volt_dev.h +++ b/drivers/gpu/nvgpu/volt/volt_dev.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -73,6 +73,6 @@ struct voltage_device_pwm_entry { | |||
73 | /* PWM end */ | 73 | /* PWM end */ |
74 | 74 | ||
75 | u32 volt_dev_sw_setup(struct gk20a *g); | 75 | u32 volt_dev_sw_setup(struct gk20a *g); |
76 | u32 volt_dev_pmu_setup(struct gk20a *g); | 76 | int volt_dev_pmu_setup(struct gk20a *g); |
77 | 77 | ||
78 | #endif /* _VOLTDEV_H_ */ | 78 | #endif /* _VOLTDEV_H_ */ |
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.c b/drivers/gpu/nvgpu/volt/volt_policy.c index 4c8737d3..e4b081a1 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.c +++ b/drivers/gpu/nvgpu/volt/volt_policy.c | |||
@@ -30,17 +30,17 @@ | |||
30 | 30 | ||
31 | #include "volt.h" | 31 | #include "volt.h" |
32 | 32 | ||
33 | static u32 volt_policy_pmu_data_init_super(struct gk20a *g, | 33 | static int volt_policy_pmu_data_init_super(struct gk20a *g, |
34 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) | 34 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) |
35 | { | 35 | { |
36 | return boardobj_pmudatainit_super(g, pboardobj, ppmudata); | 36 | return boardobj_pmudatainit_super(g, pboardobj, ppmudata); |
37 | } | 37 | } |
38 | 38 | ||
39 | static u32 construct_volt_policy(struct gk20a *g, | 39 | static int construct_volt_policy(struct gk20a *g, |
40 | struct boardobj **ppboardobj, u16 size, void *pArgs) | 40 | struct boardobj **ppboardobj, u16 size, void *pArgs) |
41 | { | 41 | { |
42 | struct voltage_policy *pvolt_policy = NULL; | 42 | struct voltage_policy *pvolt_policy = NULL; |
43 | u32 status = 0; | 43 | int status = 0; |
44 | 44 | ||
45 | status = boardobj_construct_super(g, ppboardobj, size, pArgs); | 45 | status = boardobj_construct_super(g, ppboardobj, size, pArgs); |
46 | if (status) { | 46 | if (status) { |
@@ -54,13 +54,13 @@ static u32 construct_volt_policy(struct gk20a *g, | |||
54 | return status; | 54 | return status; |
55 | } | 55 | } |
56 | 56 | ||
57 | static u32 construct_volt_policy_split_rail(struct gk20a *g, | 57 | static int construct_volt_policy_split_rail(struct gk20a *g, |
58 | struct boardobj **ppboardobj, u16 size, void *pArgs) | 58 | struct boardobj **ppboardobj, u16 size, void *pArgs) |
59 | { | 59 | { |
60 | struct voltage_policy_split_rail *ptmp_policy = | 60 | struct voltage_policy_split_rail *ptmp_policy = |
61 | (struct voltage_policy_split_rail *)pArgs; | 61 | (struct voltage_policy_split_rail *)pArgs; |
62 | struct voltage_policy_split_rail *pvolt_policy = NULL; | 62 | struct voltage_policy_split_rail *pvolt_policy = NULL; |
63 | u32 status = 0; | 63 | int status = 0; |
64 | 64 | ||
65 | status = construct_volt_policy(g, ppboardobj, size, pArgs); | 65 | status = construct_volt_policy(g, ppboardobj, size, pArgs); |
66 | if (status) { | 66 | if (status) { |
@@ -79,13 +79,13 @@ static u32 construct_volt_policy_split_rail(struct gk20a *g, | |||
79 | return status; | 79 | return status; |
80 | } | 80 | } |
81 | 81 | ||
82 | static u32 construct_volt_policy_single_rail(struct gk20a *g, | 82 | static int construct_volt_policy_single_rail(struct gk20a *g, |
83 | struct boardobj **ppboardobj, u16 size, void *pArgs) | 83 | struct boardobj **ppboardobj, u16 size, void *pArgs) |
84 | { | 84 | { |
85 | struct voltage_policy_single_rail *ptmp_policy = | 85 | struct voltage_policy_single_rail *ptmp_policy = |
86 | (struct voltage_policy_single_rail *)pArgs; | 86 | (struct voltage_policy_single_rail *)pArgs; |
87 | struct voltage_policy_single_rail *pvolt_policy = NULL; | 87 | struct voltage_policy_single_rail *pvolt_policy = NULL; |
88 | u32 status = 0; | 88 | int status = 0; |
89 | 89 | ||
90 | status = construct_volt_policy(g, ppboardobj, size, pArgs); | 90 | status = construct_volt_policy(g, ppboardobj, size, pArgs); |
91 | if (status) { | 91 | if (status) { |
@@ -99,10 +99,10 @@ static u32 construct_volt_policy_single_rail(struct gk20a *g, | |||
99 | return status; | 99 | return status; |
100 | } | 100 | } |
101 | 101 | ||
102 | static u32 volt_policy_pmu_data_init_single_rail(struct gk20a *g, | 102 | static int volt_policy_pmu_data_init_single_rail(struct gk20a *g, |
103 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) | 103 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) |
104 | { | 104 | { |
105 | u32 status = 0; | 105 | int status = 0; |
106 | struct voltage_policy_single_rail *ppolicy; | 106 | struct voltage_policy_single_rail *ppolicy; |
107 | struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset; | 107 | struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset; |
108 | 108 | ||
@@ -120,10 +120,10 @@ done: | |||
120 | return status; | 120 | return status; |
121 | } | 121 | } |
122 | 122 | ||
123 | static u32 volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g, | 123 | static int volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g, |
124 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) | 124 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) |
125 | { | 125 | { |
126 | u32 status = 0; | 126 | int status = 0; |
127 | struct voltage_policy_single_rail_multi_step *ppolicy; | 127 | struct voltage_policy_single_rail_multi_step *ppolicy; |
128 | struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset; | 128 | struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset; |
129 | 129 | ||
@@ -144,14 +144,14 @@ done: | |||
144 | return status; | 144 | return status; |
145 | } | 145 | } |
146 | 146 | ||
147 | static u32 volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, | 147 | static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, |
148 | struct boardobj **ppboardobj, u16 size, void *pargs) | 148 | struct boardobj **ppboardobj, u16 size, void *pargs) |
149 | { | 149 | { |
150 | struct boardobj *pboardobj = NULL; | 150 | struct boardobj *pboardobj = NULL; |
151 | struct voltage_policy_single_rail_multi_step *p_volt_policy = NULL; | 151 | struct voltage_policy_single_rail_multi_step *p_volt_policy = NULL; |
152 | struct voltage_policy_single_rail_multi_step *tmp_policy = | 152 | struct voltage_policy_single_rail_multi_step *tmp_policy = |
153 | (struct voltage_policy_single_rail_multi_step *)pargs; | 153 | (struct voltage_policy_single_rail_multi_step *)pargs; |
154 | u32 status = 0; | 154 | int status = 0; |
155 | 155 | ||
156 | status = construct_volt_policy_single_rail(g, ppboardobj, size, pargs); | 156 | status = construct_volt_policy_single_rail(g, ppboardobj, size, pargs); |
157 | if (status) { | 157 | if (status) { |
@@ -174,10 +174,10 @@ static u32 volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g, | |||
174 | return status; | 174 | return status; |
175 | } | 175 | } |
176 | 176 | ||
177 | static u32 volt_policy_pmu_data_init_split_rail(struct gk20a *g, | 177 | static int volt_policy_pmu_data_init_split_rail(struct gk20a *g, |
178 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) | 178 | struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata) |
179 | { | 179 | { |
180 | u32 status = 0; | 180 | int status = 0; |
181 | struct voltage_policy_split_rail *ppolicy; | 181 | struct voltage_policy_split_rail *ppolicy; |
182 | struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *pset; | 182 | struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *pset; |
183 | 183 | ||
@@ -201,11 +201,11 @@ done: | |||
201 | return status; | 201 | return status; |
202 | } | 202 | } |
203 | 203 | ||
204 | static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, | 204 | static int volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, |
205 | struct boardobj **ppboardobj, u16 size, void *pargs) | 205 | struct boardobj **ppboardobj, u16 size, void *pargs) |
206 | { | 206 | { |
207 | struct boardobj *pboardobj = NULL; | 207 | struct boardobj *pboardobj = NULL; |
208 | u32 status = 0; | 208 | int status = 0; |
209 | 209 | ||
210 | status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs); | 210 | status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs); |
211 | if (status) { | 211 | if (status) { |
@@ -221,7 +221,7 @@ static u32 volt_construct_volt_policy_split_rail_single_step(struct gk20a *g, | |||
221 | static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs) | 221 | static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs) |
222 | { | 222 | { |
223 | struct boardobj *pboard_obj = NULL; | 223 | struct boardobj *pboard_obj = NULL; |
224 | u32 status = 0; | 224 | int status = 0; |
225 | 225 | ||
226 | switch (BOARDOBJ_GET_TYPE(pargs)) { | 226 | switch (BOARDOBJ_GET_TYPE(pargs)) { |
227 | case CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP: | 227 | case CTRL_VOLT_POLICY_TYPE_SR_SINGLE_STEP: |
@@ -269,10 +269,10 @@ static u8 volt_policy_type_convert(u8 vbios_type) | |||
269 | return CTRL_VOLT_POLICY_TYPE_INVALID; | 269 | return CTRL_VOLT_POLICY_TYPE_INVALID; |
270 | } | 270 | } |
271 | 271 | ||
272 | static u32 volt_get_volt_policy_table(struct gk20a *g, | 272 | static int volt_get_volt_policy_table(struct gk20a *g, |
273 | struct voltage_policy_metadata *pvolt_policy_metadata) | 273 | struct voltage_policy_metadata *pvolt_policy_metadata) |
274 | { | 274 | { |
275 | u32 status = 0; | 275 | int status = 0; |
276 | u8 *voltage_policy_table_ptr = NULL; | 276 | u8 *voltage_policy_table_ptr = NULL; |
277 | struct voltage_policy *ppolicy = NULL; | 277 | struct voltage_policy *ppolicy = NULL; |
278 | struct vbios_voltage_policy_table_1x_header header = { 0 }; | 278 | struct vbios_voltage_policy_table_1x_header header = { 0 }; |
@@ -370,7 +370,7 @@ static u32 volt_get_volt_policy_table(struct gk20a *g, | |||
370 | done: | 370 | done: |
371 | return status; | 371 | return status; |
372 | } | 372 | } |
373 | static u32 _volt_policy_devgrp_pmudata_instget(struct gk20a *g, | 373 | static int _volt_policy_devgrp_pmudata_instget(struct gk20a *g, |
374 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 374 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
375 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) | 375 | struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx) |
376 | { | 376 | { |
@@ -392,7 +392,7 @@ static u32 _volt_policy_devgrp_pmudata_instget(struct gk20a *g, | |||
392 | return 0; | 392 | return 0; |
393 | } | 393 | } |
394 | 394 | ||
395 | static u32 _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, | 395 | static int _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, |
396 | void *pboardobjgrppmu, | 396 | void *pboardobjgrppmu, |
397 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) | 397 | struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx) |
398 | { | 398 | { |
@@ -411,7 +411,7 @@ static u32 _volt_policy_devgrp_pmustatus_instget(struct gk20a *g, | |||
411 | return 0; | 411 | return 0; |
412 | } | 412 | } |
413 | 413 | ||
414 | static u32 _volt_policy_grp_pmudatainit_super(struct gk20a *g, | 414 | static int _volt_policy_grp_pmudatainit_super(struct gk20a *g, |
415 | struct boardobjgrp *pboardobjgrp, | 415 | struct boardobjgrp *pboardobjgrp, |
416 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 416 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
417 | { | 417 | { |
@@ -419,7 +419,7 @@ static u32 _volt_policy_grp_pmudatainit_super(struct gk20a *g, | |||
419 | (struct nv_pmu_volt_volt_policy_boardobjgrp_set_header *) | 419 | (struct nv_pmu_volt_volt_policy_boardobjgrp_set_header *) |
420 | pboardobjgrppmu; | 420 | pboardobjgrppmu; |
421 | struct obj_volt *volt = (struct obj_volt *)pboardobjgrp; | 421 | struct obj_volt *volt = (struct obj_volt *)pboardobjgrp; |
422 | u32 status = 0; | 422 | int status = 0; |
423 | 423 | ||
424 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); | 424 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); |
425 | if (status) { | 425 | if (status) { |
@@ -435,9 +435,9 @@ done: | |||
435 | return status; | 435 | return status; |
436 | } | 436 | } |
437 | 437 | ||
438 | u32 volt_policy_pmu_setup(struct gk20a *g) | 438 | int volt_policy_pmu_setup(struct gk20a *g) |
439 | { | 439 | { |
440 | u32 status; | 440 | int status; |
441 | struct boardobjgrp *pboardobjgrp = NULL; | 441 | struct boardobjgrp *pboardobjgrp = NULL; |
442 | 442 | ||
443 | nvgpu_log_info(g, " "); | 443 | nvgpu_log_info(g, " "); |
@@ -455,9 +455,9 @@ u32 volt_policy_pmu_setup(struct gk20a *g) | |||
455 | return status; | 455 | return status; |
456 | } | 456 | } |
457 | 457 | ||
458 | u32 volt_policy_sw_setup(struct gk20a *g) | 458 | int volt_policy_sw_setup(struct gk20a *g) |
459 | { | 459 | { |
460 | u32 status = 0; | 460 | int status = 0; |
461 | struct boardobjgrp *pboardobjgrp = NULL; | 461 | struct boardobjgrp *pboardobjgrp = NULL; |
462 | 462 | ||
463 | nvgpu_log_info(g, " "); | 463 | nvgpu_log_info(g, " "); |
diff --git a/drivers/gpu/nvgpu/volt/volt_policy.h b/drivers/gpu/nvgpu/volt/volt_policy.h index 34c8f0f6..af13e02f 100644 --- a/drivers/gpu/nvgpu/volt/volt_policy.h +++ b/drivers/gpu/nvgpu/volt/volt_policy.h | |||
@@ -75,6 +75,6 @@ struct voltage_policy_single_rail_multi_step { | |||
75 | u32 ramp_down_step_size_uv; | 75 | u32 ramp_down_step_size_uv; |
76 | }; | 76 | }; |
77 | 77 | ||
78 | u32 volt_policy_sw_setup(struct gk20a *g); | 78 | int volt_policy_sw_setup(struct gk20a *g); |
79 | u32 volt_policy_pmu_setup(struct gk20a *g); | 79 | int volt_policy_pmu_setup(struct gk20a *g); |
80 | #endif | 80 | #endif |
diff --git a/drivers/gpu/nvgpu/volt/volt_rail.c b/drivers/gpu/nvgpu/volt/volt_rail.c index e44d8973..c8dc25f2 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.c +++ b/drivers/gpu/nvgpu/volt/volt_rail.c | |||
@@ -128,10 +128,10 @@ static u32 volt_rail_state_init(struct gk20a *g, | |||
128 | return status; | 128 | return status; |
129 | } | 129 | } |
130 | 130 | ||
131 | static u32 volt_rail_init_pmudata_super(struct gk20a *g, | 131 | static int volt_rail_init_pmudata_super(struct gk20a *g, |
132 | struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) | 132 | struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata) |
133 | { | 133 | { |
134 | u32 status = 0; | 134 | int status = 0; |
135 | struct voltage_rail *prail; | 135 | struct voltage_rail *prail; |
136 | struct nv_pmu_volt_volt_rail_boardobj_set *rail_pmu_data; | 136 | struct nv_pmu_volt_volt_rail_boardobj_set *rail_pmu_data; |
137 | u32 i; | 137 | u32 i; |
@@ -183,7 +183,7 @@ static struct voltage_rail *construct_volt_rail(struct gk20a *g, void *pargs) | |||
183 | struct boardobj *board_obj_ptr = NULL; | 183 | struct boardobj *board_obj_ptr = NULL; |
184 | struct voltage_rail *ptemp_rail = (struct voltage_rail *)pargs; | 184 | struct voltage_rail *ptemp_rail = (struct voltage_rail *)pargs; |
185 | struct voltage_rail *board_obj_volt_rail_ptr = NULL; | 185 | struct voltage_rail *board_obj_volt_rail_ptr = NULL; |
186 | u32 status; | 186 | int status; |
187 | 187 | ||
188 | nvgpu_log_info(g, " "); | 188 | nvgpu_log_info(g, " "); |
189 | status = boardobj_construct_super(g, &board_obj_ptr, | 189 | status = boardobj_construct_super(g, &board_obj_ptr, |
@@ -242,9 +242,9 @@ u8 volt_rail_vbios_volt_domain_convert_to_internal(struct gk20a *g, | |||
242 | return CTRL_VOLT_DOMAIN_INVALID; | 242 | return CTRL_VOLT_DOMAIN_INVALID; |
243 | } | 243 | } |
244 | 244 | ||
245 | u32 volt_rail_pmu_setup(struct gk20a *g) | 245 | int volt_rail_pmu_setup(struct gk20a *g) |
246 | { | 246 | { |
247 | u32 status; | 247 | int status; |
248 | struct boardobjgrp *pboardobjgrp = NULL; | 248 | struct boardobjgrp *pboardobjgrp = NULL; |
249 | 249 | ||
250 | nvgpu_log_info(g, " "); | 250 | nvgpu_log_info(g, " "); |
@@ -261,10 +261,10 @@ u32 volt_rail_pmu_setup(struct gk20a *g) | |||
261 | return status; | 261 | return status; |
262 | } | 262 | } |
263 | 263 | ||
264 | static u32 volt_get_volt_rail_table(struct gk20a *g, | 264 | static int volt_get_volt_rail_table(struct gk20a *g, |
265 | struct voltage_rail_metadata *pvolt_rail_metadata) | 265 | struct voltage_rail_metadata *pvolt_rail_metadata) |
266 | { | 266 | { |
267 | u32 status = 0; | 267 | int status = 0; |
268 | u8 *volt_rail_table_ptr = NULL; | 268 | u8 *volt_rail_table_ptr = NULL; |
269 | struct voltage_rail *prail = NULL; | 269 | struct voltage_rail *prail = NULL; |
270 | struct vbios_voltage_rail_table_1x_header header = { 0 }; | 270 | struct vbios_voltage_rail_table_1x_header header = { 0 }; |
@@ -370,7 +370,7 @@ done: | |||
370 | return status; | 370 | return status; |
371 | } | 371 | } |
372 | 372 | ||
373 | static u32 _volt_rail_devgrp_pmudata_instget(struct gk20a *g, | 373 | static int _volt_rail_devgrp_pmudata_instget(struct gk20a *g, |
374 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj | 374 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj |
375 | **ppboardobjpmudata, u8 idx) | 375 | **ppboardobjpmudata, u8 idx) |
376 | { | 376 | { |
@@ -392,7 +392,7 @@ static u32 _volt_rail_devgrp_pmudata_instget(struct gk20a *g, | |||
392 | return 0; | 392 | return 0; |
393 | } | 393 | } |
394 | 394 | ||
395 | static u32 _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, | 395 | static int _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, |
396 | void *pboardobjgrppmu, struct nv_pmu_boardobj_query | 396 | void *pboardobjgrppmu, struct nv_pmu_boardobj_query |
397 | **ppboardobjpmustatus, u8 idx) | 397 | **ppboardobjpmustatus, u8 idx) |
398 | { | 398 | { |
@@ -411,9 +411,9 @@ static u32 _volt_rail_devgrp_pmustatus_instget(struct gk20a *g, | |||
411 | return 0; | 411 | return 0; |
412 | } | 412 | } |
413 | 413 | ||
414 | u32 volt_rail_sw_setup(struct gk20a *g) | 414 | int volt_rail_sw_setup(struct gk20a *g) |
415 | { | 415 | { |
416 | u32 status = 0; | 416 | int status = 0; |
417 | struct boardobjgrp *pboardobjgrp = NULL; | 417 | struct boardobjgrp *pboardobjgrp = NULL; |
418 | struct voltage_rail *pvolt_rail; | 418 | struct voltage_rail *pvolt_rail; |
419 | u8 i; | 419 | u8 i; |
diff --git a/drivers/gpu/nvgpu/volt/volt_rail.h b/drivers/gpu/nvgpu/volt/volt_rail.h index be3cbb72..6c667eed 100644 --- a/drivers/gpu/nvgpu/volt/volt_rail.h +++ b/drivers/gpu/nvgpu/volt/volt_rail.h | |||
@@ -85,6 +85,6 @@ u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail | |||
85 | 85 | ||
86 | u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain); | 86 | u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain); |
87 | 87 | ||
88 | u32 volt_rail_sw_setup(struct gk20a *g); | 88 | int volt_rail_sw_setup(struct gk20a *g); |
89 | u32 volt_rail_pmu_setup(struct gk20a *g); | 89 | int volt_rail_pmu_setup(struct gk20a *g); |
90 | #endif | 90 | #endif |