diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/nvgpu_mem.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 6 |
3 files changed, 12 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c index 64f638e2..e441ec76 100644 --- a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c | |||
@@ -316,7 +316,8 @@ void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | |||
316 | */ | 316 | */ |
317 | u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl) | 317 | u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl) |
318 | { | 318 | { |
319 | if (!nvgpu_iommuable(g)) | 319 | if (nvgpu_is_enabled(g, NVGPU_MM_USE_PHYSICAL_SG) || |
320 | !nvgpu_iommuable(g)) | ||
320 | return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl)); | 321 | return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl)); |
321 | 322 | ||
322 | if (sg_dma_address(sgl) == 0) | 323 | if (sg_dma_address(sgl) == 0) |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index fea46a0e..dd0b78c0 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <nvgpu/dma.h> | 28 | #include <nvgpu/dma.h> |
29 | #include <nvgpu/timers.h> | 29 | #include <nvgpu/timers.h> |
30 | #include <nvgpu/semaphore.h> | 30 | #include <nvgpu/semaphore.h> |
31 | #include <nvgpu/enabled.h> | ||
31 | #include <nvgpu/kmem.h> | 32 | #include <nvgpu/kmem.h> |
32 | #include <nvgpu/log.h> | 33 | #include <nvgpu/log.h> |
33 | #include <nvgpu/soc.h> | 34 | #include <nvgpu/soc.h> |
@@ -666,11 +667,13 @@ static void fifo_engine_exception_status(struct gk20a *g, | |||
666 | static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) | 667 | static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) |
667 | { | 668 | { |
668 | struct fifo_runlist_info_gk20a *runlist; | 669 | struct fifo_runlist_info_gk20a *runlist; |
670 | struct fifo_engine_info_gk20a *engine_info; | ||
669 | unsigned int runlist_id; | 671 | unsigned int runlist_id; |
670 | u32 i; | 672 | u32 i; |
671 | size_t runlist_size; | 673 | size_t runlist_size; |
672 | u32 active_engine_id, pbdma_id, engine_id; | 674 | u32 active_engine_id, pbdma_id, engine_id; |
673 | struct fifo_engine_info_gk20a *engine_info; | 675 | int flags = nvgpu_is_enabled(g, NVGPU_MM_USE_PHYSICAL_SG) ? |
676 | NVGPU_DMA_FORCE_CONTIGUOUS : 0; | ||
674 | 677 | ||
675 | nvgpu_log_fn(g, " "); | 678 | nvgpu_log_fn(g, " "); |
676 | 679 | ||
@@ -705,8 +708,9 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) | |||
705 | f->num_runlist_entries, runlist_size); | 708 | f->num_runlist_entries, runlist_size); |
706 | 709 | ||
707 | for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) { | 710 | for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) { |
708 | int err = nvgpu_dma_alloc_sys(g, runlist_size, | 711 | int err = nvgpu_dma_alloc_flags_sys(g, flags, |
709 | &runlist->mem[i]); | 712 | runlist_size, |
713 | &runlist->mem[i]); | ||
710 | if (err) { | 714 | if (err) { |
711 | nvgpu_err(g, "memory allocation failed"); | 715 | nvgpu_err(g, "memory allocation failed"); |
712 | goto clean_up_runlist; | 716 | goto clean_up_runlist; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 8db6b42f..6ae743ef 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -742,13 +742,13 @@ void gr_gk20a_ctx_patch_write(struct gk20a *g, | |||
742 | 742 | ||
743 | static u32 fecs_current_ctx_data(struct gk20a *g, struct nvgpu_mem *inst_block) | 743 | static u32 fecs_current_ctx_data(struct gk20a *g, struct nvgpu_mem *inst_block) |
744 | { | 744 | { |
745 | u32 ptr = u64_lo32(nvgpu_inst_block_addr(g, inst_block) | 745 | u64 ptr = nvgpu_inst_block_addr(g, inst_block) >> |
746 | >> ram_in_base_shift_v()); | 746 | ram_in_base_shift_v(); |
747 | u32 aperture = nvgpu_aperture_mask(g, inst_block, | 747 | u32 aperture = nvgpu_aperture_mask(g, inst_block, |
748 | gr_fecs_current_ctx_target_sys_mem_ncoh_f(), | 748 | gr_fecs_current_ctx_target_sys_mem_ncoh_f(), |
749 | gr_fecs_current_ctx_target_vid_mem_f()); | 749 | gr_fecs_current_ctx_target_vid_mem_f()); |
750 | 750 | ||
751 | return gr_fecs_current_ctx_ptr_f(ptr) | aperture | | 751 | return gr_fecs_current_ctx_ptr_f(u64_lo32(ptr)) | aperture | |
752 | gr_fecs_current_ctx_valid_f(1); | 752 | gr_fecs_current_ctx_valid_f(1); |
753 | } | 753 | } |
754 | 754 | ||