diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/boardobj/boardobjgrp.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_fw.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h | 6 |
4 files changed, 13 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c index f20b4a78..9530e460 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -301,6 +301,7 @@ u32 boardobjgrp_pmuhdrdatainit_super(struct gk20a *g, struct boardobjgrp | |||
301 | pboardobjgrppmu->type = pboardobjgrp->type; | 301 | pboardobjgrppmu->type = pboardobjgrp->type; |
302 | pboardobjgrppmu->class_id = pboardobjgrp->classid; | 302 | pboardobjgrppmu->class_id = pboardobjgrp->classid; |
303 | pboardobjgrppmu->obj_slots = BOARDOBJGRP_PMU_SLOTS_GET(pboardobjgrp); | 303 | pboardobjgrppmu->obj_slots = BOARDOBJGRP_PMU_SLOTS_GET(pboardobjgrp); |
304 | pboardobjgrppmu->flags = 0; | ||
304 | 305 | ||
305 | gk20a_dbg_info(" Done"); | 306 | gk20a_dbg_info(" Done"); |
306 | return 0; | 307 | return 0; |
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c index 20120393..6a038317 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c | |||
@@ -37,8 +37,8 @@ | |||
37 | 37 | ||
38 | /* PMU F/W version */ | 38 | /* PMU F/W version */ |
39 | #define APP_VERSION_GV11B 23416738 | 39 | #define APP_VERSION_GV11B 23416738 |
40 | #define APP_VERSION_GV10X 23440730 | 40 | #define APP_VERSION_GV10X 23616379 |
41 | #define APP_VERSION_GP10X 21308030 | 41 | #define APP_VERSION_GP10X 22099494 |
42 | #define APP_VERSION_GP10B 20429989 | 42 | #define APP_VERSION_GP10B 20429989 |
43 | #define APP_VERSION_GM20B 20490253 | 43 | #define APP_VERSION_GM20B 20490253 |
44 | 44 | ||
@@ -897,7 +897,7 @@ static void get_pmu_init_msg_pmu_queue_params_v5(struct pmu_queue *queue, | |||
897 | else if (tmp_id == PMU_COMMAND_QUEUE_LPQ) | 897 | else if (tmp_id == PMU_COMMAND_QUEUE_LPQ) |
898 | tmp_id = PMU_QUEUE_LPQ_IDX_FOR_V3; | 898 | tmp_id = PMU_QUEUE_LPQ_IDX_FOR_V3; |
899 | else if (tmp_id == PMU_MESSAGE_QUEUE) | 899 | else if (tmp_id == PMU_MESSAGE_QUEUE) |
900 | tmp_id = PMU_QUEUE_MSG_IDX_FOR_V4; | 900 | tmp_id = PMU_QUEUE_MSG_IDX_FOR_V5; |
901 | else | 901 | else |
902 | return; | 902 | return; |
903 | 903 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h index 2dd511de..71684f6c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuif_pmu.h | |||
@@ -107,12 +107,13 @@ struct pmu_init_msg_pmu_v1 { | |||
107 | u16 sw_managed_area_size; | 107 | u16 sw_managed_area_size; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | #define PMU_QUEUE_COUNT_FOR_V5 4 | ||
110 | #define PMU_QUEUE_COUNT_FOR_V4 5 | 111 | #define PMU_QUEUE_COUNT_FOR_V4 5 |
111 | #define PMU_QUEUE_COUNT_FOR_V3 3 | 112 | #define PMU_QUEUE_COUNT_FOR_V3 3 |
112 | #define PMU_QUEUE_HPQ_IDX_FOR_V3 0 | 113 | #define PMU_QUEUE_HPQ_IDX_FOR_V3 0 |
113 | #define PMU_QUEUE_LPQ_IDX_FOR_V3 1 | 114 | #define PMU_QUEUE_LPQ_IDX_FOR_V3 1 |
114 | #define PMU_QUEUE_MSG_IDX_FOR_V3 2 | 115 | #define PMU_QUEUE_MSG_IDX_FOR_V3 2 |
115 | #define PMU_QUEUE_MSG_IDX_FOR_V4 4 | 116 | #define PMU_QUEUE_MSG_IDX_FOR_V5 3 |
116 | struct pmu_init_msg_pmu_v3 { | 117 | struct pmu_init_msg_pmu_v3 { |
117 | u8 msg_type; | 118 | u8 msg_type; |
118 | u8 queue_index[PMU_QUEUE_COUNT_FOR_V3]; | 119 | u8 queue_index[PMU_QUEUE_COUNT_FOR_V3]; |
@@ -144,8 +145,8 @@ struct pmu_init_msg_pmu_v4 { | |||
144 | struct pmu_init_msg_pmu_v5 { | 145 | struct pmu_init_msg_pmu_v5 { |
145 | u8 msg_type; | 146 | u8 msg_type; |
146 | u8 flcn_status; | 147 | u8 flcn_status; |
147 | u8 queue_index[PMU_QUEUE_COUNT_FOR_V4]; | 148 | u8 queue_index[PMU_QUEUE_COUNT_FOR_V5]; |
148 | u16 queue_size[PMU_QUEUE_COUNT_FOR_V4]; | 149 | u16 queue_size[PMU_QUEUE_COUNT_FOR_V5]; |
149 | u16 queue_offset; | 150 | u16 queue_offset; |
150 | 151 | ||
151 | u16 sw_managed_area_offset; | 152 | u16 sw_managed_area_offset; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h index b8c1e394..697f95bc 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifboardobj.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -43,6 +43,7 @@ | |||
43 | */ | 43 | */ |
44 | struct nv_pmu_boardobj { | 44 | struct nv_pmu_boardobj { |
45 | u8 type; | 45 | u8 type; |
46 | u8 grp_idx; | ||
46 | }; | 47 | }; |
47 | 48 | ||
48 | /* | 49 | /* |
@@ -51,6 +52,7 @@ struct nv_pmu_boardobj { | |||
51 | */ | 52 | */ |
52 | struct nv_pmu_boardobj_query { | 53 | struct nv_pmu_boardobj_query { |
53 | u8 type; | 54 | u8 type; |
55 | u8 grp_idx; | ||
54 | }; | 56 | }; |
55 | 57 | ||
56 | /* | 58 | /* |
@@ -61,7 +63,7 @@ struct nv_pmu_boardobjgrp_super { | |||
61 | u8 type; | 63 | u8 type; |
62 | u8 class_id; | 64 | u8 class_id; |
63 | u8 obj_slots; | 65 | u8 obj_slots; |
64 | u8 rsvd; | 66 | u8 flags; |
65 | }; | 67 | }; |
66 | 68 | ||
67 | struct nv_pmu_boardobjgrp { | 69 | struct nv_pmu_boardobjgrp { |