diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 56 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 1 |
6 files changed, 1 insertions, 61 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 17b0a60b..7cb8462f 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -686,8 +686,6 @@ struct gpu_ops { | |||
686 | u32 (*intr_0_error_mask)(struct gk20a *g); | 686 | u32 (*intr_0_error_mask)(struct gk20a *g); |
687 | int (*is_preempt_pending)(struct gk20a *g, u32 id, | 687 | int (*is_preempt_pending)(struct gk20a *g, u32 id, |
688 | unsigned int id_type); | 688 | unsigned int id_type); |
689 | int (*preempt_ch_tsg)(struct gk20a *g, u32 id, | ||
690 | unsigned int id_type); | ||
691 | void (*init_pbdma_intr_descs)(struct fifo_gk20a *f); | 689 | void (*init_pbdma_intr_descs)(struct fifo_gk20a *f); |
692 | int (*reset_enable_hw)(struct gk20a *g); | 690 | int (*reset_enable_hw)(struct gk20a *g); |
693 | int (*setup_userd)(struct channel_gk20a *c); | 691 | int (*setup_userd)(struct channel_gk20a *c); |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index ebcab011..fdbbef36 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -638,7 +638,6 @@ static const struct gpu_ops gv100_ops = { | |||
638 | .resetup_ramfc = NULL, | 638 | .resetup_ramfc = NULL, |
639 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | 639 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, |
640 | .free_channel_ctx_header = gv11b_free_subctx_header, | 640 | .free_channel_ctx_header = gv11b_free_subctx_header, |
641 | .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, | ||
642 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, | 641 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, |
643 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, | 642 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, |
644 | .ring_channel_doorbell = gv11b_ring_channel_doorbell, | 643 | .ring_channel_doorbell = gv11b_ring_channel_doorbell, |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 7e0bbf81..210a863b 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -951,52 +951,6 @@ static void gv11b_fifo_locked_preempt_runlists(struct gk20a *g, u32 runlists_mas | |||
951 | nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); | 951 | nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); |
952 | } | 952 | } |
953 | 953 | ||
954 | static int __locked_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, | ||
955 | unsigned int id_type) | ||
956 | { | ||
957 | int ret; | ||
958 | struct fifo_gk20a *f = &g->fifo; | ||
959 | |||
960 | nvgpu_log_fn(g, "id:%d id_type:%d", id, id_type); | ||
961 | |||
962 | /* Issue tsg preempt. Channel preempt is noop */ | ||
963 | if (id_type == ID_TYPE_CHANNEL) | ||
964 | gk20a_fifo_issue_preempt(g, f->channel[id].tsgid, true); | ||
965 | else | ||
966 | gk20a_fifo_issue_preempt(g, id, true); | ||
967 | |||
968 | /* wait for preempt */ | ||
969 | ret = g->ops.fifo.is_preempt_pending(g, id, id_type); | ||
970 | |||
971 | /* No recovery even if preempt timed out since | ||
972 | * this is called from recovery path | ||
973 | */ | ||
974 | |||
975 | return ret; | ||
976 | } | ||
977 | |||
978 | |||
979 | int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, | ||
980 | unsigned int id_type) | ||
981 | { | ||
982 | u32 ret = 0; | ||
983 | u32 token = PMU_INVALID_MUTEX_OWNER_ID; | ||
984 | u32 mutex_ret = 0; | ||
985 | |||
986 | mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token); | ||
987 | /* | ||
988 | * This is called from teardown path only. runlist_lock | ||
989 | * is already acquired before calling this function. | ||
990 | */ | ||
991 | ret = __locked_fifo_preempt_ch_tsg(g, id, id_type); | ||
992 | |||
993 | if (!mutex_ret) | ||
994 | nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); | ||
995 | |||
996 | return ret; | ||
997 | |||
998 | } | ||
999 | |||
1000 | static void gv11b_fifo_locked_abort_runlist_active_tsgs(struct gk20a *g, | 954 | static void gv11b_fifo_locked_abort_runlist_active_tsgs(struct gk20a *g, |
1001 | unsigned int rc_type, | 955 | unsigned int rc_type, |
1002 | u32 runlists_mask) | 956 | u32 runlists_mask) |
@@ -1174,15 +1128,7 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, | |||
1174 | * that all PBDMAs serving the engine are not loaded when engine is | 1128 | * that all PBDMAs serving the engine are not loaded when engine is |
1175 | * reset. | 1129 | * reset. |
1176 | */ | 1130 | */ |
1177 | if (tsg) { | 1131 | gv11b_fifo_locked_preempt_runlists(g, runlists_mask); |
1178 | int preempt_failed; | ||
1179 | |||
1180 | preempt_failed = g->ops.fifo.preempt_ch_tsg(g, id, id_type); | ||
1181 | if (preempt_failed) | ||
1182 | gv11b_fifo_locked_preempt_runlists(g, runlists_mask); | ||
1183 | } else { | ||
1184 | gv11b_fifo_locked_preempt_runlists(g, runlists_mask); | ||
1185 | } | ||
1186 | 1132 | ||
1187 | /* check if engine reset should be deferred */ | 1133 | /* check if engine reset should be deferred */ |
1188 | for (rlid = 0; rlid < g->fifo.max_runlists; rlid++) { | 1134 | for (rlid = 0; rlid < g->fifo.max_runlists; rlid++) { |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index ec89bc5b..1703fbdc 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | |||
@@ -84,7 +84,6 @@ int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, | |||
84 | int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); | 84 | int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); |
85 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); | 85 | int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid); |
86 | int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg); | 86 | int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg); |
87 | int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, unsigned int id_type); | ||
88 | void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, | 87 | void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, |
89 | u32 id, unsigned int id_type, unsigned int rc_type, | 88 | u32 id, unsigned int id_type, unsigned int rc_type, |
90 | struct mmu_fault_info *mmfault); | 89 | struct mmu_fault_info *mmfault); |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 00367e5b..366d6928 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -602,7 +602,6 @@ static const struct gpu_ops gv11b_ops = { | |||
602 | .resetup_ramfc = NULL, | 602 | .resetup_ramfc = NULL, |
603 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | 603 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, |
604 | .free_channel_ctx_header = gv11b_free_subctx_header, | 604 | .free_channel_ctx_header = gv11b_free_subctx_header, |
605 | .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, | ||
606 | .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, | 605 | .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, |
607 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, | 606 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, |
608 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, | 607 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index 386389b7..5da9fed5 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -448,7 +448,6 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
448 | .reschedule_runlist = NULL, | 448 | .reschedule_runlist = NULL, |
449 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | 449 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, |
450 | .free_channel_ctx_header = vgpu_gv11b_free_subctx_header, | 450 | .free_channel_ctx_header = vgpu_gv11b_free_subctx_header, |
451 | .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, | ||
452 | .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, | 451 | .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, |
453 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, | 452 | .runlist_hw_submit = gk20a_fifo_runlist_hw_submit, |
454 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, | 453 | .runlist_wait_pending = gk20a_fifo_runlist_wait_pending, |