diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 3 |
3 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index 536f00e0..9ed5fef3 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2011-2015, NVIDIA Corporation. All rights reserved. | 2 | * Copyright (c) 2011-2016, NVIDIA Corporation. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -397,7 +397,7 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, | |||
397 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; | 397 | gpc = g->gr.sm_to_cluster[sm_id].gpc_index; |
398 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; | 398 | tpc = g->gr.sm_to_cluster[sm_id].tpc_index; |
399 | 399 | ||
400 | err = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask); | 400 | err = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask, false); |
401 | 401 | ||
402 | if (err) { | 402 | if (err) { |
403 | gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); | 403 | gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index bf7a3fa7..6e2ea548 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5187,7 +5187,8 @@ unlock: | |||
5187 | } | 5187 | } |
5188 | 5188 | ||
5189 | int gk20a_gr_lock_down_sm(struct gk20a *g, | 5189 | int gk20a_gr_lock_down_sm(struct gk20a *g, |
5190 | u32 gpc, u32 tpc, u32 global_esr_mask) | 5190 | u32 gpc, u32 tpc, u32 global_esr_mask, |
5191 | bool check_errors) | ||
5191 | { | 5192 | { |
5192 | u32 offset = | 5193 | u32 offset = |
5193 | proj_gpc_stride_v() * gpc + proj_tpc_in_gpc_stride_v() * tpc; | 5194 | proj_gpc_stride_v() * gpc + proj_tpc_in_gpc_stride_v() * tpc; |
@@ -5204,7 +5205,7 @@ int gk20a_gr_lock_down_sm(struct gk20a *g, | |||
5204 | gr_gpc0_tpc0_sm_dbgr_control0_r() + offset, dbgr_control0); | 5205 | gr_gpc0_tpc0_sm_dbgr_control0_r() + offset, dbgr_control0); |
5205 | 5206 | ||
5206 | return gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc, global_esr_mask, | 5207 | return gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc, global_esr_mask, |
5207 | true); | 5208 | check_errors); |
5208 | } | 5209 | } |
5209 | 5210 | ||
5210 | bool gk20a_gr_sm_debugger_attached(struct gk20a *g) | 5211 | bool gk20a_gr_sm_debugger_attached(struct gk20a *g) |
@@ -5306,7 +5307,7 @@ static int gk20a_gr_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
5306 | } | 5307 | } |
5307 | 5308 | ||
5308 | if (do_warp_sync) { | 5309 | if (do_warp_sync) { |
5309 | ret = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask); | 5310 | ret = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask, true); |
5310 | if (ret) { | 5311 | if (ret) { |
5311 | gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); | 5312 | gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); |
5312 | return ret; | 5313 | return ret; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index c58daefa..ad197228 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -517,7 +517,8 @@ void gk20a_suspend_single_sm(struct gk20a *g, | |||
517 | void gk20a_suspend_all_sms(struct gk20a *g, | 517 | void gk20a_suspend_all_sms(struct gk20a *g, |
518 | u32 global_esr_mask, bool check_errors); | 518 | u32 global_esr_mask, bool check_errors); |
519 | int gk20a_gr_lock_down_sm(struct gk20a *g, | 519 | int gk20a_gr_lock_down_sm(struct gk20a *g, |
520 | u32 gpc, u32 tpc, u32 global_esr_mask); | 520 | u32 gpc, u32 tpc, u32 global_esr_mask, |
521 | bool check_errors); | ||
521 | int gr_gk20a_set_sm_debug_mode(struct gk20a *g, | 522 | int gr_gk20a_set_sm_debug_mode(struct gk20a *g, |
522 | struct channel_gk20a *ch, u64 sms, bool enable); | 523 | struct channel_gk20a *ch, u64 sms, bool enable); |
523 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch); | 524 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch); |