diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/power_features/cg/cg.c | 50 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/power_features/pg/pg.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/power_features/power_features.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h | 2 |
5 files changed, 73 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/power_features/cg/cg.c b/drivers/gpu/nvgpu/common/power_features/cg/cg.c index 66b95226..a538c44b 100644 --- a/drivers/gpu/nvgpu/common/power_features/cg/cg.c +++ b/drivers/gpu/nvgpu/common/power_features/cg/cg.c | |||
@@ -54,6 +54,36 @@ static void nvgpu_cg_set_mode(struct gk20a *g, int cgmode, int mode_config) | |||
54 | } | 54 | } |
55 | } | 55 | } |
56 | 56 | ||
57 | void nvgpu_cg_elcg_enable_no_wait(struct gk20a *g) | ||
58 | { | ||
59 | nvgpu_log_fn(g, " "); | ||
60 | |||
61 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_ELCG)) { | ||
62 | return; | ||
63 | } | ||
64 | |||
65 | nvgpu_mutex_acquire(&g->cg_pg_lock); | ||
66 | if (g->elcg_enabled) { | ||
67 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_AUTO); | ||
68 | } | ||
69 | nvgpu_mutex_release(&g->cg_pg_lock); | ||
70 | } | ||
71 | |||
72 | void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g) | ||
73 | { | ||
74 | nvgpu_log_fn(g, " "); | ||
75 | |||
76 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_ELCG)) { | ||
77 | return; | ||
78 | } | ||
79 | |||
80 | nvgpu_mutex_acquire(&g->cg_pg_lock); | ||
81 | if (g->elcg_enabled) { | ||
82 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_RUN); | ||
83 | } | ||
84 | nvgpu_mutex_release(&g->cg_pg_lock); | ||
85 | } | ||
86 | |||
57 | void nvgpu_cg_elcg_enable(struct gk20a *g) | 87 | void nvgpu_cg_elcg_enable(struct gk20a *g) |
58 | { | 88 | { |
59 | nvgpu_log_fn(g, " "); | 89 | nvgpu_log_fn(g, " "); |
@@ -62,6 +92,8 @@ void nvgpu_cg_elcg_enable(struct gk20a *g) | |||
62 | return; | 92 | return; |
63 | } | 93 | } |
64 | 94 | ||
95 | gk20a_gr_wait_initialized(g); | ||
96 | |||
65 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 97 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
66 | if (g->elcg_enabled) { | 98 | if (g->elcg_enabled) { |
67 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_AUTO); | 99 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_AUTO); |
@@ -77,6 +109,8 @@ void nvgpu_cg_elcg_disable(struct gk20a *g) | |||
77 | return; | 109 | return; |
78 | } | 110 | } |
79 | 111 | ||
112 | gk20a_gr_wait_initialized(g); | ||
113 | |||
80 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 114 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
81 | if (g->elcg_enabled) { | 115 | if (g->elcg_enabled) { |
82 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_RUN); | 116 | nvgpu_cg_set_mode(g, ELCG_MODE, ELCG_RUN); |
@@ -93,6 +127,8 @@ void nvgpu_cg_blcg_mode_enable(struct gk20a *g) | |||
93 | return; | 127 | return; |
94 | } | 128 | } |
95 | 129 | ||
130 | gk20a_gr_wait_initialized(g); | ||
131 | |||
96 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 132 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
97 | if (g->blcg_enabled) { | 133 | if (g->blcg_enabled) { |
98 | nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_AUTO); | 134 | nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_AUTO); |
@@ -109,6 +145,8 @@ void nvgpu_cg_blcg_mode_disable(struct gk20a *g) | |||
109 | return; | 145 | return; |
110 | } | 146 | } |
111 | 147 | ||
148 | gk20a_gr_wait_initialized(g); | ||
149 | |||
112 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 150 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
113 | if (g->blcg_enabled) { | 151 | if (g->blcg_enabled) { |
114 | nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_RUN); | 152 | nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_RUN); |
@@ -257,6 +295,9 @@ void nvgpu_cg_slcg_gr_perf_ltc_load_enable(struct gk20a *g) | |||
257 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { | 295 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { |
258 | return; | 296 | return; |
259 | } | 297 | } |
298 | |||
299 | gk20a_gr_wait_initialized(g); | ||
300 | |||
260 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 301 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
261 | if (!g->slcg_enabled) { | 302 | if (!g->slcg_enabled) { |
262 | goto done; | 303 | goto done; |
@@ -281,6 +322,9 @@ void nvgpu_cg_slcg_gr_perf_ltc_load_disable(struct gk20a *g) | |||
281 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { | 322 | if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { |
282 | return; | 323 | return; |
283 | } | 324 | } |
325 | |||
326 | gk20a_gr_wait_initialized(g); | ||
327 | |||
284 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 328 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
285 | if (!g->slcg_enabled) { | 329 | if (!g->slcg_enabled) { |
286 | goto done; | 330 | goto done; |
@@ -421,6 +465,8 @@ void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable) | |||
421 | return; | 465 | return; |
422 | } | 466 | } |
423 | 467 | ||
468 | gk20a_gr_wait_initialized(g); | ||
469 | |||
424 | nvgpu_mutex_release(&g->cg_pg_lock); | 470 | nvgpu_mutex_release(&g->cg_pg_lock); |
425 | if (enable) { | 471 | if (enable) { |
426 | if (!g->elcg_enabled) { | 472 | if (!g->elcg_enabled) { |
@@ -446,6 +492,8 @@ void nvgpu_cg_blcg_set_blcg_enabled(struct gk20a *g, bool enable) | |||
446 | return; | 492 | return; |
447 | } | 493 | } |
448 | 494 | ||
495 | gk20a_gr_wait_initialized(g); | ||
496 | |||
449 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 497 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
450 | if (enable) { | 498 | if (enable) { |
451 | if (!g->blcg_enabled) { | 499 | if (!g->blcg_enabled) { |
@@ -505,6 +553,8 @@ void nvgpu_cg_slcg_set_slcg_enabled(struct gk20a *g, bool enable) | |||
505 | return; | 553 | return; |
506 | } | 554 | } |
507 | 555 | ||
556 | gk20a_gr_wait_initialized(g); | ||
557 | |||
508 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 558 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
509 | if (enable) { | 559 | if (enable) { |
510 | if (!g->slcg_enabled) { | 560 | if (!g->slcg_enabled) { |
diff --git a/drivers/gpu/nvgpu/common/power_features/pg/pg.c b/drivers/gpu/nvgpu/common/power_features/pg/pg.c index fa31f4e3..394c0824 100644 --- a/drivers/gpu/nvgpu/common/power_features/pg/pg.c +++ b/drivers/gpu/nvgpu/common/power_features/pg/pg.c | |||
@@ -46,6 +46,8 @@ int nvgpu_pg_elpg_enable(struct gk20a *g) | |||
46 | return 0; | 46 | return 0; |
47 | } | 47 | } |
48 | 48 | ||
49 | gk20a_gr_wait_initialized(g); | ||
50 | |||
49 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 51 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
50 | if (g->elpg_enabled) { | 52 | if (g->elpg_enabled) { |
51 | err = nvgpu_pmu_pg_global_enable(g, true); | 53 | err = nvgpu_pmu_pg_global_enable(g, true); |
@@ -64,6 +66,8 @@ int nvgpu_pg_elpg_disable(struct gk20a *g) | |||
64 | return 0; | 66 | return 0; |
65 | } | 67 | } |
66 | 68 | ||
69 | gk20a_gr_wait_initialized(g); | ||
70 | |||
67 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 71 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
68 | if (g->elpg_enabled) { | 72 | if (g->elpg_enabled) { |
69 | err = nvgpu_pmu_pg_global_enable(g, false); | 73 | err = nvgpu_pmu_pg_global_enable(g, false); |
@@ -83,6 +87,8 @@ int nvgpu_pg_elpg_set_elpg_enabled(struct gk20a *g, bool enable) | |||
83 | return 0; | 87 | return 0; |
84 | } | 88 | } |
85 | 89 | ||
90 | gk20a_gr_wait_initialized(g); | ||
91 | |||
86 | nvgpu_mutex_acquire(&g->cg_pg_lock); | 92 | nvgpu_mutex_acquire(&g->cg_pg_lock); |
87 | if (enable) { | 93 | if (enable) { |
88 | if (!g->elpg_enabled) { | 94 | if (!g->elpg_enabled) { |
diff --git a/drivers/gpu/nvgpu/common/power_features/power_features.c b/drivers/gpu/nvgpu/common/power_features/power_features.c index 792fdc01..7f52ba8e 100644 --- a/drivers/gpu/nvgpu/common/power_features/power_features.c +++ b/drivers/gpu/nvgpu/common/power_features/power_features.c | |||
@@ -31,6 +31,8 @@ int nvgpu_cg_pg_disable(struct gk20a *g) | |||
31 | 31 | ||
32 | nvgpu_log_fn(g, " "); | 32 | nvgpu_log_fn(g, " "); |
33 | 33 | ||
34 | gk20a_gr_wait_initialized(g); | ||
35 | |||
34 | /* disable elpg before clock gating */ | 36 | /* disable elpg before clock gating */ |
35 | err = nvgpu_pg_elpg_disable(g); | 37 | err = nvgpu_pg_elpg_disable(g); |
36 | if (err != 0) { | 38 | if (err != 0) { |
@@ -51,6 +53,8 @@ int nvgpu_cg_pg_enable(struct gk20a *g) | |||
51 | 53 | ||
52 | nvgpu_log_fn(g, " "); | 54 | nvgpu_log_fn(g, " "); |
53 | 55 | ||
56 | gk20a_gr_wait_initialized(g); | ||
57 | |||
54 | nvgpu_cg_elcg_enable(g); | 58 | nvgpu_cg_elcg_enable(g); |
55 | 59 | ||
56 | nvgpu_cg_blcg_mode_enable(g); | 60 | nvgpu_cg_blcg_mode_enable(g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 788ebf45..4f8006b2 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -4679,7 +4679,7 @@ static int gk20a_init_gr_prepare(struct gk20a *g) | |||
4679 | nvgpu_cg_init_gr_load_gating_prod(g); | 4679 | nvgpu_cg_init_gr_load_gating_prod(g); |
4680 | 4680 | ||
4681 | /* Disable elcg until it gets enabled later in the init*/ | 4681 | /* Disable elcg until it gets enabled later in the init*/ |
4682 | nvgpu_cg_elcg_disable(g); | 4682 | nvgpu_cg_elcg_disable_no_wait(g); |
4683 | 4683 | ||
4684 | /* enable fifo access */ | 4684 | /* enable fifo access */ |
4685 | gk20a_writel(g, gr_gpfifo_ctl_r(), | 4685 | gk20a_writel(g, gr_gpfifo_ctl_r(), |
@@ -4963,6 +4963,8 @@ int gk20a_init_gr_support(struct gk20a *g) | |||
4963 | 4963 | ||
4964 | nvgpu_log_fn(g, " "); | 4964 | nvgpu_log_fn(g, " "); |
4965 | 4965 | ||
4966 | g->gr.initialized = false; | ||
4967 | |||
4966 | /* this is required before gr_gk20a_init_ctx_state */ | 4968 | /* this is required before gr_gk20a_init_ctx_state */ |
4967 | err = nvgpu_mutex_init(&g->gr.fecs_mutex); | 4969 | err = nvgpu_mutex_init(&g->gr.fecs_mutex); |
4968 | if (err != 0) { | 4970 | if (err != 0) { |
@@ -4999,7 +5001,7 @@ int gk20a_init_gr_support(struct gk20a *g) | |||
4999 | } | 5001 | } |
5000 | } | 5002 | } |
5001 | 5003 | ||
5002 | nvgpu_cg_elcg_enable(g); | 5004 | nvgpu_cg_elcg_enable_no_wait(g); |
5003 | /* GR is inialized, signal possible waiters */ | 5005 | /* GR is inialized, signal possible waiters */ |
5004 | g->gr.initialized = true; | 5006 | g->gr.initialized = true; |
5005 | nvgpu_cond_signal(&g->gr.init_wq); | 5007 | nvgpu_cond_signal(&g->gr.init_wq); |
@@ -5091,6 +5093,8 @@ int gk20a_gr_reset(struct gk20a *g) | |||
5091 | int err; | 5093 | int err; |
5092 | u32 size; | 5094 | u32 size; |
5093 | 5095 | ||
5096 | g->gr.initialized = false; | ||
5097 | |||
5094 | nvgpu_mutex_acquire(&g->gr.fecs_mutex); | 5098 | nvgpu_mutex_acquire(&g->gr.fecs_mutex); |
5095 | 5099 | ||
5096 | err = gk20a_enable_gr_hw(g); | 5100 | err = gk20a_enable_gr_hw(g); |
@@ -5143,7 +5147,11 @@ int gk20a_gr_reset(struct gk20a *g) | |||
5143 | } | 5147 | } |
5144 | 5148 | ||
5145 | nvgpu_cg_init_gr_load_gating_prod(g); | 5149 | nvgpu_cg_init_gr_load_gating_prod(g); |
5146 | nvgpu_cg_elcg_enable(g); | 5150 | nvgpu_cg_elcg_enable_no_wait(g); |
5151 | |||
5152 | /* GR is inialized, signal possible waiters */ | ||
5153 | g->gr.initialized = true; | ||
5154 | nvgpu_cond_signal(&g->gr.init_wq); | ||
5147 | 5155 | ||
5148 | return err; | 5156 | return err; |
5149 | } | 5157 | } |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h b/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h index 3bb86267..7b5fe265 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h +++ b/drivers/gpu/nvgpu/include/nvgpu/power_features/cg.h | |||
@@ -32,6 +32,8 @@ struct fifo_gk20a; | |||
32 | void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g); | 32 | void nvgpu_cg_init_gr_load_gating_prod(struct gk20a *g); |
33 | void nvgpu_cg_elcg_enable(struct gk20a *g); | 33 | void nvgpu_cg_elcg_enable(struct gk20a *g); |
34 | void nvgpu_cg_elcg_disable(struct gk20a *g); | 34 | void nvgpu_cg_elcg_disable(struct gk20a *g); |
35 | void nvgpu_cg_elcg_enable_no_wait(struct gk20a *g); | ||
36 | void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g); | ||
35 | void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable); | 37 | void nvgpu_cg_elcg_set_elcg_enabled(struct gk20a *g, bool enable); |
36 | 38 | ||
37 | void nvgpu_cg_blcg_mode_enable(struct gk20a *g); | 39 | void nvgpu_cg_blcg_mode_enable(struct gk20a *g); |