diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 54010a8e..fa2c61e1 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -552,6 +552,7 @@ void gk20a_pbus_isr(struct gk20a *g) | |||
552 | bus_intr_0_pri_timeout_m())) { | 552 | bus_intr_0_pri_timeout_m())) { |
553 | gk20a_err(dev_from_gk20a(g), "pmc_enable : 0x%x", | 553 | gk20a_err(dev_from_gk20a(g), "pmc_enable : 0x%x", |
554 | gk20a_readl(g, mc_enable_r())); | 554 | gk20a_readl(g, mc_enable_r())); |
555 | gk20a_err(dev_from_gk20a(g), "NV_PBUS_INTR_0 : 0x%x", val); | ||
555 | gk20a_err(&g->dev->dev, | 556 | gk20a_err(&g->dev->dev, |
556 | "NV_PTIMER_PRI_TIMEOUT_SAVE_0: 0x%x\n", | 557 | "NV_PTIMER_PRI_TIMEOUT_SAVE_0: 0x%x\n", |
557 | gk20a_readl(g, timer_pri_timeout_save_0_r())); | 558 | gk20a_readl(g, timer_pri_timeout_save_0_r())); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 187c9c0e..676dd6c9 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -2779,6 +2779,14 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, | |||
2779 | u32 lockboost_mask; | 2779 | u32 lockboost_mask; |
2780 | u32 lockboost; | 2780 | u32 lockboost; |
2781 | 2781 | ||
2782 | if (support_gk20a_pmu(g->dev)) { | ||
2783 | err = gk20a_pmu_disable_elpg(g); | ||
2784 | if (err) { | ||
2785 | gk20a_err(dev_from_gk20a(g), | ||
2786 | "failed to set disable elpg"); | ||
2787 | } | ||
2788 | } | ||
2789 | |||
2782 | tex_lock_disable_mask = | 2790 | tex_lock_disable_mask = |
2783 | gr_gpcs_tpcs_sm_sch_texlock_tex_hash_m() | | 2791 | gr_gpcs_tpcs_sm_sch_texlock_tex_hash_m() | |
2784 | gr_gpcs_tpcs_sm_sch_texlock_tex_hash_tile_m() | | 2792 | gr_gpcs_tpcs_sm_sch_texlock_tex_hash_tile_m() | |
@@ -2824,6 +2832,9 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, | |||
2824 | gr_gk20a_ctx_patch_write_end(g, ch_ctx); | 2832 | gr_gk20a_ctx_patch_write_end(g, ch_ctx); |
2825 | 2833 | ||
2826 | args->flags |= NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO; | 2834 | args->flags |= NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO; |
2835 | |||
2836 | if (support_gk20a_pmu(g->dev)) | ||
2837 | gk20a_pmu_enable_elpg(g); | ||
2827 | } | 2838 | } |
2828 | 2839 | ||
2829 | /* init golden image, ELPG enabled after this is done */ | 2840 | /* init golden image, ELPG enabled after this is done */ |