diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
5 files changed, 69 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 6312e74a..9c41c7ef 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -56,6 +56,20 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id, | |||
56 | bool wait_for_finish); | 56 | bool wait_for_finish); |
57 | static u32 gk20a_fifo_engines_on_id(struct gk20a *g, u32 id, bool is_tsg); | 57 | static u32 gk20a_fifo_engines_on_id(struct gk20a *g, u32 id, bool is_tsg); |
58 | 58 | ||
59 | static const char *const pbdma_intr_fault_type_desc[] = { | ||
60 | "MEMREQ timeout", "MEMACK_TIMEOUT", "MEMACK_EXTRA acks", | ||
61 | "MEMDAT_TIMEOUT", "MEMDAT_EXTRA acks", "MEMFLUSH noack", | ||
62 | "MEMOP noack", "LBCONNECT noack", "NONE - was LBREQ", | ||
63 | "LBACK_TIMEOUT", "LBACK_EXTRA acks", "LBDAT_TIMEOUT", | ||
64 | "LBDAT_EXTRA acks", "GPFIFO won't fit", "GPPTR invalid", | ||
65 | "GPENTRY invalid", "GPCRC mismatch", "PBPTR get>put", | ||
66 | "PBENTRY invld", "PBCRC mismatch", "NONE - was XBARC", | ||
67 | "METHOD invld", "METHODCRC mismat", "DEVICE sw method", | ||
68 | "[ENGINE]", "SEMAPHORE invlid", "ACQUIRE timeout", | ||
69 | "PRI forbidden", "ILLEGAL SYNCPT", "[NO_CTXSW_SEG]", | ||
70 | "PBSEG badsplit", "SIGNATURE bad" | ||
71 | }; | ||
72 | |||
59 | u32 gk20a_fifo_get_engine_ids(struct gk20a *g, | 73 | u32 gk20a_fifo_get_engine_ids(struct gk20a *g, |
60 | u32 engine_id[], u32 engine_id_sz, | 74 | u32 engine_id[], u32 engine_id_sz, |
61 | u32 engine_enum) | 75 | u32 engine_enum) |
@@ -2314,21 +2328,33 @@ unsigned int gk20a_fifo_handle_pbdma_intr_0(struct gk20a *g, u32 pbdma_id, | |||
2314 | struct fifo_gk20a *f = &g->fifo; | 2328 | struct fifo_gk20a *f = &g->fifo; |
2315 | unsigned int rc_type = RC_TYPE_NO_RC; | 2329 | unsigned int rc_type = RC_TYPE_NO_RC; |
2316 | int i; | 2330 | int i; |
2331 | unsigned long pbdma_intr_err; | ||
2332 | u32 bit; | ||
2317 | 2333 | ||
2318 | if ((f->intr.pbdma.device_fatal_0 | | 2334 | if ((f->intr.pbdma.device_fatal_0 | |
2319 | f->intr.pbdma.channel_fatal_0 | | 2335 | f->intr.pbdma.channel_fatal_0 | |
2320 | f->intr.pbdma.restartable_0) & pbdma_intr_0) { | 2336 | f->intr.pbdma.restartable_0) & pbdma_intr_0) { |
2337 | |||
2338 | pbdma_intr_err = (unsigned long)pbdma_intr_0; | ||
2339 | for_each_set_bit(bit, &pbdma_intr_err, 32) | ||
2340 | nvgpu_err(g, "PBDMA intr %s Error", | ||
2341 | pbdma_intr_fault_type_desc[bit]); | ||
2342 | |||
2321 | nvgpu_err(g, | 2343 | nvgpu_err(g, |
2322 | "pbdma_intr_0(%d):0x%08x PBH: %08x " | 2344 | "pbdma_intr_0(%d):0x%08x PBH: %08x " |
2323 | "SHADOW: %08x M0: %08x %08x %08x %08x ", | 2345 | "SHADOW: %08x gp shadow0: %08x gp shadow1: %08x" |
2346 | "M0: %08x %08x %08x %08x ", | ||
2324 | pbdma_id, pbdma_intr_0, | 2347 | pbdma_id, pbdma_intr_0, |
2325 | gk20a_readl(g, pbdma_pb_header_r(pbdma_id)), | 2348 | gk20a_readl(g, pbdma_pb_header_r(pbdma_id)), |
2326 | gk20a_readl(g, pbdma_hdr_shadow_r(pbdma_id)), | 2349 | gk20a_readl(g, pbdma_hdr_shadow_r(pbdma_id)), |
2350 | gk20a_readl(g, pbdma_gp_shadow_0_r(pbdma_id)), | ||
2351 | gk20a_readl(g, pbdma_gp_shadow_1_r(pbdma_id)), | ||
2327 | gk20a_readl(g, pbdma_method0_r(pbdma_id)), | 2352 | gk20a_readl(g, pbdma_method0_r(pbdma_id)), |
2328 | gk20a_readl(g, pbdma_method1_r(pbdma_id)), | 2353 | gk20a_readl(g, pbdma_method1_r(pbdma_id)), |
2329 | gk20a_readl(g, pbdma_method2_r(pbdma_id)), | 2354 | gk20a_readl(g, pbdma_method2_r(pbdma_id)), |
2330 | gk20a_readl(g, pbdma_method3_r(pbdma_id)) | 2355 | gk20a_readl(g, pbdma_method3_r(pbdma_id)) |
2331 | ); | 2356 | ); |
2357 | |||
2332 | rc_type = RC_TYPE_PBDMA_FAULT; | 2358 | rc_type = RC_TYPE_PBDMA_FAULT; |
2333 | *handled |= ((f->intr.pbdma.device_fatal_0 | | 2359 | *handled |= ((f->intr.pbdma.device_fatal_0 | |
2334 | f->intr.pbdma.channel_fatal_0 | | 2360 | f->intr.pbdma.channel_fatal_0 | |
@@ -3666,14 +3692,21 @@ void gk20a_dump_pbdma_status(struct gk20a *g, | |||
3666 | fifo_pbdma_status_next_id_type_v(status) ? | 3692 | fifo_pbdma_status_next_id_type_v(status) ? |
3667 | "tsg" : "channel", | 3693 | "tsg" : "channel", |
3668 | gk20a_decode_pbdma_chan_eng_ctx_status(chan_status)); | 3694 | gk20a_decode_pbdma_chan_eng_ctx_status(chan_status)); |
3669 | gk20a_debug_output(o, "PUT: %016llx GET: %016llx " | 3695 | gk20a_debug_output(o, "PBDMA_PUT: %016llx PBDMA_GET: %016llx " |
3670 | "FETCH: %08x HEADER: %08x\n", | 3696 | "GP_PUT: %08x GP_GET: %08x " |
3697 | "FETCH: %08x HEADER: %08x\n" | ||
3698 | "HDR: %08x SHADOW0: %08x SHADOW1: %08x", | ||
3671 | (u64)gk20a_readl(g, pbdma_put_r(i)) + | 3699 | (u64)gk20a_readl(g, pbdma_put_r(i)) + |
3672 | ((u64)gk20a_readl(g, pbdma_put_hi_r(i)) << 32ULL), | 3700 | ((u64)gk20a_readl(g, pbdma_put_hi_r(i)) << 32ULL), |
3673 | (u64)gk20a_readl(g, pbdma_get_r(i)) + | 3701 | (u64)gk20a_readl(g, pbdma_get_r(i)) + |
3674 | ((u64)gk20a_readl(g, pbdma_get_hi_r(i)) << 32ULL), | 3702 | ((u64)gk20a_readl(g, pbdma_get_hi_r(i)) << 32ULL), |
3703 | gk20a_readl(g, pbdma_gp_put_r(i)), | ||
3704 | gk20a_readl(g, pbdma_gp_get_r(i)), | ||
3675 | gk20a_readl(g, pbdma_gp_fetch_r(i)), | 3705 | gk20a_readl(g, pbdma_gp_fetch_r(i)), |
3676 | gk20a_readl(g, pbdma_pb_header_r(i))); | 3706 | gk20a_readl(g, pbdma_pb_header_r(i)), |
3707 | gk20a_readl(g, pbdma_hdr_shadow_r(i)), | ||
3708 | gk20a_readl(g, pbdma_gp_shadow_0_r(i)), | ||
3709 | gk20a_readl(g, pbdma_gp_shadow_1_r(i))); | ||
3677 | } | 3710 | } |
3678 | gk20a_debug_output(o, "\n"); | 3711 | gk20a_debug_output(o, "\n"); |
3679 | } | 3712 | } |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h index 8f30654f..338edef2 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pbdma_gk20a.h | |||
@@ -204,6 +204,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) | |||
204 | { | 204 | { |
205 | return 0x00040118U + i*8192U; | 205 | return 0x00040118U + i*8192U; |
206 | } | 206 | } |
207 | static inline u32 pbdma_gp_shadow_0_r(u32 i) | ||
208 | { | ||
209 | return 0x00040110U + i*8192U; | ||
210 | } | ||
211 | static inline u32 pbdma_gp_shadow_1_r(u32 i) | ||
212 | { | ||
213 | return 0x00040114U + i*8192U; | ||
214 | } | ||
207 | static inline u32 pbdma_subdevice_r(u32 i) | 215 | static inline u32 pbdma_subdevice_r(u32 i) |
208 | { | 216 | { |
209 | return 0x00040094U + i*8192U; | 217 | return 0x00040094U + i*8192U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h index 46edf7aa..b8d7bbe4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pbdma_gm20b.h | |||
@@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) | |||
188 | { | 188 | { |
189 | return 0x00040118U + i*8192U; | 189 | return 0x00040118U + i*8192U; |
190 | } | 190 | } |
191 | static inline u32 pbdma_gp_shadow_0_r(u32 i) | ||
192 | { | ||
193 | return 0x00040110U + i*8192U; | ||
194 | } | ||
195 | static inline u32 pbdma_gp_shadow_1_r(u32 i) | ||
196 | { | ||
197 | return 0x00040114U + i*8192U; | ||
198 | } | ||
191 | static inline u32 pbdma_subdevice_r(u32 i) | 199 | static inline u32 pbdma_subdevice_r(u32 i) |
192 | { | 200 | { |
193 | return 0x00040094U + i*8192U; | 201 | return 0x00040094U + i*8192U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h index 15531d53..dad6317d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_pbdma_gp106.h | |||
@@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) | |||
188 | { | 188 | { |
189 | return 0x00040118U + i*8192U; | 189 | return 0x00040118U + i*8192U; |
190 | } | 190 | } |
191 | static inline u32 pbdma_gp_shadow_0_r(u32 i) | ||
192 | { | ||
193 | return 0x00040110U + i*8192U; | ||
194 | } | ||
195 | static inline u32 pbdma_gp_shadow_1_r(u32 i) | ||
196 | { | ||
197 | return 0x00040114U + i*8192U; | ||
198 | } | ||
191 | static inline u32 pbdma_subdevice_r(u32 i) | 199 | static inline u32 pbdma_subdevice_r(u32 i) |
192 | { | 200 | { |
193 | return 0x00040094U + i*8192U; | 201 | return 0x00040094U + i*8192U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h index d49cc95f..4f45f824 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pbdma_gp10b.h | |||
@@ -188,6 +188,14 @@ static inline u32 pbdma_hdr_shadow_r(u32 i) | |||
188 | { | 188 | { |
189 | return 0x00040118U + i*8192U; | 189 | return 0x00040118U + i*8192U; |
190 | } | 190 | } |
191 | static inline u32 pbdma_gp_shadow_0_r(u32 i) | ||
192 | { | ||
193 | return 0x00040110U + i*8192U; | ||
194 | } | ||
195 | static inline u32 pbdma_gp_shadow_1_r(u32 i) | ||
196 | { | ||
197 | return 0x00040114U + i*8192U; | ||
198 | } | ||
191 | static inline u32 pbdma_subdevice_r(u32 i) | 199 | static inline u32 pbdma_subdevice_r(u32 i) |
192 | { | 200 | { |
193 | return 0x00040094U + i*8192U; | 201 | return 0x00040094U + i*8192U; |