diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/Makefile.nvgpu | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_common.c | 61 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.c | 41 |
3 files changed, 63 insertions, 42 deletions
diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index 22c679ca..f587a930 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu | |||
@@ -119,7 +119,8 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \ | |||
119 | 119 | ||
120 | nvgpu-$(CONFIG_TEGRA_CLK_FRAMEWORK) += \ | 120 | nvgpu-$(CONFIG_TEGRA_CLK_FRAMEWORK) += \ |
121 | gm20b/clk_gm20b.o \ | 121 | gm20b/clk_gm20b.o \ |
122 | gk20a/clk_gk20a.o | 122 | gk20a/clk_gk20a.o \ |
123 | clk/clk_common.o | ||
123 | 124 | ||
124 | nvgpu-$(CONFIG_GK20A_DEVFREQ) += \ | 125 | nvgpu-$(CONFIG_GK20A_DEVFREQ) += \ |
125 | gk20a/gk20a_scale.o | 126 | gk20a/gk20a_scale.o |
diff --git a/drivers/gpu/nvgpu/clk/clk_common.c b/drivers/gpu/nvgpu/clk/clk_common.c new file mode 100644 index 00000000..346ad12b --- /dev/null +++ b/drivers/gpu/nvgpu/clk/clk_common.c | |||
@@ -0,0 +1,61 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <linux/clk.h> | ||
18 | |||
19 | #include "gk20a/gk20a.h" | ||
20 | |||
21 | struct clk *gk20a_clk_get(struct gk20a *g) | ||
22 | { | ||
23 | if (!g->clk.tegra_clk) { | ||
24 | struct clk *clk; | ||
25 | char clk_dev_id[32]; | ||
26 | struct device *dev = dev_from_gk20a(g); | ||
27 | |||
28 | snprintf(clk_dev_id, 32, "tegra_%s", dev_name(dev)); | ||
29 | |||
30 | clk = clk_get_sys(clk_dev_id, "gpu"); | ||
31 | if (IS_ERR(clk)) { | ||
32 | gk20a_err(dev, "fail to get tegra gpu clk %s/gpu\n", | ||
33 | clk_dev_id); | ||
34 | return NULL; | ||
35 | } | ||
36 | g->clk.tegra_clk = clk; | ||
37 | } | ||
38 | |||
39 | return g->clk.tegra_clk; | ||
40 | } | ||
41 | |||
42 | unsigned long gk20a_clk_get_rate(struct gk20a *g) | ||
43 | { | ||
44 | struct clk_gk20a *clk = &g->clk; | ||
45 | return rate_gpc2clk_to_gpu(clk->gpc_pll.freq); | ||
46 | } | ||
47 | |||
48 | long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) | ||
49 | { | ||
50 | /* make sure the clock is available */ | ||
51 | if (!gk20a_clk_get(g)) | ||
52 | return rate; | ||
53 | |||
54 | return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate); | ||
55 | } | ||
56 | |||
57 | int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate) | ||
58 | { | ||
59 | return clk_set_rate(g->clk.tegra_clk, rate); | ||
60 | } | ||
61 | |||
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c index 26fd1eaf..e3a486b6 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c | |||
@@ -412,27 +412,6 @@ static int gk20a_init_clk_reset_enable_hw(struct gk20a *g) | |||
412 | return 0; | 412 | return 0; |
413 | } | 413 | } |
414 | 414 | ||
415 | struct clk *gk20a_clk_get(struct gk20a *g) | ||
416 | { | ||
417 | if (!g->clk.tegra_clk) { | ||
418 | struct clk *clk; | ||
419 | char clk_dev_id[32]; | ||
420 | struct device *dev = dev_from_gk20a(g); | ||
421 | |||
422 | snprintf(clk_dev_id, 32, "tegra_%s", dev_name(dev)); | ||
423 | |||
424 | clk = clk_get_sys(clk_dev_id, "gpu"); | ||
425 | if (IS_ERR(clk)) { | ||
426 | gk20a_err(dev, "fail to get tegra gpu clk %s/gpu\n", | ||
427 | clk_dev_id); | ||
428 | return NULL; | ||
429 | } | ||
430 | g->clk.tegra_clk = clk; | ||
431 | } | ||
432 | |||
433 | return g->clk.tegra_clk; | ||
434 | } | ||
435 | |||
436 | static int gk20a_init_clk_setup_sw(struct gk20a *g) | 415 | static int gk20a_init_clk_setup_sw(struct gk20a *g) |
437 | { | 416 | { |
438 | struct clk_gk20a *clk = &g->clk; | 417 | struct clk_gk20a *clk = &g->clk; |
@@ -709,26 +688,6 @@ void gk20a_init_clk_ops(struct gpu_ops *gops) | |||
709 | gops->clk.suspend_clk_support = gk20a_suspend_clk_support; | 688 | gops->clk.suspend_clk_support = gk20a_suspend_clk_support; |
710 | } | 689 | } |
711 | 690 | ||
712 | unsigned long gk20a_clk_get_rate(struct gk20a *g) | ||
713 | { | ||
714 | struct clk_gk20a *clk = &g->clk; | ||
715 | return rate_gpc2clk_to_gpu(clk->gpc_pll.freq); | ||
716 | } | ||
717 | |||
718 | long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) | ||
719 | { | ||
720 | /* make sure the clock is available */ | ||
721 | if (!gk20a_clk_get(g)) | ||
722 | return rate; | ||
723 | |||
724 | return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate); | ||
725 | } | ||
726 | |||
727 | int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate) | ||
728 | { | ||
729 | return clk_set_rate(g->clk.tegra_clk, rate); | ||
730 | } | ||
731 | |||
732 | #ifdef CONFIG_DEBUG_FS | 691 | #ifdef CONFIG_DEBUG_FS |
733 | 692 | ||
734 | static int rate_get(void *data, u64 *val) | 693 | static int rate_get(void *data, u64 *val) |