diff options
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | 17 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 1 |
6 files changed, 61 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index f7bec806..48f0008a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -475,6 +475,7 @@ struct gpu_ops { | |||
475 | u32 *priv_addr_table, | 475 | u32 *priv_addr_table, |
476 | u32 *priv_addr_table_index); | 476 | u32 *priv_addr_table_index); |
477 | u32 (*fecs_ctxsw_mailbox_size)(void); | 477 | u32 (*fecs_ctxsw_mailbox_size)(void); |
478 | int (*init_sw_bundle64)(struct gk20a *g); | ||
478 | } gr; | 479 | } gr; |
479 | struct { | 480 | struct { |
480 | void (*init_hw)(struct gk20a *g); | 481 | void (*init_hw)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index 3f22a1b7..e357db19 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | |||
@@ -57,6 +57,18 @@ static int gr_gk20a_alloc_load_netlist_av(struct gk20a *g, u32 *src, u32 len, | |||
57 | return 0; | 57 | return 0; |
58 | } | 58 | } |
59 | 59 | ||
60 | static int gr_gk20a_alloc_load_netlist_av64(struct gk20a *g, u32 *src, u32 len, | ||
61 | struct av64_list_gk20a *av64_list) | ||
62 | { | ||
63 | av64_list->count = len / sizeof(struct av64_gk20a); | ||
64 | if (!alloc_av64_list_gk20a(g, av64_list)) | ||
65 | return -ENOMEM; | ||
66 | |||
67 | memcpy(av64_list->l, src, len); | ||
68 | |||
69 | return 0; | ||
70 | } | ||
71 | |||
60 | static int gr_gk20a_alloc_load_netlist_aiv(struct gk20a *g, u32 *src, u32 len, | 72 | static int gr_gk20a_alloc_load_netlist_aiv(struct gk20a *g, u32 *src, u32 len, |
61 | struct aiv_list_gk20a *aiv_list) | 73 | struct aiv_list_gk20a *aiv_list) |
62 | { | 74 | { |
@@ -343,6 +355,14 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
343 | if (err) | 355 | if (err) |
344 | goto clean_up; | 356 | goto clean_up; |
345 | break; | 357 | break; |
358 | case NETLIST_REGIONID_SW_BUNDLE64_INIT: | ||
359 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE64_INIT"); | ||
360 | err = gr_gk20a_alloc_load_netlist_av64(g, | ||
361 | src, size, | ||
362 | &g->gr.ctx_vars.sw_bundle64_init); | ||
363 | if (err) | ||
364 | goto clean_up; | ||
365 | break; | ||
346 | case NETLIST_REGIONID_NVPERF_PMCAU: | 366 | case NETLIST_REGIONID_NVPERF_PMCAU: |
347 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMCAU"); | 367 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMCAU"); |
348 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 368 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
@@ -403,6 +423,7 @@ clean_up: | |||
403 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); | 423 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); |
404 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); | 424 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); |
405 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.etpc.l); | 425 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.etpc.l); |
426 | nvgpu_kfree(g, g->gr.ctx_vars.sw_bundle64_init.l); | ||
406 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_cau.l); | 427 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_cau.l); |
407 | nvgpu_release_firmware(g, netlist_fw); | 428 | nvgpu_release_firmware(g, netlist_fw); |
408 | err = -ENOENT; | 429 | err = -ENOENT; |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h index afc3e9df..10f8723f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h | |||
@@ -105,6 +105,7 @@ union __max_name { | |||
105 | #define NETLIST_REGIONID_CTXREG_PMROP 31 | 105 | #define NETLIST_REGIONID_CTXREG_PMROP 31 |
106 | #define NETLIST_REGIONID_CTXREG_PMUCGPC 32 | 106 | #define NETLIST_REGIONID_CTXREG_PMUCGPC 32 |
107 | #define NETLIST_REGIONID_CTXREG_ETPC 33 | 107 | #define NETLIST_REGIONID_CTXREG_ETPC 33 |
108 | #define NETLIST_REGIONID_SW_BUNDLE64_INIT 34 | ||
108 | #define NETLIST_REGIONID_NVPERF_PMCAU 35 | 109 | #define NETLIST_REGIONID_NVPERF_PMCAU 35 |
109 | 110 | ||
110 | struct netlist_region { | 111 | struct netlist_region { |
@@ -127,6 +128,11 @@ struct av_gk20a { | |||
127 | u32 addr; | 128 | u32 addr; |
128 | u32 value; | 129 | u32 value; |
129 | }; | 130 | }; |
131 | struct av64_gk20a { | ||
132 | u32 addr; | ||
133 | u32 value_lo; | ||
134 | u32 value_hi; | ||
135 | }; | ||
130 | struct aiv_gk20a { | 136 | struct aiv_gk20a { |
131 | u32 addr; | 137 | u32 addr; |
132 | u32 index; | 138 | u32 index; |
@@ -140,6 +146,10 @@ struct av_list_gk20a { | |||
140 | struct av_gk20a *l; | 146 | struct av_gk20a *l; |
141 | u32 count; | 147 | u32 count; |
142 | }; | 148 | }; |
149 | struct av64_list_gk20a { | ||
150 | struct av64_gk20a *l; | ||
151 | u32 count; | ||
152 | }; | ||
143 | struct u32_list_gk20a { | 153 | struct u32_list_gk20a { |
144 | u32 *l; | 154 | u32 *l; |
145 | u32 count; | 155 | u32 count; |
@@ -158,6 +168,13 @@ struct av_gk20a *alloc_av_list_gk20a(struct gk20a *g, struct av_list_gk20a *avl) | |||
158 | } | 168 | } |
159 | 169 | ||
160 | static inline | 170 | static inline |
171 | struct av64_gk20a *alloc_av64_list_gk20a(struct gk20a *g, struct av64_list_gk20a *avl) | ||
172 | { | ||
173 | avl->l = nvgpu_kzalloc(g, avl->count * sizeof(*avl->l)); | ||
174 | return avl->l; | ||
175 | } | ||
176 | |||
177 | static inline | ||
161 | struct aiv_gk20a *alloc_aiv_list_gk20a(struct gk20a *g, | 178 | struct aiv_gk20a *alloc_aiv_list_gk20a(struct gk20a *g, |
162 | struct aiv_list_gk20a *aivl) | 179 | struct aiv_list_gk20a *aivl) |
163 | { | 180 | { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c index 01c7ed3c..6d6352df 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c | |||
@@ -63,6 +63,8 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
63 | &g->gr.ctx_vars.sw_ctx_load.count); | 63 | &g->gr.ctx_vars.sw_ctx_load.count); |
64 | g->sim->esc_readl(g, "GRCTX_SW_VEID_BUNDLE_INIT_SIZE", 0, | 64 | g->sim->esc_readl(g, "GRCTX_SW_VEID_BUNDLE_INIT_SIZE", 0, |
65 | &g->gr.ctx_vars.sw_veid_bundle_init.count); | 65 | &g->gr.ctx_vars.sw_veid_bundle_init.count); |
66 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT_SIZE", 0, | ||
67 | &g->gr.ctx_vars.sw_bundle64_init.count); | ||
66 | 68 | ||
67 | g->sim->esc_readl(g, "GRCTX_NONCTXSW_REG_SIZE", 0, | 69 | g->sim->esc_readl(g, "GRCTX_NONCTXSW_REG_SIZE", 0, |
68 | &g->gr.ctx_vars.sw_non_ctx_load.count); | 70 | &g->gr.ctx_vars.sw_non_ctx_load.count); |
@@ -92,6 +94,7 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
92 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.inst); | 94 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.inst); |
93 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.data); | 95 | err |= !alloc_u32_list_gk20a(g, &g->gr.ctx_vars.ucode.gpccs.data); |
94 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_bundle_init); | 96 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_bundle_init); |
97 | err |= !alloc_av64_list_gk20a(g, &g->gr.ctx_vars.sw_bundle64_init); | ||
95 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_method_init); | 98 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_method_init); |
96 | err |= !alloc_aiv_list_gk20a(g, &g->gr.ctx_vars.sw_ctx_load); | 99 | err |= !alloc_aiv_list_gk20a(g, &g->gr.ctx_vars.sw_ctx_load); |
97 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_non_ctx_load); | 100 | err |= !alloc_av_list_gk20a(g, &g->gr.ctx_vars.sw_non_ctx_load); |
@@ -168,6 +171,17 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) | |||
168 | i, &l[i].value); | 171 | i, &l[i].value); |
169 | } | 172 | } |
170 | 173 | ||
174 | for (i = 0; i < g->gr.ctx_vars.sw_bundle64_init.count; i++) { | ||
175 | struct av64_gk20a *l = g->gr.ctx_vars.sw_bundle64_init.l; | ||
176 | |||
177 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:ADDR", | ||
178 | i, &l[i].addr); | ||
179 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:VALUE_LO", | ||
180 | i, &l[i].value_lo); | ||
181 | g->sim->esc_readl(g, "GRCTX_SW_BUNDLE64_INIT:VALUE_HI", | ||
182 | i, &l[i].value_hi); | ||
183 | } | ||
184 | |||
171 | for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) { | 185 | for (i = 0; i < g->gr.ctx_vars.ctxsw_regs.sys.count; i++) { |
172 | struct aiv_gk20a *l = g->gr.ctx_vars.ctxsw_regs.sys.l; | 186 | struct aiv_gk20a *l = g->gr.ctx_vars.ctxsw_regs.sys.l; |
173 | g->sim->esc_readl(g, "GRCTX_REG_LIST_SYS:ADDR", | 187 | g->sim->esc_readl(g, "GRCTX_REG_LIST_SYS:ADDR", |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index d4b31c86..52346541 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -1373,6 +1373,12 @@ u32 gk20a_init_sw_bundle(struct gk20a *g) | |||
1373 | goto error; | 1373 | goto error; |
1374 | } | 1374 | } |
1375 | 1375 | ||
1376 | if (g->ops.gr.init_sw_bundle64) { | ||
1377 | err = g->ops.gr.init_sw_bundle64(g); | ||
1378 | if (err) | ||
1379 | goto error; | ||
1380 | } | ||
1381 | |||
1376 | /* disable pipe mode override */ | 1382 | /* disable pipe mode override */ |
1377 | gk20a_writel(g, gr_pipe_bundle_config_r(), | 1383 | gk20a_writel(g, gr_pipe_bundle_config_r(), |
1378 | gr_pipe_bundle_config_override_pipe_mode_disabled_f()); | 1384 | gr_pipe_bundle_config_override_pipe_mode_disabled_f()); |
@@ -3130,6 +3136,7 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr) | |||
3130 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.gpc_router.l); | 3136 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.gpc_router.l); |
3131 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_ltc.l); | 3137 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_ltc.l); |
3132 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_fbpa.l); | 3138 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_fbpa.l); |
3139 | nvgpu_kfree(g, gr->ctx_vars.sw_bundle64_init.l); | ||
3133 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_cau.l); | 3140 | nvgpu_kfree(g, gr->ctx_vars.ctxsw_regs.pm_cau.l); |
3134 | 3141 | ||
3135 | nvgpu_vfree(g, gr->ctx_vars.local_golden_image); | 3142 | nvgpu_vfree(g, gr->ctx_vars.local_golden_image); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 49a69c26..43b89b12 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -297,6 +297,7 @@ struct gr_gk20a { | |||
297 | struct aiv_list_gk20a sw_ctx_load; | 297 | struct aiv_list_gk20a sw_ctx_load; |
298 | struct av_list_gk20a sw_non_ctx_load; | 298 | struct av_list_gk20a sw_non_ctx_load; |
299 | struct av_list_gk20a sw_veid_bundle_init; | 299 | struct av_list_gk20a sw_veid_bundle_init; |
300 | struct av64_list_gk20a sw_bundle64_init; | ||
300 | struct { | 301 | struct { |
301 | struct aiv_list_gk20a sys; | 302 | struct aiv_list_gk20a sys; |
302 | struct aiv_list_gk20a gpc; | 303 | struct aiv_list_gk20a gpc; |